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WO2018018494A1 - Procédé et système d'attribution de puissance sur la base d'une attribution multi-zone - Google Patents

Procédé et système d'attribution de puissance sur la base d'une attribution multi-zone Download PDF

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Publication number
WO2018018494A1
WO2018018494A1 PCT/CN2016/092038 CN2016092038W WO2018018494A1 WO 2018018494 A1 WO2018018494 A1 WO 2018018494A1 CN 2016092038 W CN2016092038 W CN 2016092038W WO 2018018494 A1 WO2018018494 A1 WO 2018018494A1
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WO
WIPO (PCT)
Prior art keywords
power
power value
interval
threads
core
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/CN2016/092038
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English (en)
Chinese (zh)
Inventor
张升泽
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Individual
Original Assignee
Individual
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Filing date
Publication date
Application filed by Individual filed Critical Individual
Priority to PCT/CN2016/092038 priority Critical patent/WO2018018494A1/fr
Publication of WO2018018494A1 publication Critical patent/WO2018018494A1/fr
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs

Definitions

  • the present invention relates to the field of electronics, and in particular, to a power allocation method and system based on multi-interval allocation.
  • Chip English is Chip; Chipset is Chipset.
  • the chip generally refers to the carrier of the integrated circuit, and is also the result of the integrated circuit after being designed, manufactured, packaged, and tested. It is usually an independent whole that can be used immediately.
  • the words "chip” and "integrated circuit” are often mixed. For example, in the common discussion topic, integrated circuit design and chip design say that the chip industry, the integrated circuit industry, and the IC industry are often also meanings. . In fact, these two words are related and different.
  • Integrated circuit entities often exist in the form of chips, because narrowly defined integrated circuits emphasize the circuit itself, such as a phase-shifted oscillator that is simply connected with only five components. When it is still on the drawing, we It can also be called an integrated circuit.
  • this small integrated circuit When we want to use this small integrated circuit for application, it must be a separate piece of real object, or embedded in a larger integrated circuit, relying on the chip to play its role; Focusing on the design and layout of the circuit, the chip emphasizes the integration, production and packaging of the circuit.
  • the generalized integrated circuit when it comes to the industry (different from other industries), can also contain various meanings related to the chip.
  • a power allocation method based on multi-interval allocation is provided, which solves the shortcomings of the prior art that power efficient control of a multi-core chip cannot be realized.
  • a power allocation method based on multi-interval allocation comprising the following steps:
  • the method further includes:
  • the method further includes:
  • a power distribution system based on multi-interval allocation comprising:
  • a dividing unit configured to divide the number of threads into a plurality of thread number intervals, and divide the power value into a plurality of power value intervals according to the size of the power value
  • the power unit is configured to acquire the number of threads corresponding to the current core, obtain a corresponding thread number interval according to the number of threads, and a power value interval corresponding to the thread number interval, and adjust the power of the core to the power value interval.
  • system further includes:
  • the adjusting unit is configured to acquire a change value of the number of threads, and adjust the power of the core according to the change value.
  • system further includes:
  • a storage unit for recording an operating power value of the core for recording an operating power value of the core.
  • the technical solution provided by the specific embodiment of the present invention divides the number of threads into a plurality of thread number intervals, divides the power value into multiple power value intervals according to the power value, and establishes a mapping relationship between multiple power value intervals and thread number intervals. Obtaining the number of threads corresponding to the current core, obtaining the corresponding thread number interval and the power value interval corresponding to the thread number interval according to the number of the thread, and adjusting the power of the core to the power value interval, so that the power is performed on the power.
  • FIG. 1 is a flowchart of a power allocation method based on multi-interval allocation according to the present invention
  • FIG. 2 is a structural diagram of a power distribution system based on multi-interval allocation according to the present invention.
  • FIG. 1 is a flowchart of a power allocation method based on multi-interval allocation according to a first preferred embodiment of the present invention.
  • the method is implemented by an electronic chip.
  • the method is as shown in FIG. 1 and includes the following steps. :
  • Step S101 dividing the number of threads into a plurality of thread number intervals, and dividing the power value into multiple power value intervals according to the power value;
  • Step S102 Establish a mapping relationship between a plurality of power value intervals and a thread number interval.
  • step S103 the number of threads corresponding to the current core is obtained, and the corresponding thread number interval and the power value interval corresponding to the thread number interval are obtained according to the number of the threads, and the power of the core is adjusted to the power value interval.
  • the technical solution provided by the specific embodiment of the present invention divides the number of threads into a plurality of thread number intervals, divides the power value into multiple power value intervals according to the power value, and establishes a mapping relationship between multiple power value intervals and thread number intervals. Obtaining the number of threads corresponding to the current core, obtaining the corresponding thread number interval and the power value interval corresponding to the thread number interval according to the number of the thread, and adjusting the power of the core to the power value interval, so that the power is performed on the power.
  • the foregoing method may further include:
  • the foregoing method may further include:
  • FIG. 2 is a power distribution system based on multi-interval allocation according to a second preferred embodiment of the present invention.
  • the system includes:
  • the dividing unit 201 is configured to divide the number of threads into a plurality of thread number intervals, and divide the power value into a plurality of power value intervals according to the size of the power value;
  • the establishing unit 202 is configured to establish a mapping relationship between the plurality of power value intervals and the thread number interval;
  • the power unit 203 is configured to acquire the number of threads corresponding to the current core, obtain the corresponding thread number interval and the power value interval corresponding to the thread number interval according to the number of the threads, and adjust the power of the core to the power value interval.
  • the technical solution provided by the specific embodiment of the present invention divides the number of threads into a plurality of thread number intervals, divides the power value into multiple power value intervals according to the power value, and establishes a mapping relationship between multiple power value intervals and thread number intervals. Obtaining the number of threads corresponding to the current core, obtaining the corresponding thread number interval and the power value interval corresponding to the thread number interval according to the number of the thread, and adjusting the power of the core to the power value interval, so that the power is performed on the power.
  • the above system may further include:
  • the adjusting unit 204 is configured to acquire a change value of the number of threads, and adjust the power of the core according to the change value.
  • the above system may further include:
  • the storage unit 205 is configured to record an operating power value of the core.
  • Computer readable media includes both computer storage media and communication media including any medium that facilitates transfer of a computer program from one location to another.
  • a storage medium may be any available media that can be accessed by a computer.
  • the computer readable medium may include random access memory (Random) Access Memory, RAM), Read-Only Memory (ROM), Electrically Erasable Programmable Read Only Memory (Electrically Erasable Programmable Read-Only Memory, EEPROM), Compact Disc Read-Only Memory, CD-ROM, or other optical disc storage, magnetic storage medium or other magnetic storage device, or any other medium that can be used to carry or store desired program code in the form of instructions or data structures and that can be accessed by a computer. Also. Any connection may suitably be a computer readable medium.
  • a disk and a disc include a compact disc (CD), a laser disc, a compact disc, a digital versatile disc (DVD), a floppy disk, and a Blu-ray disc, wherein the disc is usually magnetically copied, and the disc is The laser is used to optically replicate the data. Combinations of the above should also be included within the scope of the computer readable media.

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Remote Monitoring And Control Of Power-Distribution Networks (AREA)

Abstract

L'invention concerne un procédé et un système d'attribution de puissance sur la base d'une attribution multi-zone. Le procédé comprend les étapes suivantes : la division d'une quantité de fil en une pluralité de zones de quantité de fil et la division des valeurs de puissance en une pluralité de zones de valeur de puissance selon l'amplitude des valeurs de puissance (S101) ; l'établissement d'une relation de correspondance entre la pluralité de zones de valeur de puissance et les zones de quantité de fil (S102) ; et l'acquisition de la quantité de fils correspondant à un noyau courant, et en fonction de la quantité des fils, l'acquisition de la zone de quantité de fil correspondant à cette dernière et de la zone de valeur de puissance correspondant à la zone de quantité de fil, et le réglage de la puissance du noyau par rapport à la zone de valeur de puissance (S103). Cette solution technique offre l'avantage de réguler efficacement la puissance.
PCT/CN2016/092038 2016-07-28 2016-07-28 Procédé et système d'attribution de puissance sur la base d'une attribution multi-zone Ceased WO2018018494A1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
PCT/CN2016/092038 WO2018018494A1 (fr) 2016-07-28 2016-07-28 Procédé et système d'attribution de puissance sur la base d'une attribution multi-zone

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/CN2016/092038 WO2018018494A1 (fr) 2016-07-28 2016-07-28 Procédé et système d'attribution de puissance sur la base d'une attribution multi-zone

Publications (1)

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WO2018018494A1 true WO2018018494A1 (fr) 2018-02-01

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WO (1) WO2018018494A1 (fr)

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1534463A (zh) * 2003-02-20 2004-10-06 ���ǵ�����ʽ���� 同步多线程处理器电路以及计算机程序产品及运行方法
CN1885232A (zh) * 2005-06-24 2006-12-27 戴尔产品有限公司 多处理器的电源管理
CN103502946A (zh) * 2011-04-05 2014-01-08 高通股份有限公司 用于动态控制到便携式计算装置的多核心处理器中的多个核心的电力的方法和系统
CN104204999A (zh) * 2012-03-13 2014-12-10 英特尔公司 用于按照核心的性能状态的方法和装置
CN104583900A (zh) * 2012-10-04 2015-04-29 英特尔公司 在处理器的异质核之间动态切换工作载荷
US20150268710A1 (en) * 2014-03-19 2015-09-24 International Business Machines Corporation Power management for multi-core processing systems
CN106201728A (zh) * 2016-07-28 2016-12-07 张升泽 基于多区间分配的功率分配方法及系统

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1534463A (zh) * 2003-02-20 2004-10-06 ���ǵ�����ʽ���� 同步多线程处理器电路以及计算机程序产品及运行方法
CN1885232A (zh) * 2005-06-24 2006-12-27 戴尔产品有限公司 多处理器的电源管理
CN103502946A (zh) * 2011-04-05 2014-01-08 高通股份有限公司 用于动态控制到便携式计算装置的多核心处理器中的多个核心的电力的方法和系统
CN104204999A (zh) * 2012-03-13 2014-12-10 英特尔公司 用于按照核心的性能状态的方法和装置
CN104583900A (zh) * 2012-10-04 2015-04-29 英特尔公司 在处理器的异质核之间动态切换工作载荷
US20150268710A1 (en) * 2014-03-19 2015-09-24 International Business Machines Corporation Power management for multi-core processing systems
CN106201728A (zh) * 2016-07-28 2016-12-07 张升泽 基于多区间分配的功率分配方法及系统

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