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WO2018018491A1 - Procédé et système d'attribution d'une tension d'une puce électronique dans une pluralité d'intervalles - Google Patents

Procédé et système d'attribution d'une tension d'une puce électronique dans une pluralité d'intervalles Download PDF

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Publication number
WO2018018491A1
WO2018018491A1 PCT/CN2016/092035 CN2016092035W WO2018018491A1 WO 2018018491 A1 WO2018018491 A1 WO 2018018491A1 CN 2016092035 W CN2016092035 W CN 2016092035W WO 2018018491 A1 WO2018018491 A1 WO 2018018491A1
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WO
WIPO (PCT)
Prior art keywords
voltage
voltage value
interval
intervals
threads
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/CN2016/092035
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English (en)
Chinese (zh)
Inventor
张升泽
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Individual
Original Assignee
Individual
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Filing date
Publication date
Application filed by Individual filed Critical Individual
Priority to PCT/CN2016/092035 priority Critical patent/WO2018018491A1/fr
Publication of WO2018018491A1 publication Critical patent/WO2018018491A1/fr
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]

Definitions

  • the present invention relates to the field of electronics, and in particular, to a method and system for multi-interval distribution of electronic chip voltages.
  • Chip English is Chip; Chipset is Chipset.
  • the chip generally refers to the carrier of the integrated circuit, and is also the result of the integrated circuit after being designed, manufactured, packaged, and tested. It is usually an independent whole that can be used immediately.
  • the words "chip” and "integrated circuit” are often mixed. For example, in the common discussion topic, integrated circuit design and chip design say that the chip industry, the integrated circuit industry, and the IC industry are often also meanings. . In fact, these two words are related and different.
  • Integrated circuit entities often exist in the form of chips, because narrowly defined integrated circuits emphasize the circuit itself, such as a phase-shifted oscillator that is simply connected with only five components. When it is still on the drawing, we It can also be called an integrated circuit.
  • this small integrated circuit When we want to use this small integrated circuit for application, it must be a separate piece of real object, or embedded in a larger integrated circuit, relying on the chip to play its role; Focusing on the design and layout of the circuit, the chip emphasizes the integration, production and packaging of the circuit.
  • the generalized integrated circuit when it comes to the industry (different from other industries), can also contain various meanings related to the chip.
  • a method for multi-interval distribution of electronic chip voltage is provided, which solves the shortcomings of the prior art that the voltage effective control of the multi-core chip cannot be realized.
  • a method of multi-interval distribution of an electronic chip voltage comprising the steps of:
  • the method further includes:
  • the method further includes:
  • a system for multi-interval distribution of electronic chip voltage comprising:
  • a dividing unit configured to divide the number of threads into a plurality of thread number intervals, and divide the voltage value into a plurality of voltage value intervals according to the magnitude of the voltage value
  • the voltage unit is configured to acquire the number of threads corresponding to the current core, obtain a corresponding thread number interval according to the number of threads, and a voltage value interval corresponding to the thread number interval, and adjust the voltage of the core to the voltage value interval.
  • system further includes:
  • the adjusting unit is configured to acquire a change value of the number of threads, and adjust the voltage of the core according to the change value.
  • system further includes:
  • a storage unit for recording an operating voltage value of the core.
  • the technical solution provided by the specific embodiment of the present invention divides the number of threads into a plurality of thread number intervals, divides the voltage value into a plurality of voltage value intervals according to the magnitude of the voltage value, and establishes a mapping relationship between the plurality of voltage value intervals and the thread number interval. Obtaining the number of threads corresponding to the current core, obtaining a corresponding thread number interval according to the number of threads, and a voltage value interval corresponding to the thread number interval, and adjusting the voltage of the core to the voltage value interval, so that the voltage is performed on the voltage
  • the advantages of effective control are provided by the specific embodiment of the present invention.
  • FIG. 1 is a flow chart of a method for multi-interval distribution of electronic chip voltage according to the present invention
  • FIG. 2 is a structural diagram of a system for multi-interval distribution of electronic chip voltage according to the present invention.
  • FIG. 1 is a flowchart of a method for multi-interval distribution of an electronic chip voltage according to a first preferred embodiment of the present invention.
  • the method is implemented by an electronic chip.
  • the method is as shown in FIG. 1 and includes the following steps. :
  • Step S101 dividing the number of threads into a plurality of thread number intervals, and dividing the voltage value into a plurality of voltage value intervals according to the magnitude of the voltage value;
  • Step S102 establishing a mapping relationship between a plurality of voltage value intervals and a thread number interval
  • step S103 the number of threads corresponding to the current core is obtained, and the corresponding thread number interval and the voltage value interval corresponding to the thread number interval are obtained according to the number of the threads, and the voltage of the core is adjusted to the voltage value interval.
  • the technical solution provided by the specific embodiment of the present invention divides the number of threads into a plurality of thread number intervals, divides the voltage value into a plurality of voltage value intervals according to the magnitude of the voltage value, and establishes a mapping relationship between the plurality of voltage value intervals and the thread number interval. Obtaining the number of threads corresponding to the current core, obtaining a corresponding thread number interval according to the number of threads, and a voltage value interval corresponding to the thread number interval, and adjusting the voltage of the core to the voltage value interval, so that the voltage is performed on the voltage
  • the advantages of effective control are provided by the specific embodiment of the present invention.
  • the foregoing method may further include:
  • the foregoing method may further include:
  • FIG. 2 is a system for multi-interval distribution of electronic chip voltage according to a second preferred embodiment of the present invention.
  • the system includes:
  • the dividing unit 201 is configured to divide the number of threads into a plurality of thread number intervals, and divide the voltage value into a plurality of voltage value intervals according to the magnitude of the voltage value;
  • the establishing unit 202 is configured to establish a mapping relationship between the plurality of voltage value intervals and the thread number interval;
  • the voltage unit 203 is configured to acquire the number of threads corresponding to the current core, obtain the corresponding thread number interval and the voltage value interval corresponding to the thread number interval according to the number of the threads, and adjust the voltage of the core to the voltage value interval.
  • the technical solution provided by the specific embodiment of the present invention divides the number of threads into a plurality of thread number intervals, divides the voltage value into a plurality of voltage value intervals according to the magnitude of the voltage value, and establishes a mapping relationship between the plurality of voltage value intervals and the thread number interval. Obtaining the number of threads corresponding to the current core, obtaining a corresponding thread number interval according to the number of threads, and a voltage value interval corresponding to the thread number interval, and adjusting the voltage of the core to the voltage value interval, so that the voltage is performed on the voltage
  • the advantages of effective control are provided by the specific embodiment of the present invention.
  • the above system may further include:
  • the adjusting unit 204 is configured to acquire a change value of the number of threads, and adjust a voltage of the core according to the change value.
  • the above system may further include:
  • the storage unit 205 is configured to record an operating voltage value of the core.
  • Computer readable media includes both computer storage media and communication media including any medium that facilitates transfer of a computer program from one location to another.
  • a storage medium may be any available media that can be accessed by a computer.
  • the computer readable medium may include random access memory (Random) Access Memory, RAM), Read-Only Memory (ROM), Electrically Erasable Programmable Read Only Memory (Electrically Erasable Programmable Read-Only Memory, EEPROM), Compact Disc Read-Only Memory, CD-ROM, or other optical disc storage, magnetic storage medium or other magnetic storage device, or any other medium that can be used to carry or store desired program code in the form of instructions or data structures and that can be accessed by a computer. Also. Any connection may suitably be a computer readable medium.
  • a disk and a disc include a compact disc (CD), a laser disc, a compact disc, a digital versatile disc (DVD), a floppy disk, and a Blu-ray disc, wherein the disc is usually magnetically copied, and the disc is The laser is used to optically replicate the data. Combinations of the above should also be included within the scope of the computer readable media.

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  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Power Sources (AREA)

Abstract

L'invention concerne un procédé et un système d'attribution d'une tension d'une puce électronique dans une pluralité d'intervalles. Le procédé comprend les étapes suivantes consistant à : diviser une quantité de fils en une pluralité d'intervalles de quantité de fils et diviser des valeurs de tension en une pluralité d'intervalles de valeurs de tension en fonction de l'intensité des valeurs de tension (S101) ; établir une relation de correspondance entre la pluralité d'intervalles de valeurs de tension et les intervalles de quantité de fils (S102) ; et obtenir la quantité de fils correspondant à un cœur actuel, obtenir en fonction de la quantité des fils l'intervalle de quantité de fils lui correspondant et l'intervalle de valeurs de tension correspondant à l'intervalle de quantité de fils et ajuster la tension du cœur à l'intervalle de valeurs de tension (S103). Le procédé et le système présentent l'avantage de réguler efficacement la tension.
PCT/CN2016/092035 2016-07-28 2016-07-28 Procédé et système d'attribution d'une tension d'une puce électronique dans une pluralité d'intervalles Ceased WO2018018491A1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
PCT/CN2016/092035 WO2018018491A1 (fr) 2016-07-28 2016-07-28 Procédé et système d'attribution d'une tension d'une puce électronique dans une pluralité d'intervalles

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/CN2016/092035 WO2018018491A1 (fr) 2016-07-28 2016-07-28 Procédé et système d'attribution d'une tension d'une puce électronique dans une pluralité d'intervalles

Publications (1)

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WO2018018491A1 true WO2018018491A1 (fr) 2018-02-01

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PCT/CN2016/092035 Ceased WO2018018491A1 (fr) 2016-07-28 2016-07-28 Procédé et système d'attribution d'une tension d'une puce électronique dans une pluralité d'intervalles

Country Status (1)

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WO (1) WO2018018491A1 (fr)

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7281097B1 (en) * 2004-06-30 2007-10-09 Emc Corporation Method of controlling the performance of a data storage system
CN102467220A (zh) * 2010-11-12 2012-05-23 英业达股份有限公司 电脑系统与其电源管理方法
CN102520784A (zh) * 2011-11-15 2012-06-27 浪潮电子信息产业股份有限公司 一种基于任务调度的raid卡电源自动降耗方法
CN103514029A (zh) * 2012-06-29 2014-01-15 索尼公司 线程处理装置和方法以及计算机系统
CN104866379A (zh) * 2014-02-24 2015-08-26 中兴通讯股份有限公司 一种多核处理器调度方法、装置及终端
US20160034310A1 (en) * 2014-07-30 2016-02-04 Empire Technology Development Llc Job assignment in a multi-core processor
CN105589504A (zh) * 2014-10-22 2016-05-18 中兴通讯股份有限公司 一种芯片核电压调节方法及装置
CN106227606A (zh) * 2016-07-28 2016-12-14 张升泽 多区间分配电子芯片电压的方法及系统

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7281097B1 (en) * 2004-06-30 2007-10-09 Emc Corporation Method of controlling the performance of a data storage system
CN102467220A (zh) * 2010-11-12 2012-05-23 英业达股份有限公司 电脑系统与其电源管理方法
CN102520784A (zh) * 2011-11-15 2012-06-27 浪潮电子信息产业股份有限公司 一种基于任务调度的raid卡电源自动降耗方法
CN103514029A (zh) * 2012-06-29 2014-01-15 索尼公司 线程处理装置和方法以及计算机系统
CN104866379A (zh) * 2014-02-24 2015-08-26 中兴通讯股份有限公司 一种多核处理器调度方法、装置及终端
US20160034310A1 (en) * 2014-07-30 2016-02-04 Empire Technology Development Llc Job assignment in a multi-core processor
CN105589504A (zh) * 2014-10-22 2016-05-18 中兴通讯股份有限公司 一种芯片核电压调节方法及装置
CN106227606A (zh) * 2016-07-28 2016-12-14 张升泽 多区间分配电子芯片电压的方法及系统

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