TWI883821B - Method for forming patterns - Google Patents
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- TWI883821B TWI883821B TW113105259A TW113105259A TWI883821B TW I883821 B TWI883821 B TW I883821B TW 113105259 A TW113105259 A TW 113105259A TW 113105259 A TW113105259 A TW 113105259A TW I883821 B TWI883821 B TW I883821B
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Abstract
Description
本發明是有關於一種形成圖案的方法,且特別是有關於一種在半導體製程中形成圖案的方法。The present invention relates to a method for forming a pattern, and more particularly to a method for forming a pattern in a semiconductor manufacturing process.
隨著電子裝置的尺寸不斷縮小且使用者對於電子裝置的性能的要求不斷提升,如何形成精細圖案已成為本領域技術人員亟欲努力的目標之一。As the size of electronic devices continues to shrink and users' requirements for the performance of electronic devices continue to increase, how to form fine patterns has become one of the goals that technical personnel in this field are eager to work on.
在目前的圖案化製程中,形成於欲圖案化之材料層上方的罩幕圖案通常會包括硬罩幕層,以使圖案化的材料層形成為具有優異輪廓的精細圖案。然而,在一些引用非等向性蝕刻(例如乾蝕刻)的圖案化製程中,硬罩幕層的側壁也會受到非等向性蝕刻的影響,使得硬罩幕層的寬度會因側蝕刻的情況嚴重而越來越小(側蝕刻的情況可能隨著蝕刻的時間越長而越來越嚴重),從而讓圖案無法良好地轉移至下方的材料層上。因此,本領域技術人員仍持續改善上述側蝕刻的情況。In the current patterning process, the mask pattern formed on the material layer to be patterned usually includes a hard mask layer, so that the patterned material layer is formed into a fine pattern with excellent profile. However, in some patterning processes that use anisotropic etching (such as dry etching), the sidewalls of the hard mask layer will also be affected by the anisotropic etching, so that the width of the hard mask layer will become smaller and smaller due to the severity of the side etching (the side etching may become more and more severe as the etching time increases), so that the pattern cannot be well transferred to the material layer below. Therefore, technical personnel in this field are still continuing to improve the above-mentioned side etching situation.
本發明提供一種形成圖案的方法,其藉由在硬罩幕圖案的側壁上形成保護層來減緩側蝕刻所造成的影響,如此在使用如非等向性蝕刻(例如乾蝕刻)等的圖案化製程中,能夠避免硬罩幕層因側蝕刻的情況嚴重而導致圖案無法良好地轉移至下方的材料層上。The present invention provides a method for forming a pattern, which mitigates the effect of side etching by forming a protective layer on the sidewalls of a hard mask pattern. In this way, in a patterning process using anisotropic etching (e.g., dry etching), it is possible to prevent the hard mask layer from being severely etched and causing the pattern to be poorly transferred to the underlying material layer.
本發明一實施例提供一種形成圖案的方法,其包括:於基礎層上形成第一材料層;於第一材料層上形成硬罩幕圖案,其中第一材料層的頂表面包括被硬罩幕圖案所暴露出來的區域;對硬罩幕圖案的頂表面和側壁以及第一材料層的區域進行表面處理,以形成保護材料層;移除保護材料層的形成於硬罩幕圖案的頂表面上的部分以及保護材料層的形成於第一材料層的區域上的部分,以於硬罩幕圖案的側壁上形成保護層;以及移除被保護層和硬罩幕圖案所暴露出之第一材料層,以形成暴露出基礎層的第一圖案。An embodiment of the present invention provides a method for forming a pattern, which includes: forming a first material layer on a base layer; forming a hard mask pattern on the first material layer, wherein the top surface of the first material layer includes an area exposed by the hard mask pattern; performing surface treatment on the top surface and side walls of the hard mask pattern and the area of the first material layer to form a protective material layer; removing a portion of the protective material layer formed on the top surface of the hard mask pattern and a portion of the protective material layer formed on the area of the first material layer to form a protective layer on the side walls of the hard mask pattern; and removing the first material layer exposed by the protective layer and the hard mask pattern to form a first pattern exposing the base layer.
在一些實施例中,表面處理包括氧化製程,且保護材料層包括氧化物。In some embodiments, the surface treatment includes an oxidation process, and the protective material layer includes an oxide.
在一些實施例中,氧化製程是將蝕刻腔室的溫度控制在20°C至60°C之間且於蝕刻腔室中通入含O 2和N 2的第一處理氣體。 In some embodiments, the oxidation process is performed by controlling the temperature of the etching chamber between 20° C. and 60° C. and introducing a first process gas containing O 2 and N 2 into the etching chamber.
在一些實施例中,移除保護材料層的形成於硬罩幕圖案的頂表面的部分以及保護材料層的形成於第一材料層的區域的部分的製程包括用於移除原生氧化物(native oxide)的清潔製程(cleaning process)。In some embodiments, the process of removing the portion of the protective material layer formed on the top surface of the hard mask pattern and the portion of the protective material layer formed in the region of the first material layer includes a cleaning process for removing native oxide.
在一些實施例中,清潔製程是在蝕刻腔室中進行的。In some embodiments, the cleaning process is performed in an etching chamber.
在一些實施例中,清潔製程包括在蝕刻腔室中通入含CF 4和Ar的第二處理氣體。 In some embodiments, the cleaning process includes introducing a second process gas containing CF4 and Ar into the etching chamber.
在一些實施例中,移除被保護層和硬罩幕圖案所暴露出之第一材料層是在所述蝕刻腔室中進行的。In some embodiments, removing the first material layer exposed by the protective layer and the hard mask pattern is performed in the etching chamber.
在一些實施例中,在移除被保護層和硬罩幕圖案所暴露出之第一材料層的步驟中,保護層也跟著被移除。In some embodiments, during the step of removing the first material layer exposed by the protective layer and the hard mask pattern, the protective layer is also removed.
在一些實施例中,在形成保護層之後,第一材料層包括形成於保護層下方的凹槽。In some embodiments, after forming the protection layer, the first material layer includes a groove formed under the protection layer.
在一些實施例中,第一圖案的頂部寬度小於硬罩幕圖案的寬度,且第一圖案的底部寬度約等於硬罩幕圖案的寬度。In some embodiments, a top width of the first pattern is less than a width of the hard mask pattern, and a bottom width of the first pattern is approximately equal to a width of the hard mask pattern.
基於上述,在上述形成圖案的方法中,形成在硬罩幕圖案的側壁上的保護層能夠減緩側蝕刻所造成的影響,如此在使用如非等向性蝕刻(例如乾蝕刻)等的圖案化製程中,能夠避免硬罩幕層因側蝕刻的情況嚴重而導致圖案無法良好地轉移至下方的材料層上。Based on the above, in the above-mentioned method for forming a pattern, the protective layer formed on the sidewall of the hard mask pattern can mitigate the effect caused by side etching, so that in a patterning process using anisotropic etching (such as dry etching), it can be avoided that the hard mask layer cannot be well transferred to the underlying material layer due to severe side etching.
參照本實施例之圖式以更全面地闡述本發明。然而,本發明亦可以各種不同的形式體現,而不應限於本文中所述之實施例。圖式中的層與區域的厚度會為了清楚起見而放大。相同或相似之參考號碼表示相同或相似之元件,以下段落將不再一一贅述。The present invention is more fully described with reference to the drawings of the present embodiment. However, the present invention may be embodied in various forms and should not be limited to the embodiments described herein. The thickness of layers and regions in the drawings are exaggerated for clarity. The same or similar reference numbers represent the same or similar elements, and the following paragraphs will not be repeated one by one.
應當理解,當諸如元件被稱為在另一元件「上」或「連接到」另一元件時,其可以直接在另一元件上或與另一元件連接,或者也可存在中間元件。若當元件被稱為「直接在另一元件上」或「直接連接到」另一元件時,則不存在中間元件。如本文所使用的,「連接」可以指物理及/或電性連接,而「電性連接」或「耦合」可為二元件間存在其它元件。本文中所使用的「電性連接」可包括物理連接(例如有線連接)及物理斷接(例如無線連接)。It should be understood that when an element is referred to as being "on" or "connected to" another element, it may be directly on or connected to another element, or there may be an intermediate element. If an element is referred to as being "directly on" or "directly connected to" another element, there are no intermediate elements. As used herein, "connection" may refer to physical and/or electrical connection, and "electrical connection" or "coupling" may be the presence of other elements between two elements. As used herein, "electrical connection" may include physical connection (e.g., wired connection) and physical disconnection (e.g., wireless connection).
本文使用的「約」、「近似」或「實質上」包括所提到的值和在所屬技術領域中具有通常知識者能夠確定之特定值的可接受的偏差範圍內的平均值,考慮到所討論的測量和與測量相關的誤差的特定數量(即,測量系統的限制)。例如,「約」可以表示在所述值的一個或多個標準偏差內,或±30%、±20%、±10%、±5%內。再者,本文使用的「約」、「近似」或「實質上」可依光學性質、蝕刻性質或其它性質,來選擇較可接受的偏差範圍或標準偏差,而可不用一個標準偏差適用全部性質。As used herein, "about", "approximately" or "substantially" includes the referenced value and the average value within an acceptable deviation range of a specific value that can be determined by a person of ordinary skill in the art, taking into account the measurement in question and the specific amount of error associated with the measurement (i.e., the limitations of the measurement system). For example, "about" can mean within one or more standard deviations of the stated value, or within ±30%, ±20%, ±10%, ±5%. Furthermore, as used herein, "about", "approximately" or "substantially" can select a more acceptable deviation range or standard deviation depending on the optical properties, etching properties or other properties, and can apply to all properties without a single standard deviation.
使用本文中所使用的用語僅為闡述例示性實施例,而非限制本揭露。在此種情形中,除非在上下文中另有解釋,否則單數形式包括多數形式。The terms used herein are used to describe exemplary embodiments only, rather than to limit the present disclosure. In this case, unless otherwise explained in the context, the singular form includes the plural form.
圖1至圖4是本發明一實施例的形成圖案的方法的剖面示意圖。1 to 4 are cross-sectional schematic views of a method for forming a pattern according to an embodiment of the present invention.
在一些實施例中,形成圖案的方法(如圖4所示的第一圖案114)可包括以下步驟。In some embodiments, a method of forming a pattern (such as the
首先,請參照圖1,於基礎層100上形成第一材料層110。First, referring to FIG. 1 , a
基礎層100可包括半導體基底和/或形成於半導體基底上的介電層和/或導體層。也就是說,基礎層100可為半導體基底和/或前段製程(front end of line,FEOL)和/或後段製程(back end of line,BEOL)中所形成之膜層和/或結構。舉例來說,基礎層100可包括半導體基底、內層介電層和/或接觸窗、層間介電層和/或介層窗(例如內連線結構)、主動元件(例如PMOS、NMOS、CMOS、JFET、BJT或二極體等元件)或驅動元件等構件。然而,為了方便說明起見,該些構件並未示出於圖式中。The
半導體基底中的半導體材料可包括元素半導體、合金半導體或化合物半導體。舉例而言,元素半導體可包括Si或Ge。合金半導體可包括SiGe、SiGeC等。化合物半導體可包括SiC、III-V族半導體材料或II-VI族半導體材料。III-V族半導體材料可包括GaN、GaP、GaAs、AlN、AlP、AlAs、InN、InP、InAs、GaNP、GaNAs、GaPAs、AlNP、AlNAs、AlPAs、InNP、InNAs、InPAs、GaAlNP、GaAlNAs、GaAlPAs、GaInNP、GaInNAs、GaInPAs、InAlNP、InAlNAs或InAlPAs。II-VI族半導體材料可包括CdS、CdSe、CdTe、ZnS、ZnSe、ZnTe、HgS、HgSe、HgTe、CdSeS、CdSeTe、CdSTe、ZnSeS、ZnSeTe、ZnSTe、HgSeS、HgSeTe、HgSTe、CdZnS、CdZnSe、CdZnTe、CdHgS、CdHgSe、CdHgTe、HgZnS、HgZnSe、HgZnTe、CdZnSeS、CdZnSeTe、CdZnSTe、CdHgSeS、CdHgSeTe、CdHgSTe、HgZnSeS、HgZnSeTe或HgZnSTe。半導體材料可摻雜有第一導電型的摻雜物或與第一導電型互補的第二導電型的摻雜物。舉例而言,第一導電型可為N型,而第二導電型可為P型。第一材料層110可包括SiCN。The semiconductor material in the semiconductor substrate may include an elemental semiconductor, an alloy semiconductor, or a compound semiconductor. For example, the elemental semiconductor may include Si or Ge. The alloy semiconductor may include SiGe, SiGeC, etc. The compound semiconductor may include SiC, a III-V semiconductor material, or a II-VI semiconductor material. The III-V semiconductor material may include GaN, GaP, GaAs, AlN, AlP, AlAs, InN, InP, InAs, GaNP, GaNAs, GaPAs, AlNP, AlNAs, AlPAs, InNP, InNAs, InPAs, GaAlNP, GaAlNAs, GaAlPAs, GaInNP, GaInNAs, GaInPAs, InAlNP, InAlNAs, or InAlPAs. Group II-VI semiconductor materials may include CdS, CdSe, CdTe, ZnS, ZnSe, ZnTe, HgS, HgSe, HgTe, CdSeS, CdSeTe, CdSTe, ZnSeS, ZnSeTe, ZnSTe, HgSeS, HgSeTe, HgSTe, CdZnS, CdZnS e. CdZnTe, CdHgS, CdHgSe, CdHgTe, HgZnS, HgZnSe, HgZnTe, CdZnSeS, CdZnSeTe, CdZnSTe, CdHgSeS, CdHgSeTe, CdHgSTe, HgZnSeS, HgZnSeTe or HgZnSTe. The semiconductor material may be doped with a first conductivity type dopant or a second conductivity type dopant complementary to the first conductivity type. For example, the first conductivity type may be N type and the second conductivity type may be P type. The
接著,於第一材料層110上形成硬罩幕圖案120,其中第一材料層110的頂表面包括被硬罩幕圖案120所暴露出來的區域。硬罩幕圖案120可包括富含矽的SiON(可表示為Si-SiON)。在一些實施例中,可藉由在第一材料層110上形成硬罩幕材料層(未示出),而後對該硬罩幕材料層進行圖案化製程來形成硬罩幕圖案120。Next, a
然後,請參照圖1和圖2,對硬罩幕圖案120的頂表面和側壁以及第一材料層110的被硬罩幕圖案120所暴露出來的區域進行表面處理,以形成保護材料層130。保護材料層130可共形地形成於硬罩幕圖案122的頂表面和側壁上以及第一材料層112的被硬罩幕圖案122的所暴露出來的頂表面上。在一些實施例中,表面處理可包括氧化製程,且保護材料層130可包括如氧化矽(SiOx)等的氧化物。在一些實施例中,氧化製程是將硬罩幕圖案120的鄰近頂表面和側壁的部分以及第一材料層110的鄰近被硬罩幕圖案120所暴露出來的頂表面的部分進行氧化,使得該些部分轉化為氧化物而形成包含該氧化物的保護材料層130。在一些實施例中,氧化製程例如是將蝕刻腔室的溫度控制在20°C至60°C之間且於蝕刻腔室中通入含O
2和N
2的第一處理氣體。在半導體製程中,諸如蝕刻等的減法製程(subtractive process)和諸如沉積等的加法製程(additive process)一般會在不同的腔室中進行,而形成保護材料層130的製程是排程在減法製程之後(例如圖案化硬罩幕材料層以形成硬罩幕圖案120),並且後續形成如圖3所示出之保護層132以及圖4所示出之第一圖案114也為減法製程,故在蝕刻腔室中形成保護材料層130可避免晶圓在兩個不同腔室間頻繁轉換而有諸如穩定性、良率、時間、成本等額外考量。
Then, referring to FIG. 1 and FIG. 2 , the top surface and sidewalls of the
而後,請參照圖2和圖3,移除保護材料層130的形成於硬罩幕圖案122的頂表面上的部分以及保護材料層130的形成於第一材料層112的部分,以於硬罩幕圖案122的側壁上形成保護層132。在一些實施例中,移除保護材料層130的形成於硬罩幕圖案122的頂表面的部分以及保護材料層130的形成於第一材料層112的部分的製程包括用於移除原生氧化物(native oxide)的清潔製程(cleaning process)。在一些實施例中,該清潔製程是在與形成保護材料層130相同的蝕刻腔室中進行的。在一些實施例中,該清潔製程包括在蝕刻腔室中通入含CF
4和Ar的第二處理氣體。在一些實施例中,在形成保護層132之後,第一材料層112包括形成於保護層132下方的凹槽(與由硬罩幕圖案122和保護層132所界定之開口OP連通)。
Then, referring to FIG. 2 and FIG. 3 , the portion of the
接著,請參照圖3和圖4,通過開口OP移除被保護層132和硬罩幕圖案122所暴露出之第一材料層112,以形成暴露出基礎層100的第一圖案114。形成在硬罩幕圖案122的側壁上的保護層132能夠減緩側蝕刻所造成的影響,如此在使用如非等向性蝕刻(例如乾蝕刻)等的圖案化製程中,能夠避免硬罩幕圖案122因側蝕刻的情況嚴重而導致圖案無法良好地轉移至下方的第一材料層112上。在一些實施例中,移除被保護層132和硬罩幕圖案122所暴露出之第一材料層112是在與形成保護材料層130相同的蝕刻腔室中進行的。在一些實施例中,在所形成之第一圖案114具有較高之寬高比(aspect ratio)的情況下,基於形成於硬罩幕圖案122之側壁上的保護層132能夠耐受嚴苛的蝕刻條件(例如蝕刻的時間較長),故即便在移除被保護層132和硬罩幕圖案122所暴露出之所述第一材料層112的步驟中,保護層132也跟著被移除,但保留下來的硬罩幕圖案124仍足夠將圖案良好地轉移至下方的材料層,使得所形成之第一圖案114具有期望之圖案或輪廓。在一些實施例中,第一圖案114的頂部寬度可小於硬罩幕圖案124的寬度,且第一圖案114的底部寬度可約等於硬罩幕圖案124的寬度。3 and 4, the
綜上所述,在上述實施例的形成圖案的方法中,形成在硬罩幕圖案的側壁上的保護層能夠減緩側蝕刻所造成的影響,如此在使用如非等向性蝕刻(例如乾蝕刻)等的圖案化製程中,能夠避免硬罩幕層因側蝕刻的情況嚴重而導致圖案無法良好地轉移至下方的材料層上。In summary, in the method for forming a pattern of the above-mentioned embodiment, the protective layer formed on the sidewall of the hard mask pattern can mitigate the influence caused by the side etching. Thus, in the patterning process using anisotropic etching (e.g., dry etching), it can be avoided that the hard mask layer cannot be well transferred to the underlying material layer due to severe side etching.
100:基礎層
110、112:第一材料層
114:第一圖案
120、122、124:硬罩幕圖案
130:保護材料層
132:保護層
OP:開口
100:
圖1至圖4是本發明一實施例的形成圖案的方法的剖面示意圖。1 to 4 are cross-sectional schematic views of a method for forming a pattern according to an embodiment of the present invention.
100:基礎層 100: Base layer
112:第一材料層 112: First material layer
122:硬罩幕圖案 122:Hard cover screen pattern
130:保護材料層 130: Protective material layer
Claims (9)
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| TWI883821B true TWI883821B (en) | 2025-05-11 |
| TW202534750A TW202534750A (en) | 2025-09-01 |
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| TW113105259A TWI883821B (en) | 2024-02-15 | 2024-02-15 | Method for forming patterns |
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Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20170316940A1 (en) * | 2016-02-19 | 2017-11-02 | Asm Ip Holding B.V. | Method for forming spacers using silicon nitride film for spacer-defined multiple patterning |
| TW201835377A (en) * | 2016-05-24 | 2018-10-01 | 蘭姆研究公司 | Deposition technique for sidewall passivation layer for high aspect ratio cylindrical etching |
| US20200411325A1 (en) * | 2019-06-28 | 2020-12-31 | Tokyo Electron Limited | Method and apparatus for processing a substrate |
| TW202312270A (en) * | 2021-05-21 | 2023-03-16 | 日商東京威力科創股份有限公司 | Cyclic plasma etching of carbon-containing materials |
| US20230280653A1 (en) * | 2022-02-24 | 2023-09-07 | Taiwan Semiconductor Manufacturing Company, Ltd. | Surface treatment to photosensitive layer |
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2024
- 2024-02-15 TW TW113105259A patent/TWI883821B/en active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20170316940A1 (en) * | 2016-02-19 | 2017-11-02 | Asm Ip Holding B.V. | Method for forming spacers using silicon nitride film for spacer-defined multiple patterning |
| TW201835377A (en) * | 2016-05-24 | 2018-10-01 | 蘭姆研究公司 | Deposition technique for sidewall passivation layer for high aspect ratio cylindrical etching |
| US20200411325A1 (en) * | 2019-06-28 | 2020-12-31 | Tokyo Electron Limited | Method and apparatus for processing a substrate |
| TW202312270A (en) * | 2021-05-21 | 2023-03-16 | 日商東京威力科創股份有限公司 | Cyclic plasma etching of carbon-containing materials |
| US20230280653A1 (en) * | 2022-02-24 | 2023-09-07 | Taiwan Semiconductor Manufacturing Company, Ltd. | Surface treatment to photosensitive layer |
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| Publication number | Publication date |
|---|---|
| TW202534750A (en) | 2025-09-01 |
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