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TWI894031B - Method for forming semiconductor device - Google Patents

Method for forming semiconductor device

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Publication number
TWI894031B
TWI894031B TW113141629A TW113141629A TWI894031B TW I894031 B TWI894031 B TW I894031B TW 113141629 A TW113141629 A TW 113141629A TW 113141629 A TW113141629 A TW 113141629A TW I894031 B TWI894031 B TW I894031B
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Taiwan
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semiconductor substrate
treatment
oxidation treatment
approximately
trench
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TW113141629A
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Chinese (zh)
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郭佳憲
江燁瑜
顏明正
李俊億
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力晶積成電子製造股份有限公司
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Priority to TW113141629A priority Critical patent/TWI894031B/en
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Publication of TWI894031B publication Critical patent/TWI894031B/en

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Abstract

The present disclosure provides a method for forming a semiconductor device, which includes following steps. A semiconductor substrate is placed into a processing tank. A processing solution is injected into the processing tank to a first level height of the processing tank, such that the semiconductor substrate is immersed in the processing solution completely. The semiconductor substrate is subjected to an oxidation treatment in a manner of standing in the processing solution so as to form an oxide layer on the semiconductor substrate. During the oxidation treatment, the temperature of the processing solution is maintained at about 65°C to about 85°C, and the time for the oxidation treatment is from about 50 minutes to about 100 minutes.

Description

形成半導體裝置的方法Method for forming semiconductor device

本發明是有關於一種形成半導體裝置的方法,且特別是有關於一種在半導體製程中對半導體基底進行修補的製程。The present invention relates to a method for forming a semiconductor device, and more particularly to a process for repairing a semiconductor substrate during a semiconductor manufacturing process.

在形成半導體裝置的製程中,通常會通過一道或多道半導體製程來於半導體基底中形成如隔離結構等用於界定主動區的結構或是形成如貫穿基底通孔(through substrate via,TSV)等用於電性連接的結構。然而,該些半導體製程通常包括對半導體基底進行如蝕刻等工藝,以於半導體基底中形成用於隔離結構的溝槽或是用於TSV的通孔孔洞,這將造成半導體基底在經受該工藝的表面受到一定程度的損傷。隨著電子裝置的尺寸不斷縮小且使用者對於電子裝置的性能的要求不斷提升,修補該損傷的工藝也逐漸受到重視。In the process of forming semiconductor devices, one or more semiconductor processes are typically used to form structures such as isolation structures used to define active areas, or structures such as through-substrate vias (TSVs) used for electrical connections, in a semiconductor substrate. However, these semiconductor processes typically involve etching the semiconductor substrate to form trenches for the isolation structures or through-hole holes for the TSVs. This can cause a certain degree of damage to the surface of the semiconductor substrate undergoing these processes. As the size of electronic devices continues to shrink and users' performance requirements for electronic devices continue to increase, processes for repairing this damage are becoming increasingly important.

本發明提供一種形成半導體裝置的方法,其藉由將半導體基底以靜置在處理液中的方式進行氧化處理,以於半導體基底的經受損傷的表面上形成所期望厚度之氧化層,如此一來,半導體基底的經受諸如蝕刻等工藝所造成的損傷能夠被有效地修補。The present invention provides a method for forming a semiconductor device. The method comprises performing an oxidation treatment on a semiconductor substrate by placing it in a treatment solution to form an oxide layer of a desired thickness on the damaged surface of the semiconductor substrate. In this way, damage to the semiconductor substrate caused by processes such as etching can be effectively repaired.

本發明一實施例提供一種形成半導體裝置的方法,其包括以下步驟:將半導體基底放置於處理槽中;於處理槽中注入處理液至處理槽的第一水平高度處,使得半導體基底完全浸泡在處理液中;以及半導體基底以靜置在處理液中的方式進行氧化處理,以於半導體基底上形成氧化層,其中在氧化處理期間,處理液的溫度維持在約65℃至約85℃,且氧化處理的時間在約50分鐘至約100分鐘。One embodiment of the present invention provides a method for forming a semiconductor device, comprising the following steps: placing a semiconductor substrate in a processing tank; injecting a processing liquid into the processing tank to a first level of the processing tank so that the semiconductor substrate is completely immersed in the processing liquid; and performing an oxidation treatment on the semiconductor substrate while stationary in the processing liquid to form an oxide layer on the semiconductor substrate, wherein during the oxidation treatment, the temperature of the processing liquid is maintained at approximately 65°C to approximately 85°C, and the oxidation treatment time is approximately 50 minutes to approximately 100 minutes.

在一些實施例中,氧化處理包含在對半導體基底進行的前段製程(front-end-of-line,FEOL)中和/或在對半導體基底進行的後段製程(back-end-of-line,BEOL)中。In some embodiments, the oxidation process is included in a front-end-of-line (FEOL) process performed on a semiconductor substrate and/or in a back-end-of-line (BEOL) process performed on a semiconductor substrate.

在一些實施例中,前段製程包括在半導體基底的前側形成用於淺溝渠隔離(STI)結構的溝渠,氧化處理是在形成溝渠之後進行,以對形成有溝渠之半導體基底的表面進行修補。In some embodiments, the front-end process includes forming trenches for a shallow trench isolation (STI) structure on the front side of a semiconductor substrate, and the oxidation treatment is performed after the trenches are formed to repair the surface of the semiconductor substrate having the trenches formed thereon.

在一些實施例中,後段製程包括在半導體基底的背側形成用於深溝渠隔離(DTI)結構的溝渠,氧化處理是在形成溝渠之後進行,以對形成有溝渠之半導體基底的表面進行修補。In some embodiments, the back-end of the line (BOOL) process includes forming trenches for a deep trench isolation (DTI) structure on the back side of a semiconductor substrate. The oxidation treatment is performed after the trenches are formed to repair the surface of the semiconductor substrate having the trenches formed thereon.

在一些實施例中,處理液由水和過氧化氫(H 2O 2)所構成。 In some embodiments, the treatment solution consists of water and hydrogen peroxide (H 2 O 2 ).

在一些實施例中,氧化層的厚度大於8 Å。In some embodiments, the thickness of the oxide layer is greater than 8 Å.

在一些實施例中,處理液通過超音波震盪器來將溫度維持在約65℃至約85℃,超音波震盪器的功率為其最大功率的50%至100%,最大功率為1200 W至2400 W。In some embodiments, the process fluid is maintained at a temperature of about 65° C. to about 85° C. by passing through an ultrasonic oscillator at 50% to 100% of its maximum power, which is 1200 W to 2400 W.

在一些實施例中,處理液通過微波(micro-wave)或線圈加熱的方式將溫度維持在約65℃至約85℃。In some embodiments, the process solution is maintained at a temperature of about 65° C. to about 85° C. by microwave or coil heating.

在一些實施例中,當處理液在氧化處理期間由第一水平高度降至低於第一水平高度的第二水平高度處時,形成半導體裝置的方法更包括於處理槽中注入額外的處理液至處理槽的第一水平高度處。In some embodiments, when the processing liquid drops from a first level to a second level lower than the first level during the oxidation process, the method of forming a semiconductor device further includes injecting additional processing liquid into the processing tank to the first level of the processing tank.

在一些實施例中,處理液通過額外注入的處理液來將溫度維持在約65℃至約85℃。In some embodiments, the process fluid is maintained at a temperature of about 65° C. to about 85° C. by additional injection of process fluid.

基於上述,在上述形成半導體裝置的方法中,其藉由將半導體基底以靜置在處理液中的方式進行氧化處理,以於半導體基底的經受損傷的表面上形成所期望厚度之氧化層。如此一來,半導體基底的經受諸如蝕刻等工藝所造成的損傷能夠被有效地修補。Based on the above, in the method for forming a semiconductor device, an oxidation treatment is performed by placing the semiconductor substrate in a treatment solution to form an oxide layer of a desired thickness on the damaged surface of the semiconductor substrate. In this way, damage to the semiconductor substrate caused by processes such as etching can be effectively repaired.

參照本實施例之圖式以更全面地闡述本發明。然而,本發明亦可以各種不同的形式體現,而不應限於本文中所述之實施例。圖式中的層與區域的厚度會為了清楚起見而放大。相同或相似之參考號碼表示相同或相似之元件,以下段落將不再一一贅述。The present invention will be more fully described with reference to the drawings of the present embodiment. However, the present invention may be embodied in a variety of forms and should not be limited to the embodiments described herein. The thicknesses of layers and regions in the drawings are exaggerated for clarity. Identical or similar reference numbers denote identical or similar elements, and their individual descriptions will not be repeated in the following paragraphs.

應當理解,當諸如元件被稱為在另一元件「上」或「連接到」另一元件時,其可以直接在另一元件上或與另一元件連接,或者也可存在中間元件。若當元件被稱為「直接在另一元件上」或「直接連接到」另一元件時,則不存在中間元件。如本文所使用的,「連接」可以指物理及/或電性連接,而「電性連接」或「耦合」可為二元件間存在其它元件。本文中所使用的「電性連接」可包括物理連接(例如有線連接)及物理斷接(例如無線連接)。It should be understood that when an element is referred to as being "on" or "connected to" another element, it can be directly on or connected to the other element, or intervening elements may be present. When an element is referred to as being "directly on" or "directly connected to" another element, there are no intervening elements. As used herein, "connected" can refer to physical and/or electrical connections, and "electrically connected" or "coupled" can mean the presence of other elements between two elements. As used herein, "electrically connected" can include physical connections (e.g., wired connections) and physical disconnections (e.g., wireless connections).

本文使用的「約」、「近似」或「實質上」包括所提到的值和在所屬技術領域中具有通常知識者能夠確定之特定值的可接受的偏差範圍內的平均值,考慮到所討論的測量和與測量相關的誤差的特定數量(即,測量系統的限制)。例如,「約」可以表示在所述值的一個或多個標準偏差內,或±30%、±20%、±10%、±5%內。再者,本文使用的「約」、「近似」或「實質上」可依光學性質、蝕刻性質或其它性質,來選擇較可接受的偏差範圍或標準偏差,而可不用一個標準偏差適用全部性質。As used herein, "about," "approximately," or "substantially" includes the stated value and the average within an acceptable range of deviation from the specified value that can be determined by one of ordinary skill in the art, taking into account the measurement in question and the specific amount of error associated with the measurement (i.e., the limitations of the measurement system). For example, "about" can mean within one or more standard deviations of the stated value, or within ±30%, ±20%, ±10%, or ±5%. Furthermore, as used herein, "about," "approximately," or "substantially" can be used to select a more acceptable range of deviation or standard deviation depending on the optical property, etching property, or other property, and may not apply to all properties without using a single standard deviation.

使用本文中所使用的用語僅為闡述例示性實施例,而非限制本揭露。在此種情形中,除非在上下文中另有解釋,否則單數形式包括多數形式。The terms used herein are for describing exemplary embodiments only and are not intended to limit the present disclosure. In this context, unless otherwise indicated in the context, the singular includes the plural.

圖1為本發明一實施例的形成半導體裝置的方法的流程圖。圖2A為本發明一實施例的形成半導體裝置的方法的剖面示意圖。圖2B為本發明再一實施例的形成半導體裝置的方法的剖面示意圖。圖2C為本發明另一實施例的形成半導體裝置的方法的剖面示意圖。圖2D為本發明又另一實施例的形成半導體裝置的方法的剖面示意圖。FIG1 is a flow chart of a method for forming a semiconductor device according to one embodiment of the present invention. FIG2A is a schematic cross-sectional view of a method for forming a semiconductor device according to one embodiment of the present invention. FIG2B is a schematic cross-sectional view of a method for forming a semiconductor device according to yet another embodiment of the present invention. FIG2C is a schematic cross-sectional view of a method for forming a semiconductor device according to yet another embodiment of the present invention. FIG2D is a schematic cross-sectional view of a method for forming a semiconductor device according to yet another embodiment of the present invention.

請參照圖1以及圖2A至圖2D中的任一者,在本實施例中,形成半導體裝置的方法可包括以下步驟。1 and any one of FIG. 2A to FIG. 2D , in this embodiment, a method for forming a semiconductor device may include the following steps.

首先,將半導體基底100放置於處理槽10中(步驟S1)。First, the semiconductor substrate 100 is placed in the processing tank 10 (step S1).

半導體基底100可包括半導體基底或半導體上覆絕緣體(semiconductor on insulator,SOI)基底。半導體基底或SOI基底中的半導體材料可包括元素半導體、合金半導體或化合物半導體。舉例而言,元素半導體可包括Si或Ge。合金半導體可包括SiGe、SiGeC等。化合物半導體可包括SiC、III-V族半導體材料或II-VI族半導體材料。III-V族半導體材料可包括GaN、GaP、GaAs、AlN、AlP、AlAs、InN、InP、InAs、GaNP、GaNAs、GaPAs、AlNP、AlNAs、AlPAs、InNP、InNAs、InPAs、GaAlNP、GaAlNAs、GaAlPAs、GaInNP、GaInNAs、GaInPAs、InAlNP、InAlNAs或InAlPAs。II-VI族半導體材料可包括CdS、CdSe、CdTe、ZnS、ZnSe、ZnTe、HgS、HgSe、HgTe、CdSeS、CdSeTe、CdSTe、ZnSeS、ZnSeTe、ZnSTe、HgSeS、HgSeTe、HgSTe、CdZnS、CdZnSe、CdZnTe、CdHgS、CdHgSe、CdHgTe、HgZnS、HgZnSe、HgZnTe、CdZnSeS、CdZnSeTe、CdZnSTe、CdHgSeS、CdHgSeTe、CdHgSTe、HgZnSeS、HgZnSeTe或HgZnSTe。半導體材料可摻雜有第一導電型的摻雜物或與第一導電型互補的第二導電型的摻雜物。舉例而言,第一導電型可為P型,而第二導電型可為N型。The semiconductor substrate 100 may include a semiconductor substrate or a semiconductor-on-insulator (SOI) substrate. The semiconductor material in the semiconductor substrate or SOI substrate may include an elemental semiconductor, an alloy semiconductor, or a compound semiconductor. For example, an elemental semiconductor may include Si or Ge. An alloy semiconductor may include SiGe, SiGeC, or the like. A compound semiconductor may include SiC, a III-V semiconductor material, or a II-VI semiconductor material. The III-V semiconductor material may include GaN, GaP, GaAs, AlN, AlP, AlAs, InN, InP, InAs, GaNPs, GaNAs, GaPAs, AlNPs, AlNAs, AlPAs, InNPs, InNAs, InPAs, GaAlNPs, GaAlNAs, GaAlPAs, GaInNPs, GaInNAs, GaInPAs, InAlNPs, InAlNAs, or InAlPAs. Group II-VI semiconductor materials may include CdS, CdSe, CdTe, ZnS, ZnSe, ZnTe, HgS, HgSe, HgTe, CdSeS, CdSeTe, CdSTe, ZnSeS, ZnSeTe, ZnSTe, HgSeS, HgSeTe, HgSTe, CdZnS, CdZnS e. CdZnTe, CdHgS, CdHgSe, CdHgTe, HgZnS, HgZnSe, HgZnTe, CdZnSeS, CdZnSeTe, CdZnSTe, CdHgSeS, CdHgSeTe, CdHgSTe, HgZnSeS, HgZnSeTe or HgZnSTe. The semiconductor material may be doped with a dopant of a first conductivity type or a dopant of a second conductivity type that is complementary to the first conductivity type. For example, the first conductivity type may be P-type and the second conductivity type may be N-type.

處理槽10可為任何適合置入處理液200的處理槽。舉例來說,處理槽10可由不與處理液200進行反應的材料製成。The processing tank 10 can be any processing tank suitable for placing the processing liquid 200. For example, the processing tank 10 can be made of a material that does not react with the processing liquid 200.

接著,於處理槽10中注入處理液200至處理槽10的第一水平高度LV1處,使得半導體基底100完全浸泡在處理液200中(步驟S2)。在一些實施例中,處理液200可包含氧化劑和溶液。舉例來說,在半導體基底100為矽基底的情況下,處理液200可包含水(H 2O)和過氧化氫(H 2O 2),而後續於步驟S3中所形成之氧化層可為氧化矽。在本實施例中,處理液200可由水(H 2O)和過氧化氫(H 2O 2)所構成。處理液200中的水和過氧化氫的體積比可為1:15或1:100。 Next, a treatment liquid 200 is injected into the treatment tank 10 to a first level LV1, completely immersing the semiconductor substrate 100 in the treatment liquid 200 (step S2). In some embodiments, the treatment liquid 200 may include an oxidizing agent and a solution. For example, if the semiconductor substrate 100 is a silicon substrate, the treatment liquid 200 may include water ( H2O ) and hydrogen peroxide ( H2O2 ), and the oxide layer subsequently formed in step S3 may be silicon oxide. In this embodiment, the treatment liquid 200 may be composed of water ( H2O ) and hydrogen peroxide ( H2O2 ). The volume ratio of water to hydrogen peroxide in the treatment liquid 200 may be 1:15 or 1:100.

然後,半導體基底100以靜置在處理液200中的方式進行氧化處理,以於半導體基底100上形成氧化層(步驟S3)。如此一來,半導體基底100在經受諸如蝕刻等工藝所造成的損傷的表面可被其上所形成之具有期望厚度的氧化層所修補。在本實施例中,氧化層的厚度為大於8 Å(例如8.35 Å或9.85 Å)。在本實施例中,在氧化處理期間,處理液200的溫度維持在約65℃至約85℃,且氧化處理的時間在約50分鐘至約100分鐘。由於半導體基底100是以靜置的方式在處理液200中進行氧化處理,故所形成之氧化層能夠增長至製程上必要的厚度(例如大於8 Å),而不會因為在循環流動槽中進行氧化處理而使得所形成之氧化層即便在相同處理溫度和處理時間下,也無法達到製程上必要的厚度(例如所形成之氧化層的厚度為小於8 Å的5.98 Å)。Then, the semiconductor substrate 100 is subjected to an oxidation treatment while stationary in the treatment solution 200 to form an oxide layer on the semiconductor substrate 100 (step S3). In this way, the surface of the semiconductor substrate 100 damaged by processes such as etching can be repaired by the oxide layer having a desired thickness formed thereon. In this embodiment, the thickness of the oxide layer is greater than 8 Å (e.g., 8.35 Å or 9.85 Å). In this embodiment, during the oxidation treatment, the temperature of the treatment solution 200 is maintained at approximately 65°C to approximately 85°C, and the oxidation treatment time is approximately 50 minutes to approximately 100 minutes. Since the semiconductor substrate 100 is oxidized in the treatment solution 200 in a static manner, the formed oxide layer can grow to the thickness required for the process (e.g., greater than 8 Å). This is different from the situation where the oxide layer formed in a circulating flow tank cannot reach the thickness required for the process (e.g., the thickness of the formed oxide layer is 5.98 Å, which is less than 8 Å) even at the same treatment temperature and treatment time.

所述氧化處理可包含在對半導體基底100進行的前段製程(FEOL)中和/或在對半導體基底100進行的後段製程(BEOL)中。基於上述氧化處理的溫度是在約65℃至約85℃下進行的,故很適合整合至前段製程和/或後段製程中,而不會對整體製程的熱預算(thermal budge)造成影響。The oxidation process may be included in the front-end-of-line (FEOL) process and/or the back-end-of-line (BEOL) process of the semiconductor substrate 100. Since the oxidation process is performed at a temperature of approximately 65°C to approximately 85°C, it is well suited for integration into the FEOL and/or BEOL processes without impacting the overall process thermal budget.

在一些實施例中,前段製程可包括在半導體基底100的前側形成用於淺溝渠隔離(STI)結構的溝渠,所述氧化處理是在形成所述溝渠之後進行,以對形成有所述溝渠之半導體基底100的表面進行修補。舉例來說,在形成互補式金屬氧化物半導體(complementary metal-oxide-semiconductor,CMOS)的製程中,該前段製程包含了在半導體基底100的前側中形成用來界定主動區的STI結構,其中用於該STI結構的溝渠是通過對半導體基底100進行蝕刻製程而形成的,然而,該製程會對半導體基底100的表面造成損傷,故在形成氧化襯層之前,可將半導體基底100以靜置在處理液200中的方式進行氧化處理,以於半導體基底100上形成能夠修補該損傷的氧化層。In some embodiments, the front-end process may include forming trenches for a shallow trench isolation (STI) structure on the front side of the semiconductor substrate 100. The oxidation treatment is performed after the trenches are formed to repair the surface of the semiconductor substrate 100 where the trenches are formed. For example, in the process of forming a complementary metal-oxide-semiconductor (CMOS), the front-end process includes forming an STI structure on the front side of a semiconductor substrate 100 to define an active region. The trenches used for the STI structure are formed by etching the semiconductor substrate 100. However, this process damages the surface of the semiconductor substrate 100. Therefore, before forming the oxide liner, the semiconductor substrate 100 can be subjected to an oxidation treatment by being statically placed in a treatment solution 200 to form an oxide layer on the semiconductor substrate 100 that can repair the damage.

在一些實施例中,後段製程可包括在半導體基底100的背側形成用於深溝渠隔離(DTI)結構的溝渠,所述氧化處理是在形成所述溝渠之後進行,以對形成有所述溝渠之半導體基底100的表面進行修補。舉例來說,在形成背照式(backside illumination,BSI)CMOS感測器的製程中,該後段製程包含了在半導體基底100的背側中形成用來界定像素陣列的DTI結構,其中用於該DTI結構的溝渠是通過對半導體基底100進行蝕刻製程而形成的,然而,該製程會對半導體基底100的表面造成損傷,故在形成高介電常數氧化層之前,可將半導體基底100以靜置在處理液200中的方式進行氧化處理,以於半導體基底100上形成能夠修補該損傷的氧化層。In some embodiments, the back-end process may include forming trenches for a deep trench isolation (DTI) structure on the back side of the semiconductor substrate 100. The oxidation treatment is performed after the trenches are formed to repair the surface of the semiconductor substrate 100 where the trenches are formed. For example, in the process of forming a backside illumination (BSI) CMOS sensor, the back-end process includes forming a DTI structure on the back side of the semiconductor substrate 100 to define a pixel array. The trenches used for the DTI structure are formed by etching the semiconductor substrate 100. However, this process will cause damage to the surface of the semiconductor substrate 100. Therefore, before forming the high-k oxide layer, the semiconductor substrate 100 can be subjected to an oxidation treatment by being statically placed in a processing solution 200 to form an oxide layer on the semiconductor substrate 100 that can repair the damage.

在一些實施例中,如圖2A所示,處理液200可通過超音波震盪器20來將所述溫度維持在約65℃至約85℃。在一些實施例中,超音波震盪器20的功率可為最大功率的50%至100%。在一些實施例中,最大功率可為1200 W至2400 W。在一些實施例中,處理液200可通過超音波震盪器20來將溫度維持在約80℃以上。In some embodiments, as shown in FIG2A , the processing liquid 200 may be maintained at a temperature of approximately 65° C. to approximately 85° C. by passing through an ultrasonic oscillator 20. In some embodiments, the power of the ultrasonic oscillator 20 may be 50% to 100% of the maximum power. In some embodiments, the maximum power may be 1200 W to 2400 W. In some embodiments, the processing liquid 200 may be maintained at a temperature above approximately 80° C. by passing through the ultrasonic oscillator 20.

在一些實施例中,如圖2B或圖2C所示,處理液200可通過微波(micro-wave)或線圈加熱的方式將溫度維持在約65℃至約85℃。舉例來說,可通過磁控管(magnetron)22所產生的微波來將處理液200的溫度維持在約65℃至約85℃(如圖2B所示),或者是可通過線圈加熱器24來將處理液200的溫度維持在約65℃至約85℃(如圖2C所示)。在一些實施例中,處理液200可通過磁控管22或線圈加熱器24來將溫度維持在約80℃以上。在一些實施例中,線圈加熱器24可設計為浸泡在處理液200中或可設計為配置在處理槽10外,本發明不以此為限。In some embodiments, as shown in FIG2B or FIG2C , the temperature of the processing liquid 200 can be maintained at approximately 65°C to approximately 85°C by microwave or coil heating. For example, the temperature of the processing liquid 200 can be maintained at approximately 65°C to approximately 85°C by microwaves generated by a magnetron 22 (as shown in FIG2B ), or by a coil heater 24 (as shown in FIG2C ). In some embodiments, the temperature of the processing liquid 200 can be maintained at approximately 80°C or above by the magnetron 22 or coil heater 24. In some embodiments, the coil heater 24 can be immersed in the processing liquid 200 or can be located outside the processing tank 10, but the present invention is not limited thereto.

在一些實施例中,如圖2B或圖2D所示,當處理液200在氧化處理期間由第一水平高度LV1降至低於第一水平高度LV1的第二水平高度LV2處時,形成半導體裝置的方法可更包括於處理槽10中注入額外的處理液至處理槽10的第一水平高度LV1處,如此可避免處理液200在氧化處理期間(處理時間約50分鐘至約100分鐘)因處理所使用的溫度較高(例如80℃或更高),造成處理液200揮發而導致液面下降從而造成半導體基底100暴露出來的問題。在一些實施例中,通過重新添加具有所期望之溫度的額外處理液,不僅可解決液面下降的問題,其還能夠使處理液200的溫度維持在約65℃至約85℃,故可省略前述用以維持溫度的設備。在一些實施例中,即便液面沒有下降的問題,也可通過重新添加具有所期望之溫度的額外處理液來使處理液200的溫度維持在約65℃至約85℃,而多餘的處理液200可從處理槽10的頂部溢出而不會改變半導體基底100以靜置的方式在處理液200中進行氧化處理的狀態。In some embodiments, as shown in FIG. 2B or 2D , when the processing liquid 200 drops from a first level LV1 to a second level LV2 lower than the first level LV1 during the oxidation treatment, the method for forming a semiconductor device may further include injecting additional processing liquid into the processing tank 10 to the first level LV1 of the processing tank 10. This can avoid the problem that the processing liquid 200 evaporates during the oxidation treatment (processing time is about 50 minutes to about 100 minutes) due to the high temperature used in the treatment (for example, 80° C. or higher), causing the liquid level to drop, thereby exposing the semiconductor substrate 100. In some embodiments, adding additional processing liquid at a desired temperature not only solves the problem of liquid level drop but also maintains the temperature of the processing liquid 200 at approximately 65°C to approximately 85°C, thereby eliminating the need for the aforementioned temperature maintenance equipment. In some embodiments, even if the liquid level does not drop, the temperature of the processing liquid 200 can be maintained at approximately 65°C to approximately 85°C by adding additional processing liquid at the desired temperature. Excess processing liquid 200 can overflow from the top of the processing tank 10 without disrupting the state in which the semiconductor substrate 100 is statically oxidized in the processing liquid 200.

綜上所述,在本發明實施例的形成半導體裝置的方法中,其藉由將半導體基底以靜置在處理液中的方式進行氧化處理,以於半導體基底的經受損傷的表面上形成所期望厚度之氧化層。如此一來,半導體基底的經受諸如蝕刻等工藝所造成的損傷能夠被有效地修補。In summary, in the method for forming a semiconductor device according to an embodiment of the present invention, an oxidation treatment is performed by placing a semiconductor substrate in a treatment solution to form an oxide layer of a desired thickness on the damaged surface of the semiconductor substrate. This effectively repairs damage to the semiconductor substrate caused by processes such as etching.

10:處理槽 20:超音波震盪器 22:磁控管 24:線圈加熱器 100:半導體基底 200:處理液 LV1:第一水平高度 LV2:第二水平高度 S1、S2、S3:步驟 10: Processing tank 20: Ultrasonic oscillator 22: Magnetron 24: Coil heater 100: Semiconductor substrate 200: Processing liquid LV1: First level LV2: Second level S1, S2, S3: Steps

圖1為本發明一實施例的形成半導體裝置的方法的流程圖。 圖2A為本發明一實施例的形成半導體裝置的方法的剖面示意圖。 圖2B為本發明再一實施例的形成半導體裝置的方法的剖面示意圖。 圖2C為本發明另一實施例的形成半導體裝置的方法的剖面示意圖。 圖2D為本發明又另一實施例的形成半導體裝置的方法的剖面示意圖。 Figure 1 is a flow chart of a method for forming a semiconductor device according to one embodiment of the present invention. Figure 2A is a schematic cross-sectional view of a method for forming a semiconductor device according to one embodiment of the present invention. Figure 2B is a schematic cross-sectional view of a method for forming a semiconductor device according to yet another embodiment of the present invention. Figure 2C is a schematic cross-sectional view of a method for forming a semiconductor device according to yet another embodiment of the present invention. Figure 2D is a schematic cross-sectional view of a method for forming a semiconductor device according to yet another embodiment of the present invention.

S1、S2、S3:步驟 S1, S2, S3: Steps

Claims (9)

一種形成半導體裝置的方法,包括:將半導體基底放置於處理槽中;於所述處理槽中注入處理液至所述處理槽的第一水平高度處,使得所述半導體基底完全浸泡在所述處理液中;以及所述半導體基底以靜置在所述處理液中的方式進行氧化處理,以於所述半導體基底上形成氧化層,其中在所述氧化處理期間,所述處理液的溫度維持在約65℃至約85℃,且所述氧化處理的時間在約50分鐘至約100分鐘,其中所述氧化處理包含在對所述半導體基底進行的前段製程(FEOL)中和/或在對所述半導體基底進行的後段製程(BEOL)中。A method for forming a semiconductor device includes: placing a semiconductor substrate in a processing tank; injecting a processing liquid into the processing tank to a first level of the processing tank so that the semiconductor substrate is completely immersed in the processing liquid; and performing an oxidation treatment on the semiconductor substrate while stationary in the processing liquid to form an oxide layer on the semiconductor substrate, wherein during the oxidation treatment, the temperature of the processing liquid is maintained at approximately 65° C. to approximately 85° C., and the oxidation treatment lasts for approximately 50 minutes to approximately 100 minutes, wherein the oxidation treatment is included in a front-end-of-line (FEOL) process and/or in a back-end-of-line (BEOL) process performed on the semiconductor substrate. 如請求項1所述的方法,其中所述前段製程包括在所述半導體基底的前側形成用於淺溝渠隔離(STI)結構的溝渠,所述氧化處理是在形成所述溝渠之後進行,以對形成有所述溝渠之所述半導體基底的表面進行修補。A method as described in claim 1, wherein the front-end process includes forming a trench for a shallow trench isolation (STI) structure on the front side of the semiconductor substrate, and the oxidation treatment is performed after the trench is formed to repair the surface of the semiconductor substrate where the trench is formed. 如請求項1所述的方法,其中所述後段製程包括在所述半導體基底的背側形成用於深溝渠隔離(DTI)結構的溝渠,所述氧化處理是在形成所述溝渠之後進行,以對形成有所述溝渠之所述半導體基底的表面進行修補。A method as described in claim 1, wherein the back-end process includes forming a trench for a deep trench isolation (DTI) structure on the back side of the semiconductor substrate, and the oxidation treatment is performed after the formation of the trench to repair the surface of the semiconductor substrate where the trench is formed. 如請求項1所述的方法,其中所述處理液由水和過氧化氫(H2O2)所構成。The method of claim 1, wherein the treatment solution consists of water and hydrogen peroxide (H 2 O 2 ). 如請求項1所述的方法,其中所述氧化層的厚度大於8 Å。The method of claim 1, wherein the thickness of the oxide layer is greater than 8 Å. 如請求項1所述的方法,其中所述處理液通過超音波震盪器來將所述溫度維持在約65℃至約85℃,所述超音波震盪器的功率為最大功率的50%至100%,所述最大功率為1200 W至2400 W。The method of claim 1, wherein the treatment liquid is passed through an ultrasonic oscillator to maintain the temperature at about 65°C to about 85°C, the power of the ultrasonic oscillator is 50% to 100% of the maximum power, and the maximum power is 1200 W to 2400 W. 如請求項1所述的方法,其中所述處理液通過微波(micro-wave)或線圈加熱的方式將所述溫度維持在約65℃至約85℃。The method of claim 1 , wherein the treatment solution is maintained at a temperature of about 65° C. to about 85° C. by microwave or coil heating. 如請求項1所述的方法,其中當所述處理液在所述氧化處理期間由所述第一水平高度降至低於所述第一水平高度的第二水平高度處時,所述方法更包括於所述處理槽中注入額外的處理液至所述處理槽的所述第一水平高度處。A method as described in claim 1, wherein when the treatment liquid drops from the first level to a second level lower than the first level during the oxidation treatment, the method further includes injecting additional treatment liquid into the treatment tank to the first level of the treatment tank. 如請求項8所述的方法,其中所述處理液通過額外注入的所述處理液來將所述溫度維持在約65℃至約85℃。The method of claim 8, wherein the treatment fluid is maintained at a temperature of about 65°C to about 85°C by additional injection of the treatment fluid.
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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW473856B (en) * 2001-02-07 2002-01-21 Taiwan Semiconductor Mfg Method for reducing particle contamination by controlling the polarity on the surface of wafer
JP2005311352A (en) * 2004-03-26 2005-11-04 Japan Science & Technology Agency Oxide film forming method, semiconductor device, semiconductor device manufacturing method and semiconductor device manufacturing apparatus, SiC substrate oxidation method, SiC-MOS type semiconductor device using the same, SiC-MOS type integrated circuit using the same, and SiC-MOS type semiconductor device and SiC-MOS type integrated circuit manufacturing apparatus
JP2007027453A (en) * 2005-07-19 2007-02-01 Osaka Univ Method for forming oxide film, semiconductor device provided with the oxide film, and method for manufacturing the same

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW473856B (en) * 2001-02-07 2002-01-21 Taiwan Semiconductor Mfg Method for reducing particle contamination by controlling the polarity on the surface of wafer
JP2005311352A (en) * 2004-03-26 2005-11-04 Japan Science & Technology Agency Oxide film forming method, semiconductor device, semiconductor device manufacturing method and semiconductor device manufacturing apparatus, SiC substrate oxidation method, SiC-MOS type semiconductor device using the same, SiC-MOS type integrated circuit using the same, and SiC-MOS type semiconductor device and SiC-MOS type integrated circuit manufacturing apparatus
JP2007027453A (en) * 2005-07-19 2007-02-01 Osaka Univ Method for forming oxide film, semiconductor device provided with the oxide film, and method for manufacturing the same

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