WO2017041485A1 - 薄膜晶体管及其制作方法、显示面板 - Google Patents
薄膜晶体管及其制作方法、显示面板 Download PDFInfo
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- WO2017041485A1 WO2017041485A1 PCT/CN2016/078671 CN2016078671W WO2017041485A1 WO 2017041485 A1 WO2017041485 A1 WO 2017041485A1 CN 2016078671 W CN2016078671 W CN 2016078671W WO 2017041485 A1 WO2017041485 A1 WO 2017041485A1
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- metal electrode
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/01—Manufacture or treatment
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
- H10D30/031—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
- H10D30/031—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT]
- H10D30/0312—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] characterised by the gate electrodes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/67—Thin-film transistors [TFT]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/67—Thin-film transistors [TFT]
- H10D30/6729—Thin-film transistors [TFT] characterised by the electrodes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/67—Thin-film transistors [TFT]
- H10D30/6729—Thin-film transistors [TFT] characterised by the electrodes
- H10D30/673—Thin-film transistors [TFT] characterised by the electrodes characterised by the shapes, relative sizes or dispositions of the gate electrodes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/67—Thin-film transistors [TFT]
- H10D30/6729—Thin-film transistors [TFT] characterised by the electrodes
- H10D30/6737—Thin-film transistors [TFT] characterised by the electrodes characterised by the electrode materials
- H10D30/6739—Conductor-insulator-semiconductor electrodes
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/60—Electrodes characterised by their materials
- H10D64/62—Electrodes ohmically coupled to a semiconductor
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/01—Manufacture or treatment
- H10D86/021—Manufacture or treatment of multiple TFTs
- H10D86/0212—Manufacture or treatment of multiple TFTs comprising manufacture, treatment or coating of substrates
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/01—Manufacture or treatment
- H10D86/021—Manufacture or treatment of multiple TFTs
- H10D86/0231—Manufacture or treatment of multiple TFTs using masks, e.g. half-tone masks
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
- H10D86/441—Interconnections, e.g. scanning lines
- H10D86/443—Interconnections, e.g. scanning lines adapted for preventing breakage, peeling or short circuiting
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
- H10D86/60—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices
Definitions
- the present invention relates to the field of display technologies, and in particular, to a thin film transistor, a method of fabricating the same, and a display panel including the same.
- a large number of thin film transistor switches are included in both the liquid crystal display panel and the organic light emitting diode display panel, and the electrodes in the thin film transistor are usually made of metal.
- An object of the present invention is to provide a thin film transistor, a method of fabricating the same, and a display panel including the same, which solves the problem of a short circuit caused by a recess in a metal pattern in the prior art.
- a portion of the first material layer that is not covered by the mask pattern is cleaned using a fluorine-containing solvent to form the groove pattern.
- the step of forming the metal electrode in the trench pattern comprises:
- a thin film transistor including a metal electrode on which a protective pattern is disposed, the protective pattern covering the metal electrode and an edge thereof.
Landscapes
- Electrodes Of Semiconductors (AREA)
- Thin Film Transistor (AREA)
Abstract
Description
Claims (12)
- 一种薄膜晶体管的制作方法,所述薄膜晶体管包括金属电极,所述制作方法包括形成所述金属电极的步骤,其中,形成所述金属电极的步骤包括:在衬底基板上形成第一材料层;对所述第一材料层进行图形化处理,在所述第一材料层中形成沟槽图形,所述沟槽图形与待形成的金属电极的图形相匹配;在所述沟槽图形中形成所述金属电极,使所述金属电极的边缘与所述沟槽图形的边缘之间具有间隙;在形成有所述金属电极的衬底基板上形成保护图形,所述保护图形覆盖所述金属电极及其边缘。
- 根据权利要求1所述的制作方法,其中,在形成有所述金属电极的衬底基板上形成保护图形的步骤包括:在形成有所述金属电极的衬底基板上形成保护层;对所述保护层进行加热,使所述保护层位于所述间隙中的部分断裂,形成覆盖所述金属电极及其边缘的第一部分和覆盖所述第一材料层的第二部分;去除所述第一材料层及位于其上的保护层的第二部分,得到覆盖所述金属电极及其边缘的保护图形。
- 根据权利要求1所述的制作方法,其中,所述第一材料层的材料能够溶于含氟溶剂,对所述第一材料层进行图形化处理的步骤包括:在所述第一材料层上形成光刻胶层,并对所述光刻胶层进行曝光和显影,以形成掩膜图形,所述掩膜图形包括与待形成的金属电极的图形相匹配的缺口;使用含氟溶剂对所述第一材料层上未被所述掩膜图形覆盖的部分进行清洗,形成所述沟槽图形。
- 根据权利要求3所述的制作方法,其中,在所述沟槽图形中形成所述金属电极的步骤包括:沉积金属层,使所述金属层的一部分位于所述沟槽图形中,另一部分位于所述掩膜图形上;剥离所述掩膜图形及位于其上的金属。
- 根据权利要求2所述的制作方法,其中,所述第一材料层的材料能够溶于含氟溶剂,去除所述第一材料层及位于其上的保护层的第二部分的步骤包括:使用含氟溶剂对所述第一材料层进行清洗,以去除所述第一材料层及位于其上的保护层的第二部分。
- 根据权利要求3至5中任意一项所述的制作方法,其中,所述含氟溶剂包括含N2-基团的氟基溶剂。
- 根据权利要求1至5中任意一项所述的制作方法,其中,制作所述保护图形的材料包括钼、铌、钛中的任意一种或上述金属的合金。
- 根据权利要求1至5中任意一项所述的制作方法,其中,制作所述金属电极的金属包括铜或铜的合金。
- 根据权利要求1至5中任意一项所述的制作方法,其中,所述金属电极包括栅极。
- 根据权利要求1至5中任意一项所述的制作方法,其中,所述金属电极包括源极和漏极。
- 一种薄膜晶体管,包括金属电极,其中,所述金属电极上 设置有保护图形,所述保护图形覆盖所述金属电极及其边缘。
- 一种显示面板,包括权利要求11所述的薄膜晶体管。
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US15/324,791 US10204933B2 (en) | 2015-09-07 | 2016-04-07 | Thin film transistor and method for manufacturing the same, and display panel |
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510563151.2 | 2015-09-07 | ||
| CN201510563151.2A CN105047568B (zh) | 2015-09-07 | 2015-09-07 | 薄膜晶体管及其制作方法、显示面板 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| WO2017041485A1 true WO2017041485A1 (zh) | 2017-03-16 |
Family
ID=54454015
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| PCT/CN2016/078671 Ceased WO2017041485A1 (zh) | 2015-09-07 | 2016-04-07 | 薄膜晶体管及其制作方法、显示面板 |
Country Status (3)
| Country | Link |
|---|---|
| US (1) | US10204933B2 (zh) |
| CN (1) | CN105047568B (zh) |
| WO (1) | WO2017041485A1 (zh) |
Families Citing this family (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105047568B (zh) * | 2015-09-07 | 2018-01-09 | 京东方科技集团股份有限公司 | 薄膜晶体管及其制作方法、显示面板 |
| CN106444293A (zh) * | 2016-09-27 | 2017-02-22 | 易美芯光(北京)科技有限公司 | 一种金属图形的制备方法 |
| MX2019004841A (es) | 2016-11-01 | 2019-08-29 | Cms Tech Inc | Sistemas y metodos para el mezclado mejorado de agentes en aplicaciones quimicas. |
| CN108010923B (zh) * | 2017-11-30 | 2020-01-03 | 深圳市华星光电半导体显示技术有限公司 | Tft基板制作方法 |
| CN109103206B (zh) * | 2018-08-22 | 2021-03-19 | 京东方科技集团股份有限公司 | 薄膜晶体管结构、阵列基板和薄膜晶体管结构的制造方法 |
| CN110211874B (zh) * | 2019-05-13 | 2021-07-23 | 深圳市华星光电半导体显示技术有限公司 | 薄膜晶体管的制备方法及薄膜晶体管 |
| KR102292282B1 (ko) * | 2021-01-13 | 2021-08-20 | 성균관대학교산학협력단 | 비등방성 기계적 팽창 기판 및 이를 이용한 크랙 기반 압력 센서 |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5714407A (en) * | 1994-03-31 | 1998-02-03 | Frontec Incorporated | Etching agent, electronic device and method of manufacturing the device |
| CN101752424A (zh) * | 2008-12-17 | 2010-06-23 | 财团法人工业技术研究院 | 薄膜晶体管 |
| CN102983157A (zh) * | 2012-11-29 | 2013-03-20 | 昆山工研院新型平板显示技术中心有限公司 | 一种铝栅极及其制备方法和包括该铝栅极的薄膜晶体管 |
| CN103293811A (zh) * | 2013-05-30 | 2013-09-11 | 京东方科技集团股份有限公司 | 一种阵列基板及其制作方法、显示装置 |
| CN105047568A (zh) * | 2015-09-07 | 2015-11-11 | 京东方科技集团股份有限公司 | 薄膜晶体管及其制作方法、显示面板 |
Family Cites Families (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1937250A (zh) * | 1998-11-17 | 2007-03-28 | 株式会社半导体能源研究所 | 制造半导体器件的方法 |
| JP4543385B2 (ja) * | 2005-03-15 | 2010-09-15 | 日本電気株式会社 | 液晶表示装置の製造方法 |
| US8426313B2 (en) * | 2008-03-21 | 2013-04-23 | Micron Technology, Inc. | Thermal anneal of block copolymer films with top interface constrained to wet both blocks with equal preference |
| DE102009038589B4 (de) | 2009-08-26 | 2014-11-20 | Heraeus Materials Technology Gmbh & Co. Kg | TFT-Struktur mit Cu-Elektroden |
| JP2012060628A (ja) * | 2010-08-07 | 2012-03-22 | Nippon Dempa Kogyo Co Ltd | 圧電デバイス及びその製造方法 |
| US8785911B2 (en) * | 2011-06-23 | 2014-07-22 | International Business Machines Corporation | Graphene or carbon nanotube devices with localized bottom gates and gate dielectric |
| US9054204B2 (en) * | 2012-01-20 | 2015-06-09 | Sony Corporation | Thin-film transistor, method of manufacturing the same, display unit, and electronic apparatus |
| KR101434452B1 (ko) | 2012-07-18 | 2014-08-26 | 엘지디스플레이 주식회사 | 표시장치용 어레이 기판 및 그의 제조방법 |
| US9190427B2 (en) * | 2013-05-30 | 2015-11-17 | Boe Technology Group Co., Ltd. | Array substrate and manufacturing method thereof, and display device |
| KR102081599B1 (ko) * | 2013-06-28 | 2020-02-26 | 엘지디스플레이 주식회사 | 액정표시장치용 어레이 기판 및 그 제조방법 |
| JP2015038925A (ja) * | 2013-08-19 | 2015-02-26 | 株式会社東芝 | 半導体装置 |
| JP6079502B2 (ja) * | 2013-08-19 | 2017-02-15 | ソニー株式会社 | 固体撮像素子および電子機器 |
-
2015
- 2015-09-07 CN CN201510563151.2A patent/CN105047568B/zh not_active Expired - Fee Related
-
2016
- 2016-04-07 WO PCT/CN2016/078671 patent/WO2017041485A1/zh not_active Ceased
- 2016-04-07 US US15/324,791 patent/US10204933B2/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5714407A (en) * | 1994-03-31 | 1998-02-03 | Frontec Incorporated | Etching agent, electronic device and method of manufacturing the device |
| CN101752424A (zh) * | 2008-12-17 | 2010-06-23 | 财团法人工业技术研究院 | 薄膜晶体管 |
| CN102983157A (zh) * | 2012-11-29 | 2013-03-20 | 昆山工研院新型平板显示技术中心有限公司 | 一种铝栅极及其制备方法和包括该铝栅极的薄膜晶体管 |
| CN103293811A (zh) * | 2013-05-30 | 2013-09-11 | 京东方科技集团股份有限公司 | 一种阵列基板及其制作方法、显示装置 |
| CN105047568A (zh) * | 2015-09-07 | 2015-11-11 | 京东方科技集团股份有限公司 | 薄膜晶体管及其制作方法、显示面板 |
Also Published As
| Publication number | Publication date |
|---|---|
| CN105047568A (zh) | 2015-11-11 |
| US20170207248A1 (en) | 2017-07-20 |
| CN105047568B (zh) | 2018-01-09 |
| US10204933B2 (en) | 2019-02-12 |
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