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WO2008096674A1 - 不揮発性半導体記憶装置及びその書き換え方法 - Google Patents

不揮発性半導体記憶装置及びその書き換え方法 Download PDF

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Publication number
WO2008096674A1
WO2008096674A1 PCT/JP2008/051654 JP2008051654W WO2008096674A1 WO 2008096674 A1 WO2008096674 A1 WO 2008096674A1 JP 2008051654 W JP2008051654 W JP 2008051654W WO 2008096674 A1 WO2008096674 A1 WO 2008096674A1
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WO
WIPO (PCT)
Prior art keywords
resistance
voltage
storage device
semiconductor storage
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/JP2008/051654
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English (en)
French (fr)
Inventor
Yasunari Hosoi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
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Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Priority to US12/525,615 priority Critical patent/US8139392B2/en
Publication of WO2008096674A1 publication Critical patent/WO2008096674A1/ja
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0007—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements comprising metal oxide memory material, e.g. perovskites
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5685—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using storage elements comprising metal oxide memory material, e.g. perovskites
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021—Auxiliary circuits
    • G11C13/0069—Writing or programming circuits or methods
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B63/00—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices
    • H10B63/20—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices comprising selection components having two electrodes, e.g. diodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B63/00—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices
    • H10B63/30—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices comprising selection components having three or more electrodes, e.g. transistors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/011—Manufacture or treatment of multistable switching devices
    • H10N70/021—Formation of switching materials, e.g. deposition of layers
    • H10N70/028—Formation of switching materials, e.g. deposition of layers by conversion of electrode material, e.g. oxidation
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/20—Multistable switching devices, e.g. memristors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/801—Constructional details of multistable switching devices
    • H10N70/821—Device geometry
    • H10N70/826—Device geometry adapted for essentially vertical current flow, e.g. sandwich or pillar type devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/801—Constructional details of multistable switching devices
    • H10N70/881—Switching materials
    • H10N70/883—Oxides or nitrides
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/801—Constructional details of multistable switching devices
    • H10N70/881—Switching materials
    • H10N70/883—Oxides or nitrides
    • H10N70/8833—Binary metal oxides, e.g. TaOx
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021—Auxiliary circuits
    • G11C13/0069—Writing or programming circuits or methods
    • G11C2013/0071—Write using write potential applied to access device gate
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021—Auxiliary circuits
    • G11C13/0069—Writing or programming circuits or methods
    • G11C2013/009—Write using potential difference applied between cell electrodes
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2213/00—Indexing scheme relating to G11C13/00 for features not covered by this group
    • G11C2213/10—Resistive cells; Technology aspects
    • G11C2213/15—Current-voltage curve
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2213/00—Indexing scheme relating to G11C13/00 for features not covered by this group
    • G11C2213/30—Resistive cell, memory material aspects
    • G11C2213/32—Material having simple binary metal oxide structure
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2213/00—Indexing scheme relating to G11C13/00 for features not covered by this group
    • G11C2213/30—Resistive cell, memory material aspects
    • G11C2213/34—Material includes an oxide or a nitride
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2213/00—Indexing scheme relating to G11C13/00 for features not covered by this group
    • G11C2213/70—Resistive array aspects
    • G11C2213/72—Array wherein the access device being a diode
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2213/00—Indexing scheme relating to G11C13/00 for features not covered by this group
    • G11C2213/70—Resistive array aspects
    • G11C2213/77—Array wherein the memory element being directly connected to the bit lines and word lines without any access device being used
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2213/00—Indexing scheme relating to G11C13/00 for features not covered by this group
    • G11C2213/70—Resistive array aspects
    • G11C2213/79—Array wherein the access device being a transistor

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Memories (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)

Abstract

　抵抗変化現象の統一的な現象把握に基づき構造設計された、精度高く安定した抵抗制御ができる信頼性の高い大規模な不揮発性半導体記憶装置を提供する。両端に電圧が印加されることで抵抗特性が遷移し、抵抗特性に応じて異なる情報が関連付けられることで情報の記憶が可能な可変抵抗素子を有するメモリセルを複数備えるメモリセルアレイ１１と、可変抵抗素子の一方の端子に直列に接続する負荷回路１４と、前記直列回路の両端に電圧を印加する電圧発生回路１７とを備える。可変抵抗素子が、負荷回路の負荷抵抗特性又は前記電圧発生回路からの発生電圧条件の何れか一方、又は双方を変更することで設定された遷移条件の下で電圧発生回路１４からの発生電圧が印加されると、少なくとも３つの異なる抵抗特性の中から選択される一の抵抗特性に対して選択的に遷移され、少なくとも３値の情報の記憶が可能に構成されている。
PCT/JP2008/051654 2007-02-09 2008-02-01 不揮発性半導体記憶装置及びその書き換え方法 Ceased WO2008096674A1 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US12/525,615 US8139392B2 (en) 2007-02-09 2008-02-01 Nonvolatile semiconductor memory device and writing method of the same

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2007-031168 2007-02-09
JP2007031168A JP4221031B2 (ja) 2007-02-09 2007-02-09 不揮発性半導体記憶装置及びその書き換え方法

Publications (1)

Publication Number Publication Date
WO2008096674A1 true WO2008096674A1 (ja) 2008-08-14

Family

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Country Status (3)

Country Link
US (1) US8139392B2 (ja)
JP (1) JP4221031B2 (ja)
WO (1) WO2008096674A1 (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
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WO2012102025A1 (ja) * 2011-01-27 2012-08-02 パナソニック株式会社 不揮発性記憶装置

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JP5201138B2 (ja) * 2007-06-15 2013-06-05 日本電気株式会社 半導体装置及びその駆動方法
JP4460646B2 (ja) 2008-06-03 2010-05-12 パナソニック株式会社 不揮発性記憶素子、不揮発性記憶装置、および不揮発性半導体装置
JP4485605B2 (ja) * 2008-09-30 2010-06-23 パナソニック株式会社 抵抗変化素子の駆動方法、初期処理方法、及び不揮発性記憶装置
US8179714B2 (en) 2008-10-21 2012-05-15 Panasonic Corporation Nonvolatile storage device and method for writing into memory cell of the same
JP4653260B2 (ja) 2009-04-10 2011-03-16 パナソニック株式会社 不揮発性記憶素子の駆動方法
JP4703789B2 (ja) * 2009-07-28 2011-06-15 パナソニック株式会社 抵抗変化型不揮発性記憶装置及びその書き込み方法
JP5121864B2 (ja) * 2010-03-02 2013-01-16 株式会社東芝 不揮発性半導体記憶装置
JP2012038387A (ja) * 2010-08-06 2012-02-23 Toshiba Corp 半導体記憶装置
US8723154B2 (en) * 2010-09-29 2014-05-13 Crossbar, Inc. Integration of an amorphous silicon resistive switching device
WO2012153488A1 (ja) * 2011-05-11 2012-11-15 パナソニック株式会社 クロスポイント型抵抗変化不揮発性記憶装置およびその読み出し方法
US9312029B2 (en) * 2014-03-10 2016-04-12 Macronix International Co., Ltd. Memory device and associated controlling method
US9425237B2 (en) * 2014-03-11 2016-08-23 Crossbar, Inc. Selector device for two-terminal memory
US9633724B2 (en) 2014-07-07 2017-04-25 Crossbar, Inc. Sensing a non-volatile memory device utilizing selector device holding characteristics
US10211397B1 (en) 2014-07-07 2019-02-19 Crossbar, Inc. Threshold voltage tuning for a volatile selection device
US9460788B2 (en) 2014-07-09 2016-10-04 Crossbar, Inc. Non-volatile memory cell utilizing volatile switching two terminal device and a MOS transistor
US10115819B2 (en) 2015-05-29 2018-10-30 Crossbar, Inc. Recessed high voltage metal oxide semiconductor transistor for RRAM cell
US10096362B1 (en) 2017-03-24 2018-10-09 Crossbar, Inc. Switching block configuration bit comprising a non-volatile memory cell
KR20230090009A (ko) * 2021-12-14 2023-06-21 삼성전자주식회사 보조 전원 장치를 포함하는 스토리지 장치 및 그의 동작 방법

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JP2004185756A (ja) * 2002-12-05 2004-07-02 Sharp Corp 不揮発性メモリ装置
JP2005235360A (ja) * 2004-01-20 2005-09-02 Sony Corp 記憶装置
JP2006202411A (ja) * 2005-01-20 2006-08-03 Sharp Corp 不揮発性半導体記憶装置及びその制御方法
WO2006137111A1 (ja) * 2005-06-20 2006-12-28 Fujitsu Limited 不揮発性半導体記憶装置及びその書き込み方法
WO2007007608A1 (ja) * 2005-07-12 2007-01-18 Sharp Kabushiki Kaisha 半導体記憶装置及びその製造方法
KR100657966B1 (ko) * 2005-08-11 2006-12-14 삼성전자주식회사 리셋 전류 안정화를 위한 메모리 소자의 제조 방법

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WO2012102025A1 (ja) * 2011-01-27 2012-08-02 パナソニック株式会社 不揮発性記憶装置

Also Published As

Publication number Publication date
JP4221031B2 (ja) 2009-02-12
US20100073983A1 (en) 2010-03-25
US8139392B2 (en) 2012-03-20
JP2008198275A (ja) 2008-08-28

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