TW201830370A - 電致發光顯示器中的像素電路 - Google Patents
電致發光顯示器中的像素電路 Download PDFInfo
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- TW201830370A TW201830370A TW106129039A TW106129039A TW201830370A TW 201830370 A TW201830370 A TW 201830370A TW 106129039 A TW106129039 A TW 106129039A TW 106129039 A TW106129039 A TW 106129039A TW 201830370 A TW201830370 A TW 201830370A
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- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/14—Digital output to display device ; Cooperation and interconnection of the display device with other functional units
- G06F3/1423—Digital output to display device ; Cooperation and interconnection of the display device with other functional units controlling a plurality of local displays, e.g. CRT and flat panel display
- G06F3/1446—Digital output to display device ; Cooperation and interconnection of the display device with other functional units controlling a plurality of local displays, e.g. CRT and flat panel display display composed of modules, e.g. video walls
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Abstract
一電路包含一電致發光(EL)裝置、一電晶體、一第一電容器及一第二電容器。所述電晶體包含耦接至第一節點的一閘極以及耦接至第二節點的一第一端。所述第一電容器耦接於供應電壓與該第一節點之間。所述第二電容器耦接於該第一節點和該第二節點之間。上述第一電容器與第二電容器用以回應一第一控制信號,以在電晶體的閘極建立與該電晶體之閾值電壓相關的一補償電壓,並回應一第二控制信號,以在該電晶體的第一端建立該補償電壓。上述電晶體用以使一電流流經該EL裝置。此外,所述電流的強度與該電晶體的閾值電壓無關。
Description
本發明是關於一種像素電路,特別是用於電致發光顯示器中的像素電路。
電致發光(EL)顯示器,譬如主動矩陣有機發光二極體(active matrix organic light emitting diode,AMOLED)顯示器,可包含一像素陣列。該像素陣列中的每一像素可包含一EL裝置、用以傳輸含有與亮度相關之資訊的一開關電晶體、以及用以驅動該EL裝置使其根據該資料而發光的一驅動電晶體。雖然此種EL顯示器具備電力消耗較低的優點,但半導體製備過程中的製程因素卻可能使多個像素間的顯示不均勻。因此,相關領域需要一種能夠解決上述問題的電路。
本發明實施例提出一種像素電路,其包含一電致發光(EL)裝置、一電晶體、一第一電容器及一第二電容器。所述電晶體包含包含一閘極和一端部,該閘極耦接至一第一節點,該端部耦接至一第二節點。所述第一電容器耦接於供應電壓與該第一節點之間。所述第二電容器耦接於該第一節點和該第二節點之間。上述第一電容器與第二電容器用以回應一第一控制信號,以在電晶體的閘極建立與該電晶體之閾值電壓相關的一補償電壓,並回應一第二控制信號,以在該電晶體之該端部建立該補償電壓。上述電晶體用以使一電流流經該EL裝置。此外,所述電流的強度與該電晶體的閾值電壓無關。 在一實施例中,該電路還包含另一電晶體,用以回應該第一控制信號,而重置該電晶體閘極的電壓位準。 在另一實施例中,該電路還包含另一電晶體,用以回應該第二控制信號,以接收與該EL裝置相關之資料。 在又一實施例中,該電路還包含另一電晶體,用以使該電流流經該EL裝置。 在另一實施例中,所述電流的強度是該第一與第二電容器每一者之電容的函數。 在一實施例中,該電晶體包含一p-型電晶體,且該電流可表示為:×(VDD-Vdata)]2
其中Isd表示該電流之強度,k為常數,C1及C2分別表示該第一與第二電晶體的電容,VDD表示供應電壓,且Vdata表示與該EL裝置相關之資料的電壓位準。 在又一實施例中,該電晶體包含一n-型電晶體,且該電流可表示為:×(Vdata-VSS)]2
其中Isd表示該電流之強度,k為一常數,C1及C2分別表示該第一與第二電晶體的電容,VSS表示供應電壓,且Vdata表示與該EL裝置相關之資料的電壓位準。 在又一實施例中,該第一控制信號的脈衝寬度為可調整的,且該第二控制信號的脈衝寬度與該顯示器的解析度相關。 本發明的某些實施例提供一電致發光顯示器,其包含一像素陣列。該些像素的每一像素包含一電致發光(EL)裝置、多個電晶體、一第一電容器及一第二電容器。所述多個電晶體之其中一電晶體包含一閘極和一端部,該閘極耦接至一第一節點,該端部耦接至一第二節點。所述第一電容器耦接於供應電壓與該第一節點之間。所述第二電容器耦接於該第一節點和該第二節點之間。上述第一電容器與第二電容器用以回應一第一控制信號,以在電晶體的閘極建立與該電晶體之閾值電壓相關的一補償電壓,並回應一第二控制信號,以在該電晶體之該端部建立該補償電壓。上述電晶體用以使一電流流經該EL裝置。此外,所述電流的強度與該電晶體的閾值電壓無關。 在一實施例中,該等電晶體中的一第一電晶體及一第四電晶體,分別用以回應一第三控制信號及一第四控制信號,而使所述電流流經該EL裝置。 在另一實施例中,該像素單元陣列包含位於該陣列第(N-1)列上的一第一像素單元,以及位於該陣列第N列上且緊鄰該第一像素單元的一第二像素單元,N為自然數。提供給該第一像素單元的所述第四控制信號係作為提供給該第二像素單元的第三控制信號。 本發明的實施例亦提供一種在電致發光(EL)顯示器中進行電壓補償的方法,所述的EL顯示器包含一像素單元陣列,每一像素單元包含多個電晶體、一第一電容器及一第二電容器。所述方法包含:回應一第一控制信號,以在該等電晶體的其中一電晶體之第一端建立與該電晶體之閾值電壓相關的一補償電壓;回應一第二控制信號,以在該電晶體的的閘極建立該補償電壓;回應一第三控制信號,以將與該EL裝置相關之資料儲存於該第一與第二電容器中;以及分別回應一第三控制信號與一第四控制信號,以使一電流透過該等電晶體中的一第一電晶體與一第四電晶體而流經該EL裝置。所述電流的強度與所述電晶體的閾值電壓無關。 在閱讀了下文實施方式以及附隨圖式時,能夠最佳地理解本揭露的多種態樣。應注意到,根據本領域的標準作業習慣,圖中的各種特徵並未依比例繪製。事實上,為了能夠清楚地進行描述,可能會刻意地放大或縮小某些特徵的尺寸。
以下揭示內容提供了多種實施方式或例示,其能用以實現本揭示內容的不同特徵。下文所述之元件與配置的具體例子係用以簡化本揭示內容。當可想見,這些敘述僅為例示,其本意並非用於限制本揭示內容。舉例來說,在下文的描述中,將一第一特徵形成於一第二特徵上或之上,可能包含某些實施例中所述的第一與第二特徵彼此直接接觸;且也可能包含某些實施例中還有額外的元件形成於上述第一與第二特徵之間,而使得第一與第二特徵可能沒有直接接觸。此外,本揭示內容可能會在多個實施例中重複使用元件符號和/或標號。此種重複使用乃是基於簡潔與清楚的目的,且其本身不代表所討論的不同實施例和/或組態之間的關係。 此外,當可理解,若將一部件描述為與另一部件「連接(connected to)」或「耦接(耦接至)」,則兩者可直接連接或耦接,或兩者間可能出現其他中間(intervening)部件。 在下文說明中,當一裝置屬於正緣觸發(Rising Edge Triggered; active high),係使一信號生效(asserted)而具有高邏輯值,以啟動該相應裝置。反之,使該信號失效(deasserted)而具有低邏輯值,以停用該相應裝置。然而當該裝置屬於負緣觸發(Falling Edge Triggered; active low)時,係使該信號生效而具有低邏輯值,以啟動該裝置,或使該信號失效而具有高邏輯值,以停用該裝置。 圖1為根據一實施例的顯示器10之區塊圖。顯示器10可以是電致發光(EL)顯示器,譬如主動矩陣有機發光二極體(AMOLED)顯示器,但並不以此為限。 參照圖1,顯示器10包含主動區域12、閘極驅動器14及源極驅動器15。主動區域12包含一像素單元P陣列,舉例來說,可將其排列成N行×M列的矩陣,其中N和M分別為正整數。閘極驅動器14經由N條掃描線(掃描線[1]至掃描線[N])將控制信號,例如第一控制信號S1、第二控制信號S2、第三控制信號EM1及第四控制信號EM2提供給N列像素單元P。源極驅動器15透過資料線DATA[1]至DATA[M],將資料提供給M行像素單元P中的一所選像素單元P。此外,一電源驅動器16在一電源中提供供應電壓VDD及VSS至該主動區域12,而一DC偏壓源則提供一參考電壓(Vref) 至該主動區域12,例如接地電壓。在一實施例中,供應電壓VDD約為5伏特(5V),另一供應電壓VSS約為-5V,而參考電壓Vref則約為0V。 主動區域12中每一像素單元P包含三個子像素單元20,其可用以顯示紅色(R)、綠色(G)及藍色(B)等三原色。在其他實施例中,例如,子像素渲染(sub-pixel rendering,SPR)感應器,子像素單元20的數目不限於三個。在本實施例中,三個子像素單元20係沿著列的方向排列。因此,源極驅動器15的資料線數目為3×M。 圖2為圖1所示顯示器10中一子像素單元20的例示性電路圖。 參照圖1和圖2,所述電路包含一EL裝置28、多個電晶體、一第一電容器C1與一第二電容器C2。舉例來說,EL裝置28包含一電流驅動部件,其可包含一有機發光二極體(organic light emitting diode,OLED)、微LED (micro LED)或量子點LED (quantum dot LED,QLED),而第一電容器C1與第二電容器C2作為儲存電容器。 多個電晶體包含第一電晶體T1、第二電晶體T2、第三電晶體T3、第四電晶體T4和第五電晶體T5。在本實施例中,多個電晶體中的每一個電晶體可以是薄膜電晶體(thin film transistor,TFT),例如p-型薄膜電晶體;或者是金氧半場效電晶體(metal-oxide-semiconductor field-effect transistor,MOSFET),例如p-型金氧半場效電晶體(PMOSFET)。 其中,第二電晶體T2的閘極用以接收第一控制信號S1,而第二電晶體T2的汲極耦接至第一節點A,此第一節點A連接於第一電容器C1與第二電容器C2之間。第三電晶體T3此的閘極係耦接至第一節點A,進而耦接至第二電晶體T2的汲極。第三電晶體T3的一端部(例如源極)係耦接至一第二節點B,此第二節點連接於第一電晶體T1與第二電容器C2之間,且第三電晶體T3的汲極分別耦接至第二電晶體T2的源極以及第四電晶體的汲極,進而耦接於EL裝置28。因此,第三電晶體T3可作為驅動電晶體,其可根據儲存於第一電容器C1與第二電容器C2中的資料來驅動EL裝置28。值得說明的是,本發明所述技術領域中具有通常知識者當可理解,MOS電晶體的汲極與源極端可互換,其係取決於施加於該處的電壓位準。 第五電晶體T5的汲極耦接至第二節點B,進而耦接至第三電晶體T3的源極。第五電晶體T5的閘極用以接收第二控制信號S2,且第五電晶體T5的源極用以回應該第二控制信號S2,並且從源極驅動器15接收一相應資料線上的資料(標記為"DATA")。除此之外,第一電晶體T1的汲極係耦接至第二節點B,進而分別耦接至第五電晶體T5的汲極以及第三電晶體T3的源極。第一電晶體T1的閘極用以接收第三控制信號EM1,而第一電晶體T1的源極用以接收供應電壓VDD。第四電晶體T4則是耦接至EL裝置28,其中第四電晶體T4的閘極用以接收第四控制信號EM2;第四電晶體T4的源極耦接至第三電晶體T3的汲極,進而耦接至第二電晶體T2的源極;以及第四電晶體T4的汲極耦接至EL裝置28的陽極,而EL裝置28的陰極接收另一供應電壓VSS。 所述的第一電容器C1的一端用以接收供應電壓VDD,另一端耦接至該第一節點A。此外,所述的第二電容器C2的一端耦接至該第一節點A,另一端耦接至該第二節點B。 圖3A及3B繪示根據某些實施例,在第一階段中,操作圖2所示電路20的方法。 參照圖3A和3B,在本實施例中,是以多個電晶體為p-型電晶體做為舉例說明,但並不以此為限。且第一控制信號S1、第二控制信號S2、第三控制信號EM1及第四控制信號EM2經設定為負緣觸發。在時間點t1,將第一控制信號S1拉至負緣,保持在高邏輯位準的第二與第三控制信號S2與EM1未經拉動,而第四控制信號EM2則保持在低邏輯位準。如此一來,參照圖3B,第二電晶體T2與第四電晶體T4被開啟,而第一電晶體T1與第五電晶體T5被關閉(圖中以"×"符號標記)。由於第二電晶體T2與第四電晶體T4是開啟的,第三電晶體T3之閘極電壓位準Vg被拉至VSS+,其中是該EL裝置28的閾值電壓。除此之外,第三電晶體T3的源極電壓位準Vs為VSS+,其中是驅動第三電晶體T3的閾值電壓。此外,在前一階段(即下文將參照圖5A與5B詳述的第三階段)中,Vg的電壓位準滿足Vg > VSS+,以便將電晶體T3保持在開啟狀態。 因此,在第一階段中,第一和第二電容回應第一控制信號S1,將第一節點A的電壓位準VA (或第三電晶體T3的閘極電壓位準Vg)重置為VSS+,並且建立一補償電壓(第一補償電壓),以將第二節點B的電壓位準VB(或第三電晶體T3的源極電壓位準Vs)拉至VSS+。其中,驅動第三電晶體T3的閾值電壓可作為另一補償電壓,而在第一階段中於第二節點B建立一補償電壓。藉由調整第一控制信號S1的脈衝寬度pw,使第二節點B的電壓位準VB(或第三電晶體T3的源極電壓位準Vs)達到理想的數值,即VSS+。第一控制信號S1的脈衝寬度pw係指第一控制信號S1保持觸發的時期,用以建立補償電壓的時間(也就是所謂的「補償時間」,且在此階段為第一補償時間),其和第一控制信號S1的脈衝寬度pw成正比。由於顯示畫面的更新頻率為60赫茲(Hz)或16.7毫秒(ms),屬於人類視力可以感知的範圍,可將顯示器的解析度定義為16.7 ms/N,其中N為顯示器中像素單元的列數。隨著顯示器越來越先進,N值會越來越大,使解析度越來越低,進而導致更為僵化的補償時間。在既有的顯示器中,較高的解析度可能意味著補償時間較短。由於第一控制信號S1的脈衝寬度pw為可調整的,本案的補償時間不會受限於顯示器的解析度。隨著補償時間變長,第二節點B的電壓位準VB會更接近第二電容器C2的飽和電壓,能夠改善補償時間僵化的問題,且可提升顯示器的顯示品質。 圖4A及4B繪示根據某些實施例,在第二階段中,操作圖2所示電路20的方法。 參照圖4A,在時間點t2,拉動第一與第二控制信號S1及S2,第三控制信號EM1保持在高邏輯位準,且第四控制信號EM2未經拉動。如此一來,參照圖4A和4B,第二電晶體T2與第五電晶體T5被開啟,第一電晶體T1與第四電晶體T4被關閉。由於第五電晶體T5被開啟,資料被寫入至第二節點B中。因此,第二節點B的電壓位準VB(或第三電晶體T3的源極電壓位準Vs)成為一資料電壓位準Vdata,此一資料電壓位準Vdata可使得EL裝置28相應地發光。此外,透過第二電容器C2的耦合作用,第一節點A的電壓位準VA(或第三電晶體T3的閘極電壓位準Vg)成為VDD-。運用第二電容器C2回應第二控制信號,以及以第三電晶體T3的源極-閘極跨壓(實質上等於閾值電壓)為基礎,可以有效地在第二節點B(或第三電晶體T3的源極)建立另一補償電壓(第二補償電壓),進而對第一節點A提供一第二補償。相較之下,對於不具備第二電容器C2的電路,當產生第二補償時,不會出現此種源極-閘極跨壓的基礎。因此,在本發明中所述第二電容器C2有助於有效率且快速的提供補償作用。 雖然上述的第一補償時間不會受到顯示器解析度的限制,但所述第二補償的補償時間則取決於解析度,且舉例來說,第二補償時間可能短於線路時間(等於16.7 ms/N)。此外,如同第一補償時間與第一控制信號S1的脈衝寬度成正比,所述第二補償時間和第二控制信號S2的脈衝寬度亦成正比。 圖5A及5B繪示根據某些實施例,在第三階段中,操作圖2所示電路20的方法。 參照圖5A,在時間點t3,第四控制信號EM2被拉動,且第三控制信號EM1處於低邏輯準位,而第一與第二控制信號S1與S2則未被拉動。如此一來,參照圖5B,第一電晶體T1與第四電晶體T4被開啟,且第二電晶體T2與第五電晶體T5為關閉。由於第一電晶體T1被開啟,使第二節點B的電壓位準VB(或第三電晶體T3的源極電壓位準Vs)成為VDD。當第二節點B的電壓位準VB在第一與第二電容器C1與C2的作用下從Vdata(第二階段)變為VDD(第三階段)時,第一節點A的電壓位準VA(或第三電晶體T3的閘極電壓位準Vg)成為Vdata-+[×(VDD-Vdata)],此式中C1與C2亦分別表示所述第一與第二電容器C1與C2的電容值。 此外,來自電源的電流Isd會透過第一電晶體T1、第三電晶體T3與第四電晶體T4從供應電壓VDD流經EL裝置28後,到達供應電壓VSS。所述電流Isd可以下列方程式(1)表示。 2
方程式(1) 其中k為常數。由於Vsg = Vs – Vg = VB – VA =+[×(VDD-Vdata)],將其代入方程式(1),可將電流Isd重新表示為下列方程式(2)。×(VDD-Vdata)]2
方程式(2) 由於方程式(2)不含Vth參數,可提升顯示器的顯示品質。 此外,值得說明的是,在此階段中第三電晶體T3的閘極電壓位準Vg滿足第一階段所示的Vg > VSS+,以便將第三電晶體T3保持在開啟狀態。 圖6是根據另一實施例,圖1所示之顯示器10中另一子像素單元60的電路圖。 參照圖6,所示電路與上文參照圖2所述者相似,不同之處例如在於,其省略了第二電容器C2的配置,因此形成一種五個電晶體-一個電容器(5T1C)的電路結構。所述的5T1C電路結構的作用方式和圖2所示的5T2C電路結構相同,差異在於其僅提供一次補償的功能。 圖7A繪示根據另一實施例,圖1所示的顯示器10中另一子像素單元70的電路圖。 參照圖7A,所示電路與上文參照圖2所示的電路20相似,不同之處例如在於,多個電晶體可利用n-型TFT或n-型金氧半場效電晶體(NMOS效FET)來取代圖2的p-型TFT或p-型金氧半場效電晶體(PMOSFET)。如圖7A和圖7B所示,具體來說,第二電晶體T2的閘極接收第一控制信號S1。第二電晶體T2的源極耦接至第一節點A。此外,第三電晶體T3的閘極耦接至第一節點A,進而耦接至第二電晶體T2的源極。第三電晶體T3的源極耦接至第二節點B,且第三電晶體T3的汲極耦接至第二電晶體T2的汲極。 請參照圖7A和7B。再者,第五電晶體T5的閘極接收一第二控制信號S2。第五電晶體T5的汲極回應此第二控制信號S2,而從源極驅動器接收一相應資料線上的資料(標記為"DATA")。第五電晶體T5的源極耦接至第二節點B,進而耦接至第三電晶體T3的源極。除此之外,第一電晶體T1的閘極接收一第三控制信號EM1,且第一電晶體T1的源極接收供應電壓VSS。而第一電晶體T1的汲極耦接至第二節點B,進而分別耦接至第五電晶體T5的源極以及第三電晶體T3的源極。又,第四電晶體T4的閘極接收第四控制信號EM2。第四電晶體T4的源極耦接至第三電晶體T3的汲極,進而耦接至第二電晶體T2的汲極。第四電晶體T4的汲極耦接至EL裝置28的陰極。EL裝置28的陽極接收另一供應電壓VDD。 第一電容器C1的一端用以接收供應電壓VSS,另一端耦接至第一節點A。此外,第二電容器C2的一端耦接至第一節點A,另一端耦接至第二節點B。 圖7B為根據某些實施例,用以操作圖7A所示電路之控制信號的時序圖。 參照圖7B,各個控制信號和前述圖3A、4A或5A所描述的內容相似,不同之處例如在於,在本實施例中的第一至第四控制信號S1、S2、EM1與EM2為正緣觸發,或於正緣生效。 請參照圖7A和7B,在操作上,於第一階段中,將第一節點A的電壓位準VA(或第三電晶體T3的閘極電壓位準Vg)重置為VDD-,而第二節點B的電壓位準VB(或第三電晶體T3的源極電壓位準Vs)會因為一第一補償而到達VDD-。此外,在第二階段中,第二節點B的電壓位準VB(第三電晶體T3的源極電壓位準Vs)被寫入至Vdata,且第一節點A的電壓位準VA (第三電晶體T3的閘極電壓位準Vg)會因為一第二補償而到達Vdata。其後,在第三階段中,第二節點B的電壓位準VB(第三電晶體T3的源極電壓位準Vs)成為VSS,而第一節點A的電壓位準VA (或第三電晶體T3的閘極電壓位準Vg)成為Vdata+[×(VSS-Vdata)]。 因此,可將流經EL裝置28的電流Isd表示為下列方程式(3)。 2
=×(Vdata-VSS)]2
方程式(3) 圖8是根據又另一實施例,圖1所示之顯示器10中另一子像素單元80的電路圖。 參照圖8,所示電路與上述圖7A所述者相似,不同之處例如在於,其省略了第二電容器C2的配置。這種5T1C電路結構的作用方式和圖7A所示的5T2C電路結構相同,差異之處在於其僅提供一次補償的功能。 圖9是根據一實施例,子像素單元的電路結構圖式。 參照圖9,所示的電路結構與前述圖2所述者類似,不同之處在於,沿著行方向排列的多個子像素單元中,對於相互串聯的兩個子像素單元而言,原先提供至前一列子像素單元的第三控制信號EM1可以作為位於下一列的子像素單元的第四控制信號EM2使用。因此,僅需提供三個控制信號源就能進行補償機制的調控。為了便於討論,此處僅例示性的繪示位於同一行的子像素單元90、91與92。具體而言,請對應參照圖1、圖2、圖3B、4B或5B,位於前一列的子像素單元的第四電晶體T4透過其閘極耦接於下一列的子像素單元的第一電晶體T1的閘極,而控制信號EM[n-1]、EM[n]、EM[n+1]分別對應於先前所述的第四控制信號EM2。如此一來,對第n列上之子像素單元91而言,除了控制信號S1[n], S2[n]以及EM[n]之外,位於第(n-1)列上之子像素單元90的EM控制信號EM[n-1]會提供到子像素單元91作為彩另一控制信號使用,達到讓子像素單元91接收四個控制信號並產生相應控制機制的作用。除此之外,對於子像素單元92而言,除了控制信號S1[n+1], S2[n+1]以及EM[n+1]之外,提供給子像素單元91的控制信號EM[n]亦可作為提供至子像素單元92 的另一控制信號使用。如此一來,可有效地簡化控制機制。 圖10為一流程圖,繪示在電致發光顯示器中進行電壓補償的方法。 參照圖10,在操作101,提供一電致發光(EL)顯示器。所述EL顯示器包含一像素陣列,像素陣列中的每一像素單元包含EL裝置、電晶體、第一電容器以及第二電容器。 接著,在操作103,回應一第一控制信號,而將電晶體閘極的電壓位準重置。在一實施例中,所述電晶體為p-型電晶體,且將閘極電壓Vg重置為VSS+。在另一實施例中,所述電晶體為n-型電晶體,且將閘極電壓Vg重置為VDD-。 在操作105,回應該第一控制信號,在該電晶體的一端建立與電晶體閾值電壓相關的一補償電壓。 之後,在操作106,回應一第二控制信號,在該電晶體之閘極建立該補償電壓。 在操作107,回應該第二控制信號,將與該EL裝置相關的資料儲存於第一與第二電容器中。 其後,在操作108,使電流透過電晶體流經所述EL裝置。上述電流的強度與所述電晶體的閾值電壓無關。 上文的敘述簡要地提出了本發明某些實施例之特徵,而使得本發明所屬技術領域具有通常知識者能夠更全面地理解本揭示內容的多種態樣。本發明所屬技術領域具有通常知識者當可明瞭,其可輕易地利用本揭示內容作為基礎,來設計或更動其他製程與結構,以實現與此處所述之實施方式相同的目的和/或達到相同的優點。本發明所屬技術領域具有通常知識者應當明白,這些均等的實施方式仍屬於本揭示內容之精神與範圍,且其可進行各種變更、替代與更動,而不會悖離本揭示內容之精神與範圍。
10‧‧‧顯示器
12‧‧‧主動區域
14‧‧‧閘極驅動器
15‧‧‧源極驅動器
16‧‧‧電源驅動器
20、90~92‧‧‧子像素單元
P‧‧‧像素單元陣列
28‧‧‧EL裝置
A、B‧‧‧節點
C1、C2‧‧‧電容器
DATA‧‧‧資料
pw‧‧‧脈衝寬度
T1~T5‧‧‧電晶體
S1~S2、EM1、EM2‧‧‧信號
Vref‧‧‧參考電壓
VDD‧‧‧工作電壓
VSS‧‧‧接地電壓
t1~t3‧‧‧時間點
Isd‧‧‧電流
101~108‧‧‧步驟
圖1為根據一實施例之顯示器的區塊圖。 圖2為圖1所示顯示器中一子像素單元的例示性電路圖。 圖3A及3B繪示根據某些實施例,於第一階段中操作圖2所示電路的方法。 圖4A及4B繪示根據某些實施例,於第二階段中操作圖2所示電路的方法。 圖5A及5B繪示根據某些實施例,於第三階段中操作圖2所示電路的方法。 圖6為根據另一實施例,圖1所示顯示器中一子像素單元的電路圖。 圖7A為根據又另一實施例,圖1所示顯示器中一子像素單元的電路圖。 圖7B為根據某些實施例,用以操作圖7A所示電路之控制信號的時序圖。 圖8為根據又另一實施例,圖1所示顯示器中一子像素單元的電路圖。 圖9為根據一實施例,一子像素單元的電路圖。 圖10為流程圖,其繪示在一電致發光顯示器中進行電壓補償的方法。
Claims (20)
- 一種像素電路,包含: 一電致發光(EL)裝置; 一電晶體,包含一閘極和一端部,該閘極耦接至一第一節點,該端部耦接至一第二節點; 一第一電容器,耦接於一供應電壓和該第一節點之間;以及 一第二電容器,耦接於該第一節點和該第二節點之間, 其中該第一電容器與該第二電容器用以回應一第一控制信號,以在該電晶體之該閘極建立與該電晶體之一閾值電壓相關的一補償電壓,以及回應一第二控制信號,以在該電晶體之該端部建立該補償電壓,以及 其中該電晶體係用以使一電流流經該EL裝置,該電流的強度與該電晶體之該閾值電壓無關。
- 如請求項1所述之電路,還包含另一電晶體,用以回應該第一控制信號,而重置該電晶體之該閘極的電壓位準。
- 如請求項1所述之電路,還包含另一電晶體,用以回應該第二控制信號,以接收與該EL裝置相關之資料。
- 如請求項1所述之電路,還包含另一電晶體,以使該電流流經該EL裝置。
- 如請求項1所述之電路,其中所述電流的強度為該第一與第二電容器各自之一電容的一函數。
- 如請求項1所述之電路,其中該電晶體包含一p-型電晶體,且該電流可表示為:×(VDD-Vdata)]2 其中Isd表示該電流之強度,k為常數,C1及C2分別表示該第一與第二電晶體的電容,VDD表示該供應電壓,且Vdata表示與該EL裝置相關之資料的一電壓位準。
- 如請求項1所述之電路,其中該電晶體包含一n-型電晶體,且該電流可表示為:×(Vdata-VSS)]2 其中Isd表示該電流之強度,k為一常數,C1及C2分別表示該第一與第二電晶體的電容,VSS表示該供應電壓,且Vdata表示與該EL裝置相關之資料的一電壓位準。
- 如請求項1所述之電路,其中該第一控制信號的一脈衝寬度為可調整的,且該第二控制信號的一脈衝寬度與該顯示器的解析度相關。
- 一電致發光(EL)顯示器,包含: 一像素單元陣列,每一像素單元包含: 一EL裝置; 多個電晶體,其中一電晶體包含一閘極和一端部,該閘極耦接至一第一節點,該端部耦接至一第二節點; 一第一電容器,耦接於一供應電壓和該第一節點之間;以及 一第二電容器,耦接於該第一節點和該第二節點之間, 其中該第一電容器與該第二電容器用以回應一第一控制信號,以在該電晶體之該閘極建立與該電晶體之一閾值電壓相關的一補償電壓,以及回應一第二控制信號,以在該電晶體之該端部建立該補償電壓,以及 其中該電晶體係用以使一電流流經該EL裝置,該電流的強度與該電晶體之該閾值電壓無關。
- 如請求項9所述之電致發光顯示器,該等電晶體中的另一電晶體用以回應該第一控制信號,而重置該電晶體之該閘極的一電壓位準。
- 如請求項9所述之電致發光顯示器,該等電晶體中的另一電晶體用以回應該第二控制信號,以接收與該EL裝置相關之資料。
- 如請求項9所述之電致發光顯示器,該等電晶體中的一第一電晶體及一第四電晶體,分別用以回應一第三控制信號及一第四控制信號,以使該電流流經該EL裝置。
- 如請求項12所述之電致發光顯示器,其中該像素單元陣列包含位於該陣列第(N-1)-列上之一第一像素單元,以及位於該陣列第N列上且緊鄰該第一像素單元之一第二像素單元,N為自然數,且其中提供給該第一像素單元的該第四控制信號係作為該第二像素單元的該第三控制信號。
- 如請求項9所述之電致發光顯示器,其中所述電流的強度為該第一與第二電容器各自之一電容的一函數。
- 如請求項9所述之電致發光顯示器,其中該電晶體包含一p-型電晶體,且該電流可表示為:×(VDD-Vdata)]2 其中Isd表示該電流之強度,k為一常數,C1及C2分別表示該第一與第二電晶體的電容,VDD表示該供應電壓,且Vdata表示與該EL裝置相關之資料的一電壓位準。
- 如請求項9所述之電致發光顯示器,其中該電晶體包含一n-型電晶體,且該電流可表示為:×(Vdata-VSS)]2 其中Isd表示該電流之強度,k為一常數,C1及C2 分別表示該第一與第二電晶體的電容,VSS表示該供應電壓,且Vdata表示與該EL裝置相關之資料的一電壓位準。
- 如請求項9所述之電致發光顯示器,其中該第一控制信號的一脈衝寬度為可調整的,且該第二控制信號的一脈衝寬度與該顯示器的解析度相關。
- 一種在一電致發光(EL)顯示器中進行電壓補償的方法,所述EL顯示器包含一像素單元陣列,每一像素單元包含一EL裝置、多個電晶體、一第一電容器及一第二電容器,該方法包含: 在該等電晶體的其中一電晶體之一第一端建立與該電晶體之一閾值電壓相關的一補償電壓,以回應一第一控制信號; 在該電晶體之一閘極建立該補償電壓,以回應一第二控制信號; 將與該EL裝置相關之資料儲存於該第一與第二電容器,以回應一第三控制信號;以及 使一電流透過該等電晶體中的一第一電晶體與一第四電晶體而流經該EL裝置體,以分別回應一第三控制信號與一第四控制信號,該電流的強度與該電晶體之該閾值電壓無關。
- 如請求項18所述之方法,其中該像素單元陣列包含位於該陣列第(N-1)-列上之一第一像素單元,以及位於該陣列第N列上且緊鄰該第一像素單元之一第二像素單元,N為自然數,該方法還包含: 利用提供給該第一像素單元的該第四控制信號係作為該第二像素單元的該第三控制信號。
- 如請求項19所述之方法,還包含: 提供該第一控制信號,其具有一可調整之脈衝寬度;以及 提供該第二控制信號,其具有一脈衝寬度,且該脈衝寬度與該EL顯示器的解析度相關。
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2017
- 2017-02-22 US US15/439,500 patent/US10475371B2/en active Active
- 2017-02-22 US US15/439,420 patent/US10431142B2/en active Active
- 2017-02-22 US US15/439,547 patent/US10535297B2/en active Active
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