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WO2010038886A1 - Procédé de dépôt d’une couche de nitrure de silicium, support de stockage lisible par ordinateur et dispositif de dépôt chimique en phase vapeur de plasma - Google Patents

Procédé de dépôt d’une couche de nitrure de silicium, support de stockage lisible par ordinateur et dispositif de dépôt chimique en phase vapeur de plasma Download PDF

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Publication number
WO2010038886A1
WO2010038886A1 PCT/JP2009/067303 JP2009067303W WO2010038886A1 WO 2010038886 A1 WO2010038886 A1 WO 2010038886A1 JP 2009067303 W JP2009067303 W JP 2009067303W WO 2010038886 A1 WO2010038886 A1 WO 2010038886A1
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gas
silicon nitride
nitride film
plasma cvd
film
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English (en)
Japanese (ja)
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大田尾修一郎
本多稔
鴻野真之
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Tokyo Electron Ltd
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Tokyo Electron Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/0217Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz
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    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
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    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/22Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
    • C23C16/30Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
    • C23C16/34Nitrides
    • C23C16/345Silicon nitride
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    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/455Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for introducing gases into reaction chamber or for modifying gas flows in reaction chamber
    • C23C16/45523Pulsed gas flow or change of composition over time
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/50Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating using electric discharges
    • C23C16/511Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating using electric discharges using microwave discharges
    • HELECTRICITY
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    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02205Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition
    • H01L21/02208Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
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    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
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    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H01L21/02274Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
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    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/69IGFETs having charge trapping gate insulators, e.g. MNOS transistors
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    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/60Electrodes characterised by their materials
    • H10D64/66Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/68Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator
    • H10D64/681Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator having a compositional variation, e.g. multilayered
    • H10D64/685Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator having a compositional variation, e.g. multilayered being perpendicular to the channel plane
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    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/60Electrodes characterised by their materials
    • H10D64/66Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/68Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator
    • H10D64/693Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator the insulator comprising nitrogen, e.g. nitrides, oxynitrides or nitrogen-doped materials
    • H10P14/6681
    • H10P14/69433
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    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/01Manufacture or treatment
    • H10D64/031Manufacture or treatment of data-storage electrodes
    • H10D64/035Manufacture or treatment of data-storage electrodes comprising conductor-insulator-conductor-insulator-semiconductor structures
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    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/01Manufacture or treatment
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    • H10D64/037Manufacture or treatment of data-storage electrodes comprising charge-trapping insulators
    • H10P14/6336
    • H10P14/6682

Definitions

  • the present invention relates to a method of forming a silicon nitride film, a computer readable storage medium used in this method, and a plasma CVD apparatus.
  • non-volatile semiconductor memory devices represented by EEPROM (Electrically Erasable and Programmable ROM) and the like capable of electrically rewriting operation include SONOS (Silicon-Oxide-Nitride-Oxide-Silicon) type and MONOS (Metal-Oxide-). Some have a laminated structure called Nitride-Oxide-Silicon type. In these types of nonvolatile semiconductor memory devices, holding of information is performed with one or more silicon nitride films (Nitride) sandwiched between silicon dioxide films (Oxide) as charge storage regions.
  • EEPROM Electrically Erasable and Programmable ROM
  • SONOS Silicon-Oxide-Nitride-Oxide-Silicon
  • MONOS Metal-Oxide-
  • the non-volatile semiconductor memory device described above a voltage is applied between the semiconductor substrate (Silicon) and the control gate electrode (Silicon or Metal) to inject electrons into the silicon nitride film of the charge storage region and data is stored. Data is stored and erased by rewriting or removing electrons accumulated in the silicon nitride film.
  • the data write characteristic is related to the ease of electron injection into the silicon nitride film which is the charge storage region, and in particular to the charge trapping center (trap) present in the silicon nitride film. It is believed that there is.
  • Patent Document 1 As a technology relating to a nonvolatile semiconductor memory device, in Patent Document 1, a transition layer containing a large amount of Si is provided in the middle portion of these films for the purpose of increasing the trap density at the interface between the silicon nitride film and the top oxide film. It is described.
  • the device structure of nonvolatile semiconductor memory devices is also rapidly miniaturized.
  • the film forming method by the low pressure CVD method or the thermal CVD method it is technically difficult to control the trap formation in the film in the process of forming the silicon nitride film.
  • the goal is to form a dense silicon film having few defects, which is often used as a hard mask or a stopper film for etching.
  • many traps are formed in the formed silicon nitride film by setting the processing pressure in the processing container to a high vacuum state (for example, 3 Pa or less) to strengthen the ionicity of plasma. was considered possible.
  • the present invention has been made in view of the above situation, and its first object is to provide a method of forming a silicon nitride film having many traps, which can be used as a charge storage layer by plasma CVD. It is.
  • a second object of the present invention is to provide a method of forming a film by laminating silicon nitride films different in the number of traps of individual silicon nitride films by plasma CVD.
  • the method for forming a silicon nitride film according to the present invention uses a plasma CVD apparatus that generates a plasma by introducing microwaves into a processing container with a planar antenna having a plurality of holes, and nitrides the object to be processed by plasma CVD.
  • a method of forming a silicon nitride film for forming a silicon film comprising: The pressure in the processing vessel is set in the range of 10 Pa to 133.3 Pa, and the electrode of the mounting table on which the object to be processed is mounted is 0.009 W / cm 2 to 0.64 W / cm per area of the object to be processed.
  • Silicon nitride film by performing plasma CVD using a film forming gas containing a silicon-containing compound gas and a nitrogen gas while supplying a high frequency power with a power density within the range of 2 or less and applying a high frequency bias to the object And the process of forming the
  • the method for forming a silicon nitride film according to the present invention uses a plasma CVD apparatus for generating plasma by introducing microwaves into a processing container by a planar antenna having a plurality of holes, and plasma CVD method on a processing object Forming a silicon nitride film by laminating the silicon nitride film by
  • the pressure in the processing vessel is set in the range of 10 Pa to 133.3 Pa, and the electrode of the mounting table on which the object to be processed is mounted is 0.009 W / cm 2 to 0.64 W / cm per area of the object to be processed.
  • Silicon nitride film by performing plasma CVD using a film forming gas containing a silicon-containing compound gas and a nitrogen gas while supplying a high frequency power with a power density within the range of 2 or less and applying a high frequency bias to the object
  • a first step of forming The high frequency power is not supplied to the electrode of the mounting table at the same set pressure as the first step, or the high frequency power is supplied at an output density different from the first step to apply the high frequency bias to the object
  • plasma CVD using a film forming gas containing a silicon-containing compound gas and a nitrogen gas, a silicon nitride film in which the number of traps is smaller than that of the silicon nitride film formed in the first step is formed.
  • the computer-readable storage medium of the present invention is a computer-readable storage medium storing a control program that operates on a computer.
  • the control program forms a silicon nitride film by a plasma CVD method using a plasma CVD apparatus which generates a plasma by introducing a microwave into a processing container by a planar antenna having a plurality of holes at the time of execution.
  • the plasma is supplied to the computer such that plasma CVD is performed using a film forming gas containing a silicon-containing compound gas and a nitrogen gas while supplying a high frequency power at a power density within the range and applying a high frequency bias to the object It controls the CVD apparatus.
  • the plasma CVD apparatus of the present invention is a plasma CVD apparatus for forming a silicon nitride film on an object to be processed by plasma CVD method.
  • a processing vessel having an open top for containing the object to be treated;
  • a mounting table which is disposed in the processing container and on which the object to be processed is mounted;
  • An electrode provided in the mounting table and applying high frequency power to the object;
  • a high frequency power supply connected to the electrode;
  • a planar antenna provided above the dielectric member and having a plurality of holes for introducing microwaves into the processing vessel;
  • a gas introduction unit connected to a gas supply mechanism for supplying a film forming gas containing a silicon-containing compound gas and a nitrogen-containing gas into the processing container;
  • An exhaust mechanism for depressurizing and exhausting the inside of the processing container;
  • the high frequency power is supplied from the high frequency power supply to the electrode with an output in the range of 0.009 W / cm 2 or more and 0.
  • the object to be processed is mounted by using the plasma CVD apparatus which generates the plasma by introducing the microwave into the processing container by the planar antenna having the plurality of holes.
  • a silicon nitride film with a large number of traps can be formed by performing plasma CVD at a processing pressure of 10 Pa or more and 133.3 Pa or less while applying high frequency power to the table.
  • the risk of apparatus load and contamination can be reduced as compared with film formation in a high vacuum state of 3 Pa or less, and good coverage performance in forming a silicon nitride film can be maintained.
  • the silicon nitride film formed by the method of the present invention is suitable for use as a charge storage layer since the distribution of traps is uniform.
  • silicon nitride films having different numbers of traps can be alternately stacked easily by an operation of simply switching on / off high frequency power applied to the mounting table.
  • the semiconductor memory device can be formed and can be applied to a semiconductor memory device excellent in data write characteristics.
  • FIG. 1 is a schematic cross-sectional view showing an example of a plasma CVD apparatus suitable for forming a silicon nitride film.
  • FIG. 2 is a drawing showing the structure of a planar antenna.
  • FIG. 3 is an explanatory view showing the configuration of the control unit.
  • FIG. 4 is a drawing showing an example of steps of the method for forming a silicon nitride film according to the first embodiment.
  • FIG. 5 is a drawing for explaining the measurement method of Vfb hysteresis, in which (a) is a schematic explanatory view of a capacitor used for the measurement, and (b) is a drawing showing a CV curve.
  • FIG. 1 is a schematic cross-sectional view showing an example of a plasma CVD apparatus suitable for forming a silicon nitride film.
  • FIG. 2 is a drawing showing the structure of a planar antenna.
  • FIG. 3 is an explanatory view showing the configuration of the control unit.
  • FIG. 4 is
  • FIG. 6 is a graph showing measurement results of RF bias power, film refractive index, wet etching rate and Vfb hysteresis when forming a silicon nitride film.
  • FIG. 7 is a graph showing measurement results of Ar flow rate at the time of forming a silicon nitride film and Vfb hysteresis of the film.
  • FIG. 8 is a drawing showing an example of steps of a method of manufacturing a silicon nitride film laminate according to the second embodiment.
  • FIG. 9 is an explanatory view showing a schematic configuration of a MOS semiconductor memory device to which the method of the present invention can be applied.
  • FIG. 1 is a cross-sectional view schematically showing a schematic configuration of a plasma CVD apparatus 100 that can be used for the method of manufacturing a silicon nitride film of the present invention.
  • the plasma CVD apparatus 100 is a flat antenna having a plurality of slot-like holes, in particular, by introducing microwaves into a processing container with a RLSA (Radial Line Slot Antenna) to generate plasma, the plasma CVD apparatus 100 is highly effective.
  • the apparatus is configured as an RLSA microwave plasma processing apparatus capable of generating a microwave excited plasma with low density and low electron temperature.
  • the plasma CVD apparatus 100 can perform processing by plasma having a plasma density of 1 ⁇ 10 10 to 5 ⁇ 10 12 / cm 3 and a low electron temperature of 0.7 to 2 eV. Therefore, the plasma CVD apparatus 100 can be suitably used for the purpose of film formation processing of a silicon nitride film by plasma CVD in the manufacturing process of various semiconductor devices.
  • the plasma CVD apparatus 100 mainly includes an airtightly configured processing vessel 1, a gas introducing unit 14 connected to a gas supply mechanism 18 for supplying a gas into the processing vessel 1 via a gas introducing pipe 22, 15, an exhaust mechanism including an exhaust device 24 for depressurizing and exhausting the inside of the processing container 1, a microwave introduction mechanism 27 provided in the upper part of the processing container 1 for introducing microwaves into the processing container 1, and these plasmas And a control unit 50 that controls each component of the CVD apparatus 100.
  • the gas supply mechanism 18 is integrally incorporated into the plasma CVD apparatus 100, but it is not necessary to be integrally incorporated. Of course, the gas supply mechanism 18 may be externally attached to the plasma CVD apparatus 100.
  • the processing container 1 is formed of a substantially cylindrical container grounded.
  • the processing vessel 1 may be formed of a square tube-shaped vessel.
  • the processing container 1 has a bottom wall 1a and a side wall 1b made of a material such as aluminum.
  • a mounting table 2 for horizontally supporting a silicon wafer (hereinafter, simply referred to as a “wafer”) W, which is an object to be processed, is provided inside the processing container 1, a mounting table 2 for horizontally supporting a silicon wafer (hereinafter, simply referred to as a “wafer”) W, which is an object to be processed, is provided.
  • the mounting table 2 is made of a material having high thermal conductivity, such as ceramics such as AlN.
  • the mounting table 2 is supported by a cylindrical support member 3 extending upward from the center of the bottom of the exhaust chamber 11 and is fixed to the bottom.
  • the support member 3 is made of, for example, a ceramic such as AlN.
  • the mounting table 2 is provided with a cover ring 4 for covering the outer edge portion and for guiding the wafer W.
  • the cover ring 4 is an annular member made of, for example, quartz, AlN, Al 2 O 3 , SiN or the like.
  • a resistance heating type heater 5 as a temperature control mechanism is embedded in the mounting table 2.
  • the heater 5 heats the mounting table 2 by being supplied with electric power from the heater power supply 5a, and heats uniformly the wafer W which is a substrate to be processed by the heat.
  • illustration is abbreviate
  • thermocouple (TC) 6 is disposed on the mounting table 2. By measuring the temperature with this thermocouple 6, the heating temperature of the wafer W can be controlled, for example, in the range from room temperature to 900.degree.
  • the mounting table 2 has a wafer support pin (not shown) for supporting and moving the wafer W up and down.
  • Each wafer support pin is provided to be able to protrude and retract with respect to the surface of the mounting table 2.
  • an electrode 7 is embedded on the surface side of the mounting table 2.
  • the electrode 7 is disposed between the heater 5 and the surface of the mounting table 2.
  • a high frequency power supply 9 for bias application is connected to the electrode 7 via a matching box (M.B.) 8 by a feeder 7a.
  • the high frequency power is supplied to the electrode 7 from the high frequency power supply 9 so that a high frequency bias (RF bias) can be applied to the wafer W which is a substrate.
  • the material of the electrode 7 is preferably a material having a thermal expansion coefficient equivalent to that of ceramics, such as AlN, which is the material of the mounting table 2, and for example, it is preferable to use a conductive material such as molybdenum or tungsten.
  • the electrode 7 is formed in, for example, a mesh shape, a lattice shape, or a spiral shape.
  • the size of the electrode 7 is preferably at least as large as or larger than the object to be treated.
  • a circular opening 10 is formed substantially at the center of the bottom wall 1 a of the processing container 1.
  • the bottom wall 1 a communicates with the opening 10 and is provided with an exhaust chamber 11 projecting downward.
  • An exhaust pipe 12 is connected to the exhaust chamber 11 and is connected to an exhaust device 24 via the exhaust pipe 12.
  • An annular plate 13 having a function as a lid (lid) for opening and closing the processing container 1 is disposed on the upper end of the side wall 1 b forming the processing container 1.
  • the lower part of the inner periphery of the plate 13 protrudes toward the inside (the space in the processing container) to form an annular support 13 a.
  • a gas introducing unit 40 is disposed on the plate 13, and the gas introducing unit 40 is provided with a first gas introducing unit 14 having a first gas introducing hole. Further, on the side wall 1 b of the processing container 1, a second gas introduction unit 15 having a second gas introduction hole is provided. That is, the first gas introducing unit 14 and the second gas introducing unit 15 are provided in upper and lower two stages.
  • the first gas introducing unit 14 and the second gas introducing unit 15 are connected to a gas supply mechanism 18 which supplies a film forming source gas and a gas for plasma excitation.
  • the first gas introducing unit 14 and the second gas introducing unit 15 may be provided in the shape of a nozzle or a shower head. Further, the first gas introducing unit 14 and the second gas introducing unit 15 may be provided in a single shower head. Both the first gas introducing unit 14 and the second gas introducing unit 15 may be provided on the side wall 1 b of the processing container 1.
  • a loading / unloading port 16 for loading / unloading the wafer W between the plasma CVD apparatus 100 and a transfer chamber (not shown) adjacent thereto on the side wall 1b of the processing container 1, and the loading / unloading port A gate valve 17 for opening and closing 16 is provided.
  • the gas supply mechanism 18 includes a nitrogen-containing gas (N-containing gas) supply source 19a as a film forming gas, a silicon-containing compound gas (Si-containing gas) supply source 19b, an inert gas supply source 19c for plasma generation gas, and the processing container 1 It has a cleaning gas supply source 19d used for cleaning the inside.
  • the nitrogen-containing gas supply source 19 a is connected to the first gas introduction unit 14.
  • the silicon-containing compound gas supply source 19 b, the inert gas supply source 19 c and the cleaning gas supply source 19 d are connected to the second gas introduction unit 15.
  • the gas supply mechanism 18 may separately have, for example, a purge gas supply source or the like used when replacing the atmosphere in the processing container as a gas supply source (not shown) other than the above.
  • the inert gas source 19c may be used as a purge gas source.
  • nitrogen gas (N 2 ) is used as the nitrogen-containing gas that is the film-forming source gas.
  • silicon-containing compound gas which is another film-forming source gas for example, Si n H 2 n + 2 such as silane (SiH 4 ), disilane (Si 2 H 6 ), trisilane (Si 3 H 8 ), TSA (trisilyl And the like can be used.
  • disilane (Si 2 H 6 ) is particularly preferable. That is, for the purpose of controlling the number of traps in the silicon nitride film, a combination using nitrogen gas and disilane as the film-forming source gas is preferable.
  • the inert gas for example, N 2 gas or a rare gas can be used.
  • the rare gas helps to generate a stable plasma as a plasma excitation gas, and for example, Ar gas, Kr gas, Xe gas, He gas or the like can be used.
  • Ar gas, Kr gas, Xe gas, He gas or the like can be used.
  • the cleaning gas ClF 3 , NF 3 , HCl, F 2 gas and the like can be exemplified. Among these, NF 3 gas is preferable.
  • the nitrogen-containing gas is introduced from the nitrogen-containing gas supply source 19 a of the gas supply mechanism 18 to the first gas introduction unit 14 via the gas line 20, and is introduced into the processing container 1 from the first gas introduction unit 14. .
  • the silicon-containing compound gas, the inert gas and the cleaning gas are supplied from the silicon-containing compound gas supply source 19b, the inert gas supply source 19c and the cleaning gas supply source 19d through the gas line 20 respectively.
  • the gas is introduced into the processing vessel 1 from the second gas introducing unit 15.
  • a mass flow controller 21 and opening and closing valves 22 before and after the gas flow controller are provided in each gas line 20 connected to each gas supply source.
  • Such a configuration of the gas supply mechanism 18 enables switching of the supplied gas and control of the flow rate and the like.
  • the inert gas for plasma excitation such as Ar, is an arbitrary gas, and it is not necessary to supply it simultaneously with the film forming source gas.
  • An exhaust device 24 as an exhaust mechanism includes a high speed vacuum pump such as a turbo molecular pump. As described above, the exhaust device 24 is connected to the exhaust chamber 11 of the processing container 1 via the exhaust pipe 12. By operating the exhaust device 24, the gas in the processing container 1 uniformly flows to the space 11 a in the exhaust chamber 11 and is further exhausted from the space 11 a to the outside through the exhaust pipe 12. As a result, the inside of the processing container 1 can be depressurized to, for example, 0.133 Pa at high speed.
  • the microwave introduction mechanism 27 mainly includes a transmission plate 28, a planar antenna 31, a wave retardation member 33, a cover member 34, a waveguide 37, and a microwave generator 39.
  • a transmission plate 28 as a dielectric member is disposed on a support 13 a protruding to the inner peripheral side of the plate 13.
  • the transmission plate 28 is made of a dielectric that transmits microwaves, such as quartz, ceramics such as Al 2 O 3 , or AlN. In particular, when used as a plasma CVD apparatus, ceramics such as Al 2 O 3 and AlN are preferable.
  • a space between the transmission plate 28 and the support portion 13a is airtightly sealed via a seal member 29. Therefore, the inside of the processing container 1 is kept airtight.
  • the flat antenna 31 is provided above the transmission plate 28 so as to face the mounting table 2.
  • the planar antenna 31 has a disk shape.
  • the shape of the planar antenna 31 is not limited to the disk shape, and may be, for example, a square plate shape.
  • the planar antenna 31 is locked to the upper end of the plate 13.
  • the planar antenna 31 is made of, for example, a copper plate whose surface is plated with gold or silver, a nickel plate, a SUS plate, or an aluminum plate.
  • the planar antenna 31 has a large number of slot-like microwave radiation holes 32 for radiating microwaves.
  • the microwave radiation holes 32 are formed through the planar antenna 31 in a predetermined pattern.
  • the individual microwave radiation holes 32 have an elongated rectangular shape (slot shape), and two adjacent microwave radiation holes are paired. And typically, adjacent microwave radiation holes 32 are arranged in an “L” shape. Further, the microwave radiation holes 32 arranged in combination in a predetermined shape (for example, an L-shape) in this manner are further arranged concentrically as a whole.
  • the length and arrangement interval of the microwave radiation holes 32 are determined according to the wavelength ( ⁇ g) of the microwaves.
  • the distance between the microwave radiation holes 32 is set to be ⁇ g / 4 to ⁇ g.
  • the interval between the adjacent microwave radiation holes 32 formed concentrically is indicated by ⁇ r.
  • the shape of the microwave radiation hole 32 may be another shape such as a circular shape or an arc shape.
  • the arrangement form of the microwave radiation holes 32 is not particularly limited, and may be arranged in, for example, a spiral shape, a radial shape, etc. in addition to the concentric shape.
  • a wave retarding member 33 having a dielectric constant larger than that of vacuum, for example, quartz, Al 2 O 3 , AlN, resin or the like is provided.
  • the wave retarding member 33 has a function of adjusting the plasma by shortening the wavelength of the microwave since the wavelength of the microwave becomes long in vacuum.
  • planar antenna 31 and the transmission plate 28 and the wave retarding member 33 and the planar antenna 31 may be in contact with or separated from each other, but are preferably in contact with each other.
  • a cover member 34 is provided on the top of the plate 13 so as to cover the planar antenna 31 and the wave retarding member 33.
  • the cover member 34 is formed of, for example, a metal material such as aluminum or stainless steel.
  • the plate 13 and the cover member 34 are sealed by a seal member 35.
  • a cooling water channel 34 a is formed in the cover member 34.
  • the cover member 34, the wave retardation member 33, the planar antenna 31, and the transmission plate 28 can be cooled by flowing the cooling water through the cooling water flow passage 34a.
  • the cover member 34 is grounded.
  • An opening 36 is formed at the center of the upper wall (ceiling) of the cover member 34, and a waveguide 37 is connected to the opening 36.
  • a microwave generator 39 for generating microwaves is connected to the other end of the waveguide 37 through the matching circuit 38.
  • the waveguide 37 includes a coaxial waveguide 37a having a circular cross section and extending upward from the opening 36 of the cover member 34, and a horizontally extending rectangular conductor connected to the upper end of the coaxial waveguide 37a. And a wave tube 37b.
  • An inner conductor 41 extends at the center of the coaxial waveguide 37a.
  • the inner conductor 41 is connected and fixed to the center of the planar antenna 31 at its lower end. With such a structure, the microwaves are efficiently and uniformly propagated radially to the planar antenna 31 via the inner conductor 41 of the coaxial waveguide 37a.
  • the microwaves generated by the microwave generator 39 are propagated to the planar antenna 31 through the waveguide 37 by the microwave introduction mechanism 27 configured as described above, and further into the processing chamber 1 through the transmission plate 28. It is supposed to be introduced.
  • a frequency of a microwave 2.45 GHz is preferably used, and 8.35 GHz, 1.98 GHz, etc. can also be used other than that, for example.
  • the control unit 50 includes a computer, and as illustrated in FIG. 3, for example, includes a process controller 51 having a CPU, and a user interface 52 and a storage unit 53 connected to the process controller 51.
  • the process controller 51 relates to each component related to process conditions such as temperature, pressure, gas flow rate, microwave output, high frequency output for bias application (for example, heater power supply 5a, high frequency power supply 9, It is a control means that controls the gas supply mechanism 18, the exhaust device 24, the microwave generator 39, etc. in an integrated manner.
  • the user interface 52 has a keyboard for a process manager to perform an input operation of a command to manage the plasma CVD apparatus 100, a display for visualizing and displaying the operation status of the plasma CVD apparatus 100, and the like.
  • the storage unit 53 stores a control program (software) for realizing various processes executed by the plasma CVD apparatus 100 by control of the process controller 51, and a recipe in which processing condition data and the like are recorded. There is.
  • recipes such as the control program and processing condition data may be stored in a computer readable storage medium such as a CD-ROM, a hard disk, a flexible disk, a flash memory, a DVD, a Blu-ray disk, etc. Alternatively, it may be used online from another device, for example, transmitted at any time via a dedicated line.
  • the gate valve 17 is opened, and the wafer W is loaded into the processing container 1 from the loading / unloading port 16 and placed on the mounting table 2.
  • the nitrogen-containing gas, the silicon-containing compound gas, and the silicon-containing compound gas from the nitrogen-containing gas supply source 19a of the gas supply mechanism 18, the silicon-containing compound gas supply source 19b and the inert gas supply source 19c.
  • An inert gas is introduced into the processing vessel 1 at a predetermined flow rate through the first gas introducing unit 14 and the second gas introducing unit 15, respectively. Then, the inside of the processing container 1 is adjusted to a predetermined pressure.
  • the microwave having a predetermined frequency, for example, 2.45 GHz generated by the microwave generator 39 is guided to the waveguide 37 through the matching circuit 38.
  • the microwave guided to the waveguide 37 sequentially passes through the rectangular waveguide 37 b and the coaxial waveguide 37 a and is supplied to the planar antenna plate 31 via the inner conductor 41. That is, the microwave propagates in the coaxial waveguide 37 a toward the planar antenna plate 31.
  • the microwaves are radiated from the slot-shaped microwave radiation holes 32 of the planar antenna plate 31 through the transmission plate 28 to the space above the wafer W in the processing container 1.
  • the microwave output at this time is preferably in the range of 0.25 to 2.56 W / cm 2 as the output density per area of the transmission plate 28 in the region through which the microwaves transmit.
  • the microwave output can be selected, for example, from within the range of 500 to 5000 W so as to have an output density within the above range according to the purpose.
  • An electromagnetic field is formed in the processing container 1 by the microwaves radiated from the planar antenna 31 through the transmission plate 28 to the processing container 1, and the nitrogen-containing gas and the silicon-containing compound gas are converted to plasma. Then, dissociation of the source gas proceeds efficiently in the plasma, and Si p H q , SiH q , NH q , N (here, p and q mean an arbitrary number, and so on).
  • a thin film of silicon nitride SiN is deposited by the reaction of the active species.
  • the silicon nitride film deposited in the chamber is cleaned with heat of 100 to 500 ° C., preferably 200 to 300 ° C., by supplying ClF 3 gas as a cleaning gas into the chamber. To be removed.
  • ClF 3 gas as a cleaning gas
  • plasma is generated at room temperature to 300 ° C.
  • high frequency power of a predetermined frequency and size is supplied to the electrode 7 of the mounting table 2 from the high frequency power supply 9, and an RF bias is applied to the wafer W.
  • the plasma CVD apparatus 100 since the electron temperature of plasma can be maintained low, there is no damage to the film, and furthermore, since the molecules of the film forming gas are easily dissociated by the high density plasma, the reaction is promoted.
  • the application of the RF bias in an appropriate range acts to draw ions in the plasma into the wafer W, thereby enhancing the density of the silicon nitride film and acting to increase the traps in the film. .
  • the frequency of the RF bias supplied from the high frequency power supply 9 is, for example, preferably in the range of 400 kHz to 60 MHz, and more preferably in the range of 450 kHz to 20 MHz.
  • the RF bias is preferably applied in the range of, for example, 0.009 W / cm 2 or more and 0.64 W / cm 2 or less as the power density per area of the wafer W, and is preferably 0.016 W / cm 2 or more and 0.095 W / cm. It is more preferable to apply within the range of 2 or less.
  • the RF bias power is preferably in the range of 3 W to 200 W, more preferably in the range of 5 W to 20 W, and the RF bias can be applied by supplying the electrode with the above output density.
  • the above conditions are stored as a recipe in the storage unit 53 of the control unit 50.
  • the process controller 51 reads the recipe and sends control signals to each component of the plasma CVD apparatus 100, such as the gas supply mechanism 18, the exhaust device 24, the microwave generator 39, the heater power supply 5a, the high frequency power supply 9 and the like.
  • the plasma CVD process under desired conditions is realized.
  • the pressure condition of the plasma CVD process at the time of forming the silicon nitride film is constant, and the RF bias power supplied from the high frequency power supply 9 to the electrode 7 of the mounting table 2 is 0.
  • the RF bias power supplied from the high frequency power supply 9 to the electrode 7 of the mounting table 2 is 0.
  • FIG. 4 is a process diagram showing a manufacturing process of a silicon nitride film performed in plasma CVD apparatus 100.
  • plasma CVD processing is performed on an arbitrary base layer (for example, a Si substrate or a silicon dioxide film) 60 using an N 2 / Si 2 H 6 plasma.
  • the processing pressure is set to be constant in the range of 10 Pa to 133.3 Pa, preferably in the range of 20 Pa to 60 Pa.
  • RF power within the range of 0.009 W / cm 2 or more and 0.64 W / cm 2 is supplied from the high frequency power source 9 to the electrode 7 of the mounting table 2.
  • the silicon nitride film 70 can be formed.
  • the number of traps in the silicon nitride film 70 can be uniformly increased as compared to the case where the RF bias is not applied.
  • the plasma CVD apparatus 100 uses the N 2 gas as the nitrogen-containing gas, the Si 2 H 6 gas as the silicon-containing compound gas, and the Ar gas as the plasma generation gas, the plasma CVD apparatus 100 performs plasma CVD under the following plasma CVD conditions, A single silicon nitride film was formed.
  • the hysteresis of the refractive index, the wet etching rate and the flat band potential (Vfb) was measured for the silicon nitride film formed under each condition.
  • the hysteresis of Vfb was measured by the Hg probe method which is the following well-known technique.
  • FIG. 5A a test device having a capacitor structure as shown in FIG. 5A was prepared.
  • reference numeral 91 denotes a silicon substrate
  • 93 denotes a silicon nitride film (gate insulating film) formed by plasma CVD
  • 95 denotes a mercury gate electrode.
  • the voltage was changed from -20 V to 10 V and applied to the mercury gate electrode 95 (forward), and then changed from 10 V to -20 V in reverse, and applied (reverse).
  • FIG. 5B Vfb hysteresis was obtained from the forward and reverse CV curves (hysteresis curves) by measuring the capacitance in the process of applying voltage to and from the circuit.
  • the fact that the CV curve changes due to the application of a voltage back and forth means that holes are trapped in the silicon nitride film due to the application of the voltage, resulting in a change in voltage to cancel out the charge.
  • Processing temperature (mounting table): 400 ° C.
  • Microwave power 2 kW (power density 1.023 W / cm 2 ; per transmission plate area) Processing pressure; 2.7Pa, 26.6Pa, 40Pa Ar gas flow rate; 600 mL / min (sccm) N 2 gas flow rate; 400 mL / min (sccm) Si 2 H 6 gas flow rate; 2 mL / min (sccm) RF bias frequency: 13.56 MHz
  • RF bias power 0 W, 5 W (power density 0.016 W / cm 2 ), 10 W (power density 0.032 W / cm 2 ), 50 W (power density 0.16 W / cm 2 )
  • FIG. 6A shows the relationship between the refractive index of the silicon nitride film and the RF bias power supplied to the mounting table 2.
  • FIG. 6B shows the relationship between the wet etching rate of the silicon nitride film using dilute hydrofluoric acid and the RF bias power supplied to the mounting table 2.
  • FIG. 6C shows the relationship between the magnitude of the hysteresis in the Vfb measurement of the silicon nitride film and the RF bias power supplied to the mounting table 2. From FIG.
  • the refractive index is preferably as high as 1.85 or more at a treatment pressure of 2.7 Pa, 26.6 Pa and 40.0 Pa at an RF bias of 0.16 W / cm 2 , and in particular 2.7 Pa At a treatment pressure of 1, the refractive index is as high as 1.95 or more, and more preferable. Furthermore, when the RF bias is 0.016 W / cm 2 , the refractive index is preferably as high as about 1.90 or more at processing pressures of 2.7 Pa, 26.6 Pa and 40.0 Pa.
  • Figures 6 (a) ⁇ (c) the process pressure of 26.6Pa and 40 Pa, power density by applying approximately 0.016W / cm 2 ⁇ 0.032W / cm 2 about RF bias, the refractive index , The wet etching rate was low, and the Vfb hysteresis changed high.
  • the improvement of the refractive index, the reduction of the wet etching rate, and the improvement of the Vfb hysteresis are when the RF bias is not applied when the power density is within the range of 0.016 W / cm 2 or more and 0.032 W / cm 2 or less.
  • the RF bias is applied at a power density of 0.16 W / cm 2 , the variation is reduced.
  • FIGS. 6 (a) to 6 (c) show that the density of the silicon nitride film is improved and the traps in the film are uniformly increased by applying the RF bias at an appropriate range of power density. It shows that it can be done.
  • the seemingly contradictory data above can be rationally explained by interpreting it as follows.
  • plasma CVD by applying an RF bias to the wafer W, the ions in the plasma are more likely to be drawn into the wafer W.
  • the electron temperature can be kept low (0.7 to 2 eV) even when the RF bias is applied, so the electron temperature is kept low even under a low pressure condition of 26.6 Pa to 40 Pa, for example Ru.
  • the RF bias is applied at a power density in the range of 0.016 to 0.032 W / cm 2 , and the processing pressure is 40 Pa or less (e.g. 10 It was shown that by setting in the range of ⁇ 40 Pa), it is possible to form a silicon nitride film in which the number of traps is large and the distribution of traps is uniformly controlled.
  • a high performance exhaust device such as a turbo molecular pump is no longer required, and There is an advantage that the device load can be reduced and the cost can be reduced, such as being able to be reduced. Also, in a high vacuum state of 3 Pa or less, there are process problems such as increased risk of contamination of the wafer W due to particles or the like due to ion sputtering or the like, or reduction in coverage performance in forming a silicon nitride film. However, these problems can also be avoided by setting the processing pressure in a high range.
  • Plasma CVD was performed by changing Ar flow rate under the following conditions, and Vfb hysteresis was measured by the same method as described above.
  • Processing temperature (mounting table): 400 ° C.
  • Microwave power 2 kW (power density 1.023 W / cm 2 ; per transmission plate area)
  • Processing pressure 26.6 Pa
  • Ar gas flow rate 100 mL / min (sccm), 600 mL / min (sccm), 1100 mL / min (sccm) N 2 gas flow rate; 400 mL / min (sccm) Si 2 H 6 gas flow rate; 2 mL / min (sccm)
  • RF bias frequency 13.56 MHz
  • RF bias power 5 W (power density 0.016 W / cm 2 )
  • the flow rate of Ar gas is preferably in the range of 50 to 1000 mL / min (sccm), and more preferably in the range of 100 to 800 mL / min (sccm) .
  • the flow ratio (Ar / N 2 ) of Ar gas to N 2 gas is preferably in the range of 0.1 or more and 3 or less, and in view of increasing the number of traps, Ar / N 2 is 2 or less (for example, 0. It is preferable to select from the range of 2 or more and 2 or less).
  • Ar ions in the plasma increase, so the Vfb hysteresis decreases and the number of traps decreases.
  • the flow ratio (Si 2 H 6 / Ar) of the Si 2 H 6 gas to the Ar gas is preferably selected from the range of 0.005 or more and 0.01 or less.
  • the flow rate of N 2 gas is in the range of 100 to 1000 mL / min (sccm), preferably in the range of 100 to 500 mL / min (sccm), and the flow rate of Si 2 H 6 gas is 0.5 to 40 mL / min (sccm).
  • the flow rate ratio can be set within the range of sccm), preferably within the range of 0.5 to 10 mL / min (sccm).
  • the processing temperature of the plasma CVD process may be set to a temperature of the mounting table 2 of 300 ° C. to 600 ° C., preferably 400 ° C. to 600 ° C.
  • the power density of the microwave in the plasma CVD process is preferably in the range of 0.25 W / cm 2 or more 2.56 W / cm 2 or less per area of the transmissive plate microwaves transmitted.
  • the silicon nitride film having a desired amount of traps is easily formed on the wafer W by performing the plasma CVD by selecting the RF bias power and the processing pressure. Can be manufactured.
  • the silicon nitride film having a large number of traps thus formed can be advantageously used, for example, as a charge storage layer of a MOS semiconductor memory device.
  • the conditions of the plasma CVD process at the time of forming the silicon nitride film particularly the RF bias supplied from the high frequency power supply 9 to the electrode 7 of the mounting table 2.
  • the RF bias supplied from the high frequency power supply 9 to the electrode 7 of the mounting table 2.
  • FIG. 8 is a process diagram showing a film forming step of laminating and forming a silicon nitride film performed in the plasma CVD apparatus 100.
  • an RF bias of 0.009 is applied on an arbitrary base layer (for example, a Si substrate or a silicon dioxide film) 60 at a pressure in the range of 10 Pa to 133.3 Pa. while applying at a power density in the range of ⁇ 0.64W / cm 2 (RF bias / ON), performing plasma CVD process using a mixed gas plasma of N 2 gas and Si 2 H 6 gas, FIG. 8 (b
  • the first silicon nitride film 70 is formed as shown in FIG.
  • the silicon nitride film 70 has a large number of traps in the film.
  • Plasma CVD processing is performed using mixed gas plasma of N 2 gas and Si 2 H 6 gas.
  • a second silicon nitride film 71 having a second band gap is formed.
  • the second silicon nitride film 71 is a silicon nitride film in which the number of traps in the film is smaller than that of the first silicon nitride film 70.
  • the RF bias is set to 0.009 to 0.64 W for the second silicon nitride film 71 at a pressure in the range of 10 Pa to 133.3 Pa.
  • the plasma CVD process can be performed using a mixed gas plasma of N 2 gas and Si 2 H 6 gas while applying (RF bias / ON) at a power density of 1 / cm 2 .
  • the third silicon nitride film 72 can be formed.
  • the number of traps in the third silicon nitride film 72 may be equal to that of the first silicon nitride film 70, or may be different from that of the first silicon nitride film 70.
  • the number of traps in the third silicon nitride film 72 can be controlled by the magnitude of the applied RF bias.
  • the silicon nitride film stack 80 having a desired layer structure can be formed by performing the plasma CVD process repeatedly as many times as necessary.
  • the first process is performed by turning on / off the RF bias on the underlayer in a state in which the processing pressure is set constant.
  • the number of traps in the silicon nitride film 70, the second silicon nitride film 71, and the third silicon nitride film 72 can be changed.
  • the film forming gas containing the silicon-containing compound gas and the nitrogen gas switching the RF bias ON / OFF or changing the size of the RF bias in the range of the minute bias. It is possible to deposit silicon nitride films by alternately depositing silicon nitride films having different numbers of traps.
  • the number of traps and the distribution of each silicon nitride film can be uniformly controlled only by control with a small RF bias with a constant processing pressure.
  • the method of the present invention to, for example, laminating the silicon nitride film as a charge storage region of a MOS semiconductor memory device, a MOS semiconductor memory device having excellent data write characteristics can be manufactured.
  • FIG. 9 is a cross-sectional view showing a schematic configuration of the MOS semiconductor memory device 201.
  • the MOS semiconductor memory device 201 is further formed on a p-type silicon substrate 101 as a semiconductor layer, a plurality of insulating films stacked on the p-type silicon substrate 101 and having different numbers of traps, and And the gate electrode 103.
  • a first insulating film 111, a second insulating film 112, a third insulating film 113, a fourth insulating film 114, and a fifth insulating film are provided between the silicon substrate 101 and the gate electrode 103. And 115 are provided.
  • the second insulating film 112, the third insulating film 113, and the fourth insulating film 114 are all silicon nitride films, and form a laminated silicon nitride film 102a.
  • first source / drain 104 and second source / drain 105 which are n-type diffusion layers are formed at a predetermined depth from the surface so as to be located on both sides of the gate electrode 103.
  • a channel formation region 106 is formed between the two.
  • the MOS type semiconductor memory device 201 may be formed in ap well or ap type silicon layer formed in a semiconductor substrate. Further, although the present embodiment will be described by taking an n-channel MOS device as an example, it may be implemented by a p-channel MOS device. Therefore, the contents of the present embodiment described below can be applied to all n channel MOS devices and p channel MOS devices.
  • the first insulating film 111 is, for example, a silicon dioxide film (SiO 2 film) formed by oxidizing the surface of the silicon substrate 101 by a thermal oxidation method.
  • the thickness of the first insulating film 111 is, for example, preferably in the range of 0.5 nm to 20 nm, and more preferably in the range of 1 nm to 3 nm.
  • the second insulating film 112 constituting the laminated silicon nitride film 102 a is a silicon nitride film (SiN film) formed on the surface of the first insulating film 111 (herein, the composition ratio of Si to N is necessarily stoichiometric) Not determined, but different values depending on the film forming conditions (the same applies hereinafter).
  • the film thickness of the second insulating film 112 is, for example, preferably in the range of 2 nm to 20 nm, and more preferably in the range of 3 nm to 5 nm.
  • the third insulating film 113 is a silicon nitride film (SiN film) formed on the second insulating film 112.
  • the film thickness of the third insulating film 113 is, for example, preferably in the range of 2 nm to 30 nm, and more preferably in the range of 4 nm to 10 nm.
  • the fourth insulating film 114 is a silicon nitride film (SiN film) formed on the third insulating film 113.
  • the fourth insulating film 114 has, for example, the same number of traps and the same film thickness as the second insulating film 112.
  • the fifth insulating film 115 is a silicon dioxide film (SiO 2 film) deposited on the fourth insulating film 114 by, for example, the CVD method.
  • the fifth insulating film 115 functions as a block layer (barrier layer) between the electrode 103 and the fourth insulating film 114.
  • the film thickness of the fifth insulating film 115 is, for example, preferably in the range of 2 nm to 30 nm, and more preferably in the range of 5 nm to 8 nm.
  • a polysilicon layer may be formed as a floating gate electrode between the first insulating film 111 and the second insulating film 112.
  • the gate electrode 103 is made of, for example, a polycrystalline silicon film formed by the CVD method, and functions as a control gate (CG) electrode. Further, the gate electrode 103 may be a layer containing a metal such as W, Ti, Ta, Cu, Al, Au, or Pt.
  • the gate electrode 103 is not limited to a single layer, and for the purpose of reducing the specific resistance of the gate electrode 103 and increasing the operating speed of the MOS semiconductor memory device 201, for example, tungsten, molybdenum, tantalum, titanium, platinum or their silicides. A laminated structure including nitride, an alloy, and the like can also be used.
  • the gate electrode 103 is connected to a wiring layer not shown.
  • the laminated silicon nitride film 102a formed of the second insulating film 112, the third insulating film 113 and the fourth insulating film 114 is a charge storage region mainly storing charge. It is. Therefore, when forming the second insulating film 112, the third insulating film 113 and the fourth insulating film 114, the film forming method of the silicon nitride film according to the first embodiment of the present invention is applied, The data write performance and data retention performance of the MOS semiconductor memory device 201 can be adjusted by controlling the number of traps and their distribution.
  • the film forming method of the laminated silicon nitride film according to the second embodiment of the present invention is applied, and the second insulating film 112, the third insulating film 113 and the fourth insulating film 114 are plasma CVD devices. It is also possible to manufacture continuously in the same processing container by making the processing pressure constant at 100, switching the ON / OFF of the RF bias, or changing the size thereof.
  • a silicon substrate 101 on which an element isolation film (not shown) is formed by a method such as LOCOS (Local Oxidation of Silicon) method or STI (Shallow Trench Isolation) method is prepared, and the surface thereof is, for example, a thermal oxidation method.
  • a first insulating film 111 is formed.
  • a second insulating film 112, a third insulating film 113, and a fourth insulating film 114 are sequentially formed on the first insulating film 111 by plasma CVD using the plasma CVD apparatus 100.
  • the processing pressure is set in the range of 10 Pa to 133.3 Pa, and the electrode 7 of the mounting table 2 is 0.009 W / cm 2 to 0.64 W per area of the wafer W.
  • RF power is supplied at a power density within the range of 1 cm ⁇ 2 > or less.
  • RF bias is applied to the silicon substrate 101 to perform film formation so that many traps are formed with uniform distribution.
  • plasma CVD is performed without applying an RF bias to the silicon substrate 101 so that the number of traps in the film is smaller than that of the second insulating film 112.
  • film forming conditions different from the film forming conditions for forming the third insulating film 113 for example, RF bias similar to that in forming the second insulating film 112 is used for the silicon substrate
  • Plasma CVD is performed by applying (101) to make the number of traps in the film larger than that of the third insulating film 113.
  • the number of traps in each film can be controlled by making the processing pressure of the plasma CVD process constant, switching the application of the RF bias ON / OFF, or changing the size thereof.
  • the fifth insulating film 115 is formed over the fourth insulating film 114.
  • the fifth insulating film 115 can be formed, for example, by the CVD method. Further, on the fifth insulating film 115, a polysilicon layer, a metal layer, a metal silicide layer, or the like is formed by, eg, CVD to form a metal film to be the gate electrode 103.
  • the metal film and the fifth insulating film 115 to the first insulating film 111 are etched using the patterned resist as a mask using a photolithography technique to form the patterned gate electrode 103 and the plurality of gate electrodes 103.
  • a gate stack structure having an insulating film is obtained.
  • n-type impurities are ion-implanted in high concentration on the silicon surface adjacent to both sides of the gate stack to form the first source / drain 104 and the second source / drain 105.
  • the MOS semiconductor memory device 201 having the structure shown in FIG. 9 can be manufactured.
  • the number of traps in the second insulating film 112 and the fourth insulating film 114 is made larger than the number of traps in the third insulating film 113 in the laminated silicon nitride film 102 a.
  • the number of traps in the third insulating film 113 may be increased as compared with the number of traps in the second insulating film 112 and the fourth insulating film 114. Further, the number of traps in the second insulating film 112 and the number of traps in the fourth insulating film 114 do not have to be the same.
  • FIG. 9 exemplifies the case where the laminated silicon nitride film 102a has three layers including the second insulating film 112 to the fourth insulating film 114, the method of the present invention has two silicon nitride films.
  • the present invention can also be applied to the case of manufacturing a MOS type semiconductor memory device having a laminated silicon nitride film laminated in four or more layers.
  • Planar antenna 32 microwave radiation hole 37 waveguide 39 microwave generator 50 control unit 100 plasma CVD device 101 silicon substrate 102a laminated silicon nitride film 103 gate electrode 104 first source / drain 105 second source / drain 111 first insulating film 112 second insulating film 113 third insulating film 114 fourth insulating film 11 ... fifth insulating film 201 ... MOS type semiconductor memory device W ... silicon wafer (substrate)

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Abstract

Le procédé de dépôt d'une couche de nitrure de silicium selon la présente invention est pourvu d'une étape permettant de définir la pression dans un récipient de traitement (1) dans la plage comprise entre 10 et 133,3 Pa inclus dans un dispositif de dépôt chimique en phase vapeur de plasma (100) qui introduit des micro-ondes dans le contenant de traitement (1) via une antenne planaire (31) comprenant de multiples trous, et d'une étape permettant d'effectuer un dépôt chimique en phase vapeur de plasma en utilisant un gaz de dépôt contenant un gaz à base d'un composant contenant du silicium et un gaz d'azote tout en fournissant une puissance à haute fréquence à une densité de sortie comprise dans la plage allant de 0,009 à 0,64 W/cm2 inclus par surface unitaire d'une plaquette (W) à partir d'une source de puissance à haute fréquence (9) jusqu'à une électrode (7) disposée dans une table de montage (2) sur laquelle la plaquette (W) est montée et en appliquant une polarisation RF à la plaquette (W).
PCT/JP2009/067303 2008-09-30 2009-09-29 Procédé de dépôt d’une couche de nitrure de silicium, support de stockage lisible par ordinateur et dispositif de dépôt chimique en phase vapeur de plasma Ceased WO2010038886A1 (fr)

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KR1020117007198A KR101254987B1 (ko) 2008-09-30 2009-09-29 질화 규소막의 성막 방법, 컴퓨터 판독 가능한 기억 매체, 플라즈마 cvd 장치 및 반도체 메모리 장치

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JP2008253932A JP5460011B2 (ja) 2008-09-30 2008-09-30 窒化珪素膜の成膜方法、コンピュータ読み取り可能な記憶媒体およびプラズマcvd装置
JP2008-253932 2008-09-30

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WO2013108523A1 (fr) 2012-01-19 2013-07-25 株式会社フジクラ Fibre multicoeur

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KR101227718B1 (ko) * 2011-04-18 2013-01-29 세크론 주식회사 프로브 스테이션
JP6101467B2 (ja) 2012-10-04 2017-03-22 東京エレクトロン株式会社 成膜方法及び成膜装置
JP6410622B2 (ja) 2014-03-11 2018-10-24 東京エレクトロン株式会社 プラズマ処理装置及び成膜方法
US9214333B1 (en) * 2014-09-24 2015-12-15 Lam Research Corporation Methods and apparatuses for uniform reduction of the in-feature wet etch rate of a silicon nitride film formed by ALD
JP6787813B2 (ja) * 2017-02-16 2020-11-18 株式会社Kokusai Electric 半導体装置の製造方法、基板処理装置およびプログラム
JP7724661B2 (ja) * 2021-08-30 2025-08-18 東京エレクトロン株式会社 成膜方法および成膜装置

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US20130075875A1 (en) * 2010-05-28 2013-03-28 Mitsubishi Heavy Industries, Ltd. Silicon nitride film of semiconductor element, and method and apparatus for producing silicon nitride film
WO2013108523A1 (fr) 2012-01-19 2013-07-25 株式会社フジクラ Fibre multicoeur

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KR101254987B1 (ko) 2013-04-16
TW201030172A (en) 2010-08-16
JP2010087186A (ja) 2010-04-15
JP5460011B2 (ja) 2014-04-02

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