WO2010038886A1 - Method for depositing silicon nitride film, computer-readable storage medium, and plasma cvd device - Google Patents
Method for depositing silicon nitride film, computer-readable storage medium, and plasma cvd device Download PDFInfo
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- WO2010038886A1 WO2010038886A1 PCT/JP2009/067303 JP2009067303W WO2010038886A1 WO 2010038886 A1 WO2010038886 A1 WO 2010038886A1 JP 2009067303 W JP2009067303 W JP 2009067303W WO 2010038886 A1 WO2010038886 A1 WO 2010038886A1
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- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
- C23C16/30—Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
- C23C16/34—Nitrides
- C23C16/345—Silicon nitride
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- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
- C23C16/455—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for introducing gases into reaction chamber or for modifying gas flows in reaction chamber
- C23C16/45523—Pulsed gas flow or change of composition over time
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- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
- C23C16/50—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating using electric discharges
- C23C16/511—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating using electric discharges using microwave discharges
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/69—IGFETs having charge trapping gate insulators, e.g. MNOS transistors
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/60—Electrodes characterised by their materials
- H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
- H10D64/68—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator
- H10D64/681—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator having a compositional variation, e.g. multilayered
- H10D64/685—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator having a compositional variation, e.g. multilayered being perpendicular to the channel plane
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/60—Electrodes characterised by their materials
- H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
- H10D64/68—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator
- H10D64/693—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator the insulator comprising nitrogen, e.g. nitrides, oxynitrides or nitrogen-doped materials
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- H10P14/6681—
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- H10P14/69433—
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/01—Manufacture or treatment
- H10D64/031—Manufacture or treatment of data-storage electrodes
- H10D64/035—Manufacture or treatment of data-storage electrodes comprising conductor-insulator-conductor-insulator-semiconductor structures
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/01—Manufacture or treatment
- H10D64/031—Manufacture or treatment of data-storage electrodes
- H10D64/037—Manufacture or treatment of data-storage electrodes comprising charge-trapping insulators
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- H10P14/6336—
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- H10P14/6682—
Definitions
- the present invention relates to a method of forming a silicon nitride film, a computer readable storage medium used in this method, and a plasma CVD apparatus.
- non-volatile semiconductor memory devices represented by EEPROM (Electrically Erasable and Programmable ROM) and the like capable of electrically rewriting operation include SONOS (Silicon-Oxide-Nitride-Oxide-Silicon) type and MONOS (Metal-Oxide-). Some have a laminated structure called Nitride-Oxide-Silicon type. In these types of nonvolatile semiconductor memory devices, holding of information is performed with one or more silicon nitride films (Nitride) sandwiched between silicon dioxide films (Oxide) as charge storage regions.
- EEPROM Electrically Erasable and Programmable ROM
- SONOS Silicon-Oxide-Nitride-Oxide-Silicon
- MONOS Metal-Oxide-
- the non-volatile semiconductor memory device described above a voltage is applied between the semiconductor substrate (Silicon) and the control gate electrode (Silicon or Metal) to inject electrons into the silicon nitride film of the charge storage region and data is stored. Data is stored and erased by rewriting or removing electrons accumulated in the silicon nitride film.
- the data write characteristic is related to the ease of electron injection into the silicon nitride film which is the charge storage region, and in particular to the charge trapping center (trap) present in the silicon nitride film. It is believed that there is.
- Patent Document 1 As a technology relating to a nonvolatile semiconductor memory device, in Patent Document 1, a transition layer containing a large amount of Si is provided in the middle portion of these films for the purpose of increasing the trap density at the interface between the silicon nitride film and the top oxide film. It is described.
- the device structure of nonvolatile semiconductor memory devices is also rapidly miniaturized.
- the film forming method by the low pressure CVD method or the thermal CVD method it is technically difficult to control the trap formation in the film in the process of forming the silicon nitride film.
- the goal is to form a dense silicon film having few defects, which is often used as a hard mask or a stopper film for etching.
- many traps are formed in the formed silicon nitride film by setting the processing pressure in the processing container to a high vacuum state (for example, 3 Pa or less) to strengthen the ionicity of plasma. was considered possible.
- the present invention has been made in view of the above situation, and its first object is to provide a method of forming a silicon nitride film having many traps, which can be used as a charge storage layer by plasma CVD. It is.
- a second object of the present invention is to provide a method of forming a film by laminating silicon nitride films different in the number of traps of individual silicon nitride films by plasma CVD.
- the method for forming a silicon nitride film according to the present invention uses a plasma CVD apparatus that generates a plasma by introducing microwaves into a processing container with a planar antenna having a plurality of holes, and nitrides the object to be processed by plasma CVD.
- a method of forming a silicon nitride film for forming a silicon film comprising: The pressure in the processing vessel is set in the range of 10 Pa to 133.3 Pa, and the electrode of the mounting table on which the object to be processed is mounted is 0.009 W / cm 2 to 0.64 W / cm per area of the object to be processed.
- Silicon nitride film by performing plasma CVD using a film forming gas containing a silicon-containing compound gas and a nitrogen gas while supplying a high frequency power with a power density within the range of 2 or less and applying a high frequency bias to the object And the process of forming the
- the method for forming a silicon nitride film according to the present invention uses a plasma CVD apparatus for generating plasma by introducing microwaves into a processing container by a planar antenna having a plurality of holes, and plasma CVD method on a processing object Forming a silicon nitride film by laminating the silicon nitride film by
- the pressure in the processing vessel is set in the range of 10 Pa to 133.3 Pa, and the electrode of the mounting table on which the object to be processed is mounted is 0.009 W / cm 2 to 0.64 W / cm per area of the object to be processed.
- Silicon nitride film by performing plasma CVD using a film forming gas containing a silicon-containing compound gas and a nitrogen gas while supplying a high frequency power with a power density within the range of 2 or less and applying a high frequency bias to the object
- a first step of forming The high frequency power is not supplied to the electrode of the mounting table at the same set pressure as the first step, or the high frequency power is supplied at an output density different from the first step to apply the high frequency bias to the object
- plasma CVD using a film forming gas containing a silicon-containing compound gas and a nitrogen gas, a silicon nitride film in which the number of traps is smaller than that of the silicon nitride film formed in the first step is formed.
- the computer-readable storage medium of the present invention is a computer-readable storage medium storing a control program that operates on a computer.
- the control program forms a silicon nitride film by a plasma CVD method using a plasma CVD apparatus which generates a plasma by introducing a microwave into a processing container by a planar antenna having a plurality of holes at the time of execution.
- the plasma is supplied to the computer such that plasma CVD is performed using a film forming gas containing a silicon-containing compound gas and a nitrogen gas while supplying a high frequency power at a power density within the range and applying a high frequency bias to the object It controls the CVD apparatus.
- the plasma CVD apparatus of the present invention is a plasma CVD apparatus for forming a silicon nitride film on an object to be processed by plasma CVD method.
- a processing vessel having an open top for containing the object to be treated;
- a mounting table which is disposed in the processing container and on which the object to be processed is mounted;
- An electrode provided in the mounting table and applying high frequency power to the object;
- a high frequency power supply connected to the electrode;
- a planar antenna provided above the dielectric member and having a plurality of holes for introducing microwaves into the processing vessel;
- a gas introduction unit connected to a gas supply mechanism for supplying a film forming gas containing a silicon-containing compound gas and a nitrogen-containing gas into the processing container;
- An exhaust mechanism for depressurizing and exhausting the inside of the processing container;
- the high frequency power is supplied from the high frequency power supply to the electrode with an output in the range of 0.009 W / cm 2 or more and 0.
- the object to be processed is mounted by using the plasma CVD apparatus which generates the plasma by introducing the microwave into the processing container by the planar antenna having the plurality of holes.
- a silicon nitride film with a large number of traps can be formed by performing plasma CVD at a processing pressure of 10 Pa or more and 133.3 Pa or less while applying high frequency power to the table.
- the risk of apparatus load and contamination can be reduced as compared with film formation in a high vacuum state of 3 Pa or less, and good coverage performance in forming a silicon nitride film can be maintained.
- the silicon nitride film formed by the method of the present invention is suitable for use as a charge storage layer since the distribution of traps is uniform.
- silicon nitride films having different numbers of traps can be alternately stacked easily by an operation of simply switching on / off high frequency power applied to the mounting table.
- the semiconductor memory device can be formed and can be applied to a semiconductor memory device excellent in data write characteristics.
- FIG. 1 is a schematic cross-sectional view showing an example of a plasma CVD apparatus suitable for forming a silicon nitride film.
- FIG. 2 is a drawing showing the structure of a planar antenna.
- FIG. 3 is an explanatory view showing the configuration of the control unit.
- FIG. 4 is a drawing showing an example of steps of the method for forming a silicon nitride film according to the first embodiment.
- FIG. 5 is a drawing for explaining the measurement method of Vfb hysteresis, in which (a) is a schematic explanatory view of a capacitor used for the measurement, and (b) is a drawing showing a CV curve.
- FIG. 1 is a schematic cross-sectional view showing an example of a plasma CVD apparatus suitable for forming a silicon nitride film.
- FIG. 2 is a drawing showing the structure of a planar antenna.
- FIG. 3 is an explanatory view showing the configuration of the control unit.
- FIG. 4 is
- FIG. 6 is a graph showing measurement results of RF bias power, film refractive index, wet etching rate and Vfb hysteresis when forming a silicon nitride film.
- FIG. 7 is a graph showing measurement results of Ar flow rate at the time of forming a silicon nitride film and Vfb hysteresis of the film.
- FIG. 8 is a drawing showing an example of steps of a method of manufacturing a silicon nitride film laminate according to the second embodiment.
- FIG. 9 is an explanatory view showing a schematic configuration of a MOS semiconductor memory device to which the method of the present invention can be applied.
- FIG. 1 is a cross-sectional view schematically showing a schematic configuration of a plasma CVD apparatus 100 that can be used for the method of manufacturing a silicon nitride film of the present invention.
- the plasma CVD apparatus 100 is a flat antenna having a plurality of slot-like holes, in particular, by introducing microwaves into a processing container with a RLSA (Radial Line Slot Antenna) to generate plasma, the plasma CVD apparatus 100 is highly effective.
- the apparatus is configured as an RLSA microwave plasma processing apparatus capable of generating a microwave excited plasma with low density and low electron temperature.
- the plasma CVD apparatus 100 can perform processing by plasma having a plasma density of 1 ⁇ 10 10 to 5 ⁇ 10 12 / cm 3 and a low electron temperature of 0.7 to 2 eV. Therefore, the plasma CVD apparatus 100 can be suitably used for the purpose of film formation processing of a silicon nitride film by plasma CVD in the manufacturing process of various semiconductor devices.
- the plasma CVD apparatus 100 mainly includes an airtightly configured processing vessel 1, a gas introducing unit 14 connected to a gas supply mechanism 18 for supplying a gas into the processing vessel 1 via a gas introducing pipe 22, 15, an exhaust mechanism including an exhaust device 24 for depressurizing and exhausting the inside of the processing container 1, a microwave introduction mechanism 27 provided in the upper part of the processing container 1 for introducing microwaves into the processing container 1, and these plasmas And a control unit 50 that controls each component of the CVD apparatus 100.
- the gas supply mechanism 18 is integrally incorporated into the plasma CVD apparatus 100, but it is not necessary to be integrally incorporated. Of course, the gas supply mechanism 18 may be externally attached to the plasma CVD apparatus 100.
- the processing container 1 is formed of a substantially cylindrical container grounded.
- the processing vessel 1 may be formed of a square tube-shaped vessel.
- the processing container 1 has a bottom wall 1a and a side wall 1b made of a material such as aluminum.
- a mounting table 2 for horizontally supporting a silicon wafer (hereinafter, simply referred to as a “wafer”) W, which is an object to be processed, is provided inside the processing container 1, a mounting table 2 for horizontally supporting a silicon wafer (hereinafter, simply referred to as a “wafer”) W, which is an object to be processed, is provided.
- the mounting table 2 is made of a material having high thermal conductivity, such as ceramics such as AlN.
- the mounting table 2 is supported by a cylindrical support member 3 extending upward from the center of the bottom of the exhaust chamber 11 and is fixed to the bottom.
- the support member 3 is made of, for example, a ceramic such as AlN.
- the mounting table 2 is provided with a cover ring 4 for covering the outer edge portion and for guiding the wafer W.
- the cover ring 4 is an annular member made of, for example, quartz, AlN, Al 2 O 3 , SiN or the like.
- a resistance heating type heater 5 as a temperature control mechanism is embedded in the mounting table 2.
- the heater 5 heats the mounting table 2 by being supplied with electric power from the heater power supply 5a, and heats uniformly the wafer W which is a substrate to be processed by the heat.
- illustration is abbreviate
- thermocouple (TC) 6 is disposed on the mounting table 2. By measuring the temperature with this thermocouple 6, the heating temperature of the wafer W can be controlled, for example, in the range from room temperature to 900.degree.
- the mounting table 2 has a wafer support pin (not shown) for supporting and moving the wafer W up and down.
- Each wafer support pin is provided to be able to protrude and retract with respect to the surface of the mounting table 2.
- an electrode 7 is embedded on the surface side of the mounting table 2.
- the electrode 7 is disposed between the heater 5 and the surface of the mounting table 2.
- a high frequency power supply 9 for bias application is connected to the electrode 7 via a matching box (M.B.) 8 by a feeder 7a.
- the high frequency power is supplied to the electrode 7 from the high frequency power supply 9 so that a high frequency bias (RF bias) can be applied to the wafer W which is a substrate.
- the material of the electrode 7 is preferably a material having a thermal expansion coefficient equivalent to that of ceramics, such as AlN, which is the material of the mounting table 2, and for example, it is preferable to use a conductive material such as molybdenum or tungsten.
- the electrode 7 is formed in, for example, a mesh shape, a lattice shape, or a spiral shape.
- the size of the electrode 7 is preferably at least as large as or larger than the object to be treated.
- a circular opening 10 is formed substantially at the center of the bottom wall 1 a of the processing container 1.
- the bottom wall 1 a communicates with the opening 10 and is provided with an exhaust chamber 11 projecting downward.
- An exhaust pipe 12 is connected to the exhaust chamber 11 and is connected to an exhaust device 24 via the exhaust pipe 12.
- An annular plate 13 having a function as a lid (lid) for opening and closing the processing container 1 is disposed on the upper end of the side wall 1 b forming the processing container 1.
- the lower part of the inner periphery of the plate 13 protrudes toward the inside (the space in the processing container) to form an annular support 13 a.
- a gas introducing unit 40 is disposed on the plate 13, and the gas introducing unit 40 is provided with a first gas introducing unit 14 having a first gas introducing hole. Further, on the side wall 1 b of the processing container 1, a second gas introduction unit 15 having a second gas introduction hole is provided. That is, the first gas introducing unit 14 and the second gas introducing unit 15 are provided in upper and lower two stages.
- the first gas introducing unit 14 and the second gas introducing unit 15 are connected to a gas supply mechanism 18 which supplies a film forming source gas and a gas for plasma excitation.
- the first gas introducing unit 14 and the second gas introducing unit 15 may be provided in the shape of a nozzle or a shower head. Further, the first gas introducing unit 14 and the second gas introducing unit 15 may be provided in a single shower head. Both the first gas introducing unit 14 and the second gas introducing unit 15 may be provided on the side wall 1 b of the processing container 1.
- a loading / unloading port 16 for loading / unloading the wafer W between the plasma CVD apparatus 100 and a transfer chamber (not shown) adjacent thereto on the side wall 1b of the processing container 1, and the loading / unloading port A gate valve 17 for opening and closing 16 is provided.
- the gas supply mechanism 18 includes a nitrogen-containing gas (N-containing gas) supply source 19a as a film forming gas, a silicon-containing compound gas (Si-containing gas) supply source 19b, an inert gas supply source 19c for plasma generation gas, and the processing container 1 It has a cleaning gas supply source 19d used for cleaning the inside.
- the nitrogen-containing gas supply source 19 a is connected to the first gas introduction unit 14.
- the silicon-containing compound gas supply source 19 b, the inert gas supply source 19 c and the cleaning gas supply source 19 d are connected to the second gas introduction unit 15.
- the gas supply mechanism 18 may separately have, for example, a purge gas supply source or the like used when replacing the atmosphere in the processing container as a gas supply source (not shown) other than the above.
- the inert gas source 19c may be used as a purge gas source.
- nitrogen gas (N 2 ) is used as the nitrogen-containing gas that is the film-forming source gas.
- silicon-containing compound gas which is another film-forming source gas for example, Si n H 2 n + 2 such as silane (SiH 4 ), disilane (Si 2 H 6 ), trisilane (Si 3 H 8 ), TSA (trisilyl And the like can be used.
- disilane (Si 2 H 6 ) is particularly preferable. That is, for the purpose of controlling the number of traps in the silicon nitride film, a combination using nitrogen gas and disilane as the film-forming source gas is preferable.
- the inert gas for example, N 2 gas or a rare gas can be used.
- the rare gas helps to generate a stable plasma as a plasma excitation gas, and for example, Ar gas, Kr gas, Xe gas, He gas or the like can be used.
- Ar gas, Kr gas, Xe gas, He gas or the like can be used.
- the cleaning gas ClF 3 , NF 3 , HCl, F 2 gas and the like can be exemplified. Among these, NF 3 gas is preferable.
- the nitrogen-containing gas is introduced from the nitrogen-containing gas supply source 19 a of the gas supply mechanism 18 to the first gas introduction unit 14 via the gas line 20, and is introduced into the processing container 1 from the first gas introduction unit 14. .
- the silicon-containing compound gas, the inert gas and the cleaning gas are supplied from the silicon-containing compound gas supply source 19b, the inert gas supply source 19c and the cleaning gas supply source 19d through the gas line 20 respectively.
- the gas is introduced into the processing vessel 1 from the second gas introducing unit 15.
- a mass flow controller 21 and opening and closing valves 22 before and after the gas flow controller are provided in each gas line 20 connected to each gas supply source.
- Such a configuration of the gas supply mechanism 18 enables switching of the supplied gas and control of the flow rate and the like.
- the inert gas for plasma excitation such as Ar, is an arbitrary gas, and it is not necessary to supply it simultaneously with the film forming source gas.
- An exhaust device 24 as an exhaust mechanism includes a high speed vacuum pump such as a turbo molecular pump. As described above, the exhaust device 24 is connected to the exhaust chamber 11 of the processing container 1 via the exhaust pipe 12. By operating the exhaust device 24, the gas in the processing container 1 uniformly flows to the space 11 a in the exhaust chamber 11 and is further exhausted from the space 11 a to the outside through the exhaust pipe 12. As a result, the inside of the processing container 1 can be depressurized to, for example, 0.133 Pa at high speed.
- the microwave introduction mechanism 27 mainly includes a transmission plate 28, a planar antenna 31, a wave retardation member 33, a cover member 34, a waveguide 37, and a microwave generator 39.
- a transmission plate 28 as a dielectric member is disposed on a support 13 a protruding to the inner peripheral side of the plate 13.
- the transmission plate 28 is made of a dielectric that transmits microwaves, such as quartz, ceramics such as Al 2 O 3 , or AlN. In particular, when used as a plasma CVD apparatus, ceramics such as Al 2 O 3 and AlN are preferable.
- a space between the transmission plate 28 and the support portion 13a is airtightly sealed via a seal member 29. Therefore, the inside of the processing container 1 is kept airtight.
- the flat antenna 31 is provided above the transmission plate 28 so as to face the mounting table 2.
- the planar antenna 31 has a disk shape.
- the shape of the planar antenna 31 is not limited to the disk shape, and may be, for example, a square plate shape.
- the planar antenna 31 is locked to the upper end of the plate 13.
- the planar antenna 31 is made of, for example, a copper plate whose surface is plated with gold or silver, a nickel plate, a SUS plate, or an aluminum plate.
- the planar antenna 31 has a large number of slot-like microwave radiation holes 32 for radiating microwaves.
- the microwave radiation holes 32 are formed through the planar antenna 31 in a predetermined pattern.
- the individual microwave radiation holes 32 have an elongated rectangular shape (slot shape), and two adjacent microwave radiation holes are paired. And typically, adjacent microwave radiation holes 32 are arranged in an “L” shape. Further, the microwave radiation holes 32 arranged in combination in a predetermined shape (for example, an L-shape) in this manner are further arranged concentrically as a whole.
- the length and arrangement interval of the microwave radiation holes 32 are determined according to the wavelength ( ⁇ g) of the microwaves.
- the distance between the microwave radiation holes 32 is set to be ⁇ g / 4 to ⁇ g.
- the interval between the adjacent microwave radiation holes 32 formed concentrically is indicated by ⁇ r.
- the shape of the microwave radiation hole 32 may be another shape such as a circular shape or an arc shape.
- the arrangement form of the microwave radiation holes 32 is not particularly limited, and may be arranged in, for example, a spiral shape, a radial shape, etc. in addition to the concentric shape.
- a wave retarding member 33 having a dielectric constant larger than that of vacuum, for example, quartz, Al 2 O 3 , AlN, resin or the like is provided.
- the wave retarding member 33 has a function of adjusting the plasma by shortening the wavelength of the microwave since the wavelength of the microwave becomes long in vacuum.
- planar antenna 31 and the transmission plate 28 and the wave retarding member 33 and the planar antenna 31 may be in contact with or separated from each other, but are preferably in contact with each other.
- a cover member 34 is provided on the top of the plate 13 so as to cover the planar antenna 31 and the wave retarding member 33.
- the cover member 34 is formed of, for example, a metal material such as aluminum or stainless steel.
- the plate 13 and the cover member 34 are sealed by a seal member 35.
- a cooling water channel 34 a is formed in the cover member 34.
- the cover member 34, the wave retardation member 33, the planar antenna 31, and the transmission plate 28 can be cooled by flowing the cooling water through the cooling water flow passage 34a.
- the cover member 34 is grounded.
- An opening 36 is formed at the center of the upper wall (ceiling) of the cover member 34, and a waveguide 37 is connected to the opening 36.
- a microwave generator 39 for generating microwaves is connected to the other end of the waveguide 37 through the matching circuit 38.
- the waveguide 37 includes a coaxial waveguide 37a having a circular cross section and extending upward from the opening 36 of the cover member 34, and a horizontally extending rectangular conductor connected to the upper end of the coaxial waveguide 37a. And a wave tube 37b.
- An inner conductor 41 extends at the center of the coaxial waveguide 37a.
- the inner conductor 41 is connected and fixed to the center of the planar antenna 31 at its lower end. With such a structure, the microwaves are efficiently and uniformly propagated radially to the planar antenna 31 via the inner conductor 41 of the coaxial waveguide 37a.
- the microwaves generated by the microwave generator 39 are propagated to the planar antenna 31 through the waveguide 37 by the microwave introduction mechanism 27 configured as described above, and further into the processing chamber 1 through the transmission plate 28. It is supposed to be introduced.
- a frequency of a microwave 2.45 GHz is preferably used, and 8.35 GHz, 1.98 GHz, etc. can also be used other than that, for example.
- the control unit 50 includes a computer, and as illustrated in FIG. 3, for example, includes a process controller 51 having a CPU, and a user interface 52 and a storage unit 53 connected to the process controller 51.
- the process controller 51 relates to each component related to process conditions such as temperature, pressure, gas flow rate, microwave output, high frequency output for bias application (for example, heater power supply 5a, high frequency power supply 9, It is a control means that controls the gas supply mechanism 18, the exhaust device 24, the microwave generator 39, etc. in an integrated manner.
- the user interface 52 has a keyboard for a process manager to perform an input operation of a command to manage the plasma CVD apparatus 100, a display for visualizing and displaying the operation status of the plasma CVD apparatus 100, and the like.
- the storage unit 53 stores a control program (software) for realizing various processes executed by the plasma CVD apparatus 100 by control of the process controller 51, and a recipe in which processing condition data and the like are recorded. There is.
- recipes such as the control program and processing condition data may be stored in a computer readable storage medium such as a CD-ROM, a hard disk, a flexible disk, a flash memory, a DVD, a Blu-ray disk, etc. Alternatively, it may be used online from another device, for example, transmitted at any time via a dedicated line.
- the gate valve 17 is opened, and the wafer W is loaded into the processing container 1 from the loading / unloading port 16 and placed on the mounting table 2.
- the nitrogen-containing gas, the silicon-containing compound gas, and the silicon-containing compound gas from the nitrogen-containing gas supply source 19a of the gas supply mechanism 18, the silicon-containing compound gas supply source 19b and the inert gas supply source 19c.
- An inert gas is introduced into the processing vessel 1 at a predetermined flow rate through the first gas introducing unit 14 and the second gas introducing unit 15, respectively. Then, the inside of the processing container 1 is adjusted to a predetermined pressure.
- the microwave having a predetermined frequency, for example, 2.45 GHz generated by the microwave generator 39 is guided to the waveguide 37 through the matching circuit 38.
- the microwave guided to the waveguide 37 sequentially passes through the rectangular waveguide 37 b and the coaxial waveguide 37 a and is supplied to the planar antenna plate 31 via the inner conductor 41. That is, the microwave propagates in the coaxial waveguide 37 a toward the planar antenna plate 31.
- the microwaves are radiated from the slot-shaped microwave radiation holes 32 of the planar antenna plate 31 through the transmission plate 28 to the space above the wafer W in the processing container 1.
- the microwave output at this time is preferably in the range of 0.25 to 2.56 W / cm 2 as the output density per area of the transmission plate 28 in the region through which the microwaves transmit.
- the microwave output can be selected, for example, from within the range of 500 to 5000 W so as to have an output density within the above range according to the purpose.
- An electromagnetic field is formed in the processing container 1 by the microwaves radiated from the planar antenna 31 through the transmission plate 28 to the processing container 1, and the nitrogen-containing gas and the silicon-containing compound gas are converted to plasma. Then, dissociation of the source gas proceeds efficiently in the plasma, and Si p H q , SiH q , NH q , N (here, p and q mean an arbitrary number, and so on).
- a thin film of silicon nitride SiN is deposited by the reaction of the active species.
- the silicon nitride film deposited in the chamber is cleaned with heat of 100 to 500 ° C., preferably 200 to 300 ° C., by supplying ClF 3 gas as a cleaning gas into the chamber. To be removed.
- ClF 3 gas as a cleaning gas
- plasma is generated at room temperature to 300 ° C.
- high frequency power of a predetermined frequency and size is supplied to the electrode 7 of the mounting table 2 from the high frequency power supply 9, and an RF bias is applied to the wafer W.
- the plasma CVD apparatus 100 since the electron temperature of plasma can be maintained low, there is no damage to the film, and furthermore, since the molecules of the film forming gas are easily dissociated by the high density plasma, the reaction is promoted.
- the application of the RF bias in an appropriate range acts to draw ions in the plasma into the wafer W, thereby enhancing the density of the silicon nitride film and acting to increase the traps in the film. .
- the frequency of the RF bias supplied from the high frequency power supply 9 is, for example, preferably in the range of 400 kHz to 60 MHz, and more preferably in the range of 450 kHz to 20 MHz.
- the RF bias is preferably applied in the range of, for example, 0.009 W / cm 2 or more and 0.64 W / cm 2 or less as the power density per area of the wafer W, and is preferably 0.016 W / cm 2 or more and 0.095 W / cm. It is more preferable to apply within the range of 2 or less.
- the RF bias power is preferably in the range of 3 W to 200 W, more preferably in the range of 5 W to 20 W, and the RF bias can be applied by supplying the electrode with the above output density.
- the above conditions are stored as a recipe in the storage unit 53 of the control unit 50.
- the process controller 51 reads the recipe and sends control signals to each component of the plasma CVD apparatus 100, such as the gas supply mechanism 18, the exhaust device 24, the microwave generator 39, the heater power supply 5a, the high frequency power supply 9 and the like.
- the plasma CVD process under desired conditions is realized.
- the pressure condition of the plasma CVD process at the time of forming the silicon nitride film is constant, and the RF bias power supplied from the high frequency power supply 9 to the electrode 7 of the mounting table 2 is 0.
- the RF bias power supplied from the high frequency power supply 9 to the electrode 7 of the mounting table 2 is 0.
- FIG. 4 is a process diagram showing a manufacturing process of a silicon nitride film performed in plasma CVD apparatus 100.
- plasma CVD processing is performed on an arbitrary base layer (for example, a Si substrate or a silicon dioxide film) 60 using an N 2 / Si 2 H 6 plasma.
- the processing pressure is set to be constant in the range of 10 Pa to 133.3 Pa, preferably in the range of 20 Pa to 60 Pa.
- RF power within the range of 0.009 W / cm 2 or more and 0.64 W / cm 2 is supplied from the high frequency power source 9 to the electrode 7 of the mounting table 2.
- the silicon nitride film 70 can be formed.
- the number of traps in the silicon nitride film 70 can be uniformly increased as compared to the case where the RF bias is not applied.
- the plasma CVD apparatus 100 uses the N 2 gas as the nitrogen-containing gas, the Si 2 H 6 gas as the silicon-containing compound gas, and the Ar gas as the plasma generation gas, the plasma CVD apparatus 100 performs plasma CVD under the following plasma CVD conditions, A single silicon nitride film was formed.
- the hysteresis of the refractive index, the wet etching rate and the flat band potential (Vfb) was measured for the silicon nitride film formed under each condition.
- the hysteresis of Vfb was measured by the Hg probe method which is the following well-known technique.
- FIG. 5A a test device having a capacitor structure as shown in FIG. 5A was prepared.
- reference numeral 91 denotes a silicon substrate
- 93 denotes a silicon nitride film (gate insulating film) formed by plasma CVD
- 95 denotes a mercury gate electrode.
- the voltage was changed from -20 V to 10 V and applied to the mercury gate electrode 95 (forward), and then changed from 10 V to -20 V in reverse, and applied (reverse).
- FIG. 5B Vfb hysteresis was obtained from the forward and reverse CV curves (hysteresis curves) by measuring the capacitance in the process of applying voltage to and from the circuit.
- the fact that the CV curve changes due to the application of a voltage back and forth means that holes are trapped in the silicon nitride film due to the application of the voltage, resulting in a change in voltage to cancel out the charge.
- Processing temperature (mounting table): 400 ° C.
- Microwave power 2 kW (power density 1.023 W / cm 2 ; per transmission plate area) Processing pressure; 2.7Pa, 26.6Pa, 40Pa Ar gas flow rate; 600 mL / min (sccm) N 2 gas flow rate; 400 mL / min (sccm) Si 2 H 6 gas flow rate; 2 mL / min (sccm) RF bias frequency: 13.56 MHz
- RF bias power 0 W, 5 W (power density 0.016 W / cm 2 ), 10 W (power density 0.032 W / cm 2 ), 50 W (power density 0.16 W / cm 2 )
- FIG. 6A shows the relationship between the refractive index of the silicon nitride film and the RF bias power supplied to the mounting table 2.
- FIG. 6B shows the relationship between the wet etching rate of the silicon nitride film using dilute hydrofluoric acid and the RF bias power supplied to the mounting table 2.
- FIG. 6C shows the relationship between the magnitude of the hysteresis in the Vfb measurement of the silicon nitride film and the RF bias power supplied to the mounting table 2. From FIG.
- the refractive index is preferably as high as 1.85 or more at a treatment pressure of 2.7 Pa, 26.6 Pa and 40.0 Pa at an RF bias of 0.16 W / cm 2 , and in particular 2.7 Pa At a treatment pressure of 1, the refractive index is as high as 1.95 or more, and more preferable. Furthermore, when the RF bias is 0.016 W / cm 2 , the refractive index is preferably as high as about 1.90 or more at processing pressures of 2.7 Pa, 26.6 Pa and 40.0 Pa.
- Figures 6 (a) ⁇ (c) the process pressure of 26.6Pa and 40 Pa, power density by applying approximately 0.016W / cm 2 ⁇ 0.032W / cm 2 about RF bias, the refractive index , The wet etching rate was low, and the Vfb hysteresis changed high.
- the improvement of the refractive index, the reduction of the wet etching rate, and the improvement of the Vfb hysteresis are when the RF bias is not applied when the power density is within the range of 0.016 W / cm 2 or more and 0.032 W / cm 2 or less.
- the RF bias is applied at a power density of 0.16 W / cm 2 , the variation is reduced.
- FIGS. 6 (a) to 6 (c) show that the density of the silicon nitride film is improved and the traps in the film are uniformly increased by applying the RF bias at an appropriate range of power density. It shows that it can be done.
- the seemingly contradictory data above can be rationally explained by interpreting it as follows.
- plasma CVD by applying an RF bias to the wafer W, the ions in the plasma are more likely to be drawn into the wafer W.
- the electron temperature can be kept low (0.7 to 2 eV) even when the RF bias is applied, so the electron temperature is kept low even under a low pressure condition of 26.6 Pa to 40 Pa, for example Ru.
- the RF bias is applied at a power density in the range of 0.016 to 0.032 W / cm 2 , and the processing pressure is 40 Pa or less (e.g. 10 It was shown that by setting in the range of ⁇ 40 Pa), it is possible to form a silicon nitride film in which the number of traps is large and the distribution of traps is uniformly controlled.
- a high performance exhaust device such as a turbo molecular pump is no longer required, and There is an advantage that the device load can be reduced and the cost can be reduced, such as being able to be reduced. Also, in a high vacuum state of 3 Pa or less, there are process problems such as increased risk of contamination of the wafer W due to particles or the like due to ion sputtering or the like, or reduction in coverage performance in forming a silicon nitride film. However, these problems can also be avoided by setting the processing pressure in a high range.
- Plasma CVD was performed by changing Ar flow rate under the following conditions, and Vfb hysteresis was measured by the same method as described above.
- Processing temperature (mounting table): 400 ° C.
- Microwave power 2 kW (power density 1.023 W / cm 2 ; per transmission plate area)
- Processing pressure 26.6 Pa
- Ar gas flow rate 100 mL / min (sccm), 600 mL / min (sccm), 1100 mL / min (sccm) N 2 gas flow rate; 400 mL / min (sccm) Si 2 H 6 gas flow rate; 2 mL / min (sccm)
- RF bias frequency 13.56 MHz
- RF bias power 5 W (power density 0.016 W / cm 2 )
- the flow rate of Ar gas is preferably in the range of 50 to 1000 mL / min (sccm), and more preferably in the range of 100 to 800 mL / min (sccm) .
- the flow ratio (Ar / N 2 ) of Ar gas to N 2 gas is preferably in the range of 0.1 or more and 3 or less, and in view of increasing the number of traps, Ar / N 2 is 2 or less (for example, 0. It is preferable to select from the range of 2 or more and 2 or less).
- Ar ions in the plasma increase, so the Vfb hysteresis decreases and the number of traps decreases.
- the flow ratio (Si 2 H 6 / Ar) of the Si 2 H 6 gas to the Ar gas is preferably selected from the range of 0.005 or more and 0.01 or less.
- the flow rate of N 2 gas is in the range of 100 to 1000 mL / min (sccm), preferably in the range of 100 to 500 mL / min (sccm), and the flow rate of Si 2 H 6 gas is 0.5 to 40 mL / min (sccm).
- the flow rate ratio can be set within the range of sccm), preferably within the range of 0.5 to 10 mL / min (sccm).
- the processing temperature of the plasma CVD process may be set to a temperature of the mounting table 2 of 300 ° C. to 600 ° C., preferably 400 ° C. to 600 ° C.
- the power density of the microwave in the plasma CVD process is preferably in the range of 0.25 W / cm 2 or more 2.56 W / cm 2 or less per area of the transmissive plate microwaves transmitted.
- the silicon nitride film having a desired amount of traps is easily formed on the wafer W by performing the plasma CVD by selecting the RF bias power and the processing pressure. Can be manufactured.
- the silicon nitride film having a large number of traps thus formed can be advantageously used, for example, as a charge storage layer of a MOS semiconductor memory device.
- the conditions of the plasma CVD process at the time of forming the silicon nitride film particularly the RF bias supplied from the high frequency power supply 9 to the electrode 7 of the mounting table 2.
- the RF bias supplied from the high frequency power supply 9 to the electrode 7 of the mounting table 2.
- FIG. 8 is a process diagram showing a film forming step of laminating and forming a silicon nitride film performed in the plasma CVD apparatus 100.
- an RF bias of 0.009 is applied on an arbitrary base layer (for example, a Si substrate or a silicon dioxide film) 60 at a pressure in the range of 10 Pa to 133.3 Pa. while applying at a power density in the range of ⁇ 0.64W / cm 2 (RF bias / ON), performing plasma CVD process using a mixed gas plasma of N 2 gas and Si 2 H 6 gas, FIG. 8 (b
- the first silicon nitride film 70 is formed as shown in FIG.
- the silicon nitride film 70 has a large number of traps in the film.
- Plasma CVD processing is performed using mixed gas plasma of N 2 gas and Si 2 H 6 gas.
- a second silicon nitride film 71 having a second band gap is formed.
- the second silicon nitride film 71 is a silicon nitride film in which the number of traps in the film is smaller than that of the first silicon nitride film 70.
- the RF bias is set to 0.009 to 0.64 W for the second silicon nitride film 71 at a pressure in the range of 10 Pa to 133.3 Pa.
- the plasma CVD process can be performed using a mixed gas plasma of N 2 gas and Si 2 H 6 gas while applying (RF bias / ON) at a power density of 1 / cm 2 .
- the third silicon nitride film 72 can be formed.
- the number of traps in the third silicon nitride film 72 may be equal to that of the first silicon nitride film 70, or may be different from that of the first silicon nitride film 70.
- the number of traps in the third silicon nitride film 72 can be controlled by the magnitude of the applied RF bias.
- the silicon nitride film stack 80 having a desired layer structure can be formed by performing the plasma CVD process repeatedly as many times as necessary.
- the first process is performed by turning on / off the RF bias on the underlayer in a state in which the processing pressure is set constant.
- the number of traps in the silicon nitride film 70, the second silicon nitride film 71, and the third silicon nitride film 72 can be changed.
- the film forming gas containing the silicon-containing compound gas and the nitrogen gas switching the RF bias ON / OFF or changing the size of the RF bias in the range of the minute bias. It is possible to deposit silicon nitride films by alternately depositing silicon nitride films having different numbers of traps.
- the number of traps and the distribution of each silicon nitride film can be uniformly controlled only by control with a small RF bias with a constant processing pressure.
- the method of the present invention to, for example, laminating the silicon nitride film as a charge storage region of a MOS semiconductor memory device, a MOS semiconductor memory device having excellent data write characteristics can be manufactured.
- FIG. 9 is a cross-sectional view showing a schematic configuration of the MOS semiconductor memory device 201.
- the MOS semiconductor memory device 201 is further formed on a p-type silicon substrate 101 as a semiconductor layer, a plurality of insulating films stacked on the p-type silicon substrate 101 and having different numbers of traps, and And the gate electrode 103.
- a first insulating film 111, a second insulating film 112, a third insulating film 113, a fourth insulating film 114, and a fifth insulating film are provided between the silicon substrate 101 and the gate electrode 103. And 115 are provided.
- the second insulating film 112, the third insulating film 113, and the fourth insulating film 114 are all silicon nitride films, and form a laminated silicon nitride film 102a.
- first source / drain 104 and second source / drain 105 which are n-type diffusion layers are formed at a predetermined depth from the surface so as to be located on both sides of the gate electrode 103.
- a channel formation region 106 is formed between the two.
- the MOS type semiconductor memory device 201 may be formed in ap well or ap type silicon layer formed in a semiconductor substrate. Further, although the present embodiment will be described by taking an n-channel MOS device as an example, it may be implemented by a p-channel MOS device. Therefore, the contents of the present embodiment described below can be applied to all n channel MOS devices and p channel MOS devices.
- the first insulating film 111 is, for example, a silicon dioxide film (SiO 2 film) formed by oxidizing the surface of the silicon substrate 101 by a thermal oxidation method.
- the thickness of the first insulating film 111 is, for example, preferably in the range of 0.5 nm to 20 nm, and more preferably in the range of 1 nm to 3 nm.
- the second insulating film 112 constituting the laminated silicon nitride film 102 a is a silicon nitride film (SiN film) formed on the surface of the first insulating film 111 (herein, the composition ratio of Si to N is necessarily stoichiometric) Not determined, but different values depending on the film forming conditions (the same applies hereinafter).
- the film thickness of the second insulating film 112 is, for example, preferably in the range of 2 nm to 20 nm, and more preferably in the range of 3 nm to 5 nm.
- the third insulating film 113 is a silicon nitride film (SiN film) formed on the second insulating film 112.
- the film thickness of the third insulating film 113 is, for example, preferably in the range of 2 nm to 30 nm, and more preferably in the range of 4 nm to 10 nm.
- the fourth insulating film 114 is a silicon nitride film (SiN film) formed on the third insulating film 113.
- the fourth insulating film 114 has, for example, the same number of traps and the same film thickness as the second insulating film 112.
- the fifth insulating film 115 is a silicon dioxide film (SiO 2 film) deposited on the fourth insulating film 114 by, for example, the CVD method.
- the fifth insulating film 115 functions as a block layer (barrier layer) between the electrode 103 and the fourth insulating film 114.
- the film thickness of the fifth insulating film 115 is, for example, preferably in the range of 2 nm to 30 nm, and more preferably in the range of 5 nm to 8 nm.
- a polysilicon layer may be formed as a floating gate electrode between the first insulating film 111 and the second insulating film 112.
- the gate electrode 103 is made of, for example, a polycrystalline silicon film formed by the CVD method, and functions as a control gate (CG) electrode. Further, the gate electrode 103 may be a layer containing a metal such as W, Ti, Ta, Cu, Al, Au, or Pt.
- the gate electrode 103 is not limited to a single layer, and for the purpose of reducing the specific resistance of the gate electrode 103 and increasing the operating speed of the MOS semiconductor memory device 201, for example, tungsten, molybdenum, tantalum, titanium, platinum or their silicides. A laminated structure including nitride, an alloy, and the like can also be used.
- the gate electrode 103 is connected to a wiring layer not shown.
- the laminated silicon nitride film 102a formed of the second insulating film 112, the third insulating film 113 and the fourth insulating film 114 is a charge storage region mainly storing charge. It is. Therefore, when forming the second insulating film 112, the third insulating film 113 and the fourth insulating film 114, the film forming method of the silicon nitride film according to the first embodiment of the present invention is applied, The data write performance and data retention performance of the MOS semiconductor memory device 201 can be adjusted by controlling the number of traps and their distribution.
- the film forming method of the laminated silicon nitride film according to the second embodiment of the present invention is applied, and the second insulating film 112, the third insulating film 113 and the fourth insulating film 114 are plasma CVD devices. It is also possible to manufacture continuously in the same processing container by making the processing pressure constant at 100, switching the ON / OFF of the RF bias, or changing the size thereof.
- a silicon substrate 101 on which an element isolation film (not shown) is formed by a method such as LOCOS (Local Oxidation of Silicon) method or STI (Shallow Trench Isolation) method is prepared, and the surface thereof is, for example, a thermal oxidation method.
- a first insulating film 111 is formed.
- a second insulating film 112, a third insulating film 113, and a fourth insulating film 114 are sequentially formed on the first insulating film 111 by plasma CVD using the plasma CVD apparatus 100.
- the processing pressure is set in the range of 10 Pa to 133.3 Pa, and the electrode 7 of the mounting table 2 is 0.009 W / cm 2 to 0.64 W per area of the wafer W.
- RF power is supplied at a power density within the range of 1 cm ⁇ 2 > or less.
- RF bias is applied to the silicon substrate 101 to perform film formation so that many traps are formed with uniform distribution.
- plasma CVD is performed without applying an RF bias to the silicon substrate 101 so that the number of traps in the film is smaller than that of the second insulating film 112.
- film forming conditions different from the film forming conditions for forming the third insulating film 113 for example, RF bias similar to that in forming the second insulating film 112 is used for the silicon substrate
- Plasma CVD is performed by applying (101) to make the number of traps in the film larger than that of the third insulating film 113.
- the number of traps in each film can be controlled by making the processing pressure of the plasma CVD process constant, switching the application of the RF bias ON / OFF, or changing the size thereof.
- the fifth insulating film 115 is formed over the fourth insulating film 114.
- the fifth insulating film 115 can be formed, for example, by the CVD method. Further, on the fifth insulating film 115, a polysilicon layer, a metal layer, a metal silicide layer, or the like is formed by, eg, CVD to form a metal film to be the gate electrode 103.
- the metal film and the fifth insulating film 115 to the first insulating film 111 are etched using the patterned resist as a mask using a photolithography technique to form the patterned gate electrode 103 and the plurality of gate electrodes 103.
- a gate stack structure having an insulating film is obtained.
- n-type impurities are ion-implanted in high concentration on the silicon surface adjacent to both sides of the gate stack to form the first source / drain 104 and the second source / drain 105.
- the MOS semiconductor memory device 201 having the structure shown in FIG. 9 can be manufactured.
- the number of traps in the second insulating film 112 and the fourth insulating film 114 is made larger than the number of traps in the third insulating film 113 in the laminated silicon nitride film 102 a.
- the number of traps in the third insulating film 113 may be increased as compared with the number of traps in the second insulating film 112 and the fourth insulating film 114. Further, the number of traps in the second insulating film 112 and the number of traps in the fourth insulating film 114 do not have to be the same.
- FIG. 9 exemplifies the case where the laminated silicon nitride film 102a has three layers including the second insulating film 112 to the fourth insulating film 114, the method of the present invention has two silicon nitride films.
- the present invention can also be applied to the case of manufacturing a MOS type semiconductor memory device having a laminated silicon nitride film laminated in four or more layers.
- Planar antenna 32 microwave radiation hole 37 waveguide 39 microwave generator 50 control unit 100 plasma CVD device 101 silicon substrate 102a laminated silicon nitride film 103 gate electrode 104 first source / drain 105 second source / drain 111 first insulating film 112 second insulating film 113 third insulating film 114 fourth insulating film 11 ... fifth insulating film 201 ... MOS type semiconductor memory device W ... silicon wafer (substrate)
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Abstract
Description
本発明は、窒化珪素膜の成膜方法、この方法に用いるコンピュータ読み取り可能な記憶媒体およびプラズマCVD装置に関する。 The present invention relates to a method of forming a silicon nitride film, a computer readable storage medium used in this method, and a plasma CVD apparatus.
現在、電気的書換え動作が可能なEEPROM(Electrically Erasable and Programmable ROM)などに代表される不揮発性半導体メモリ装置としては、SONOS(Silicon−Oxide−Nitride−Oxide−Silicon)型やMONOS(Metal−Oxide−Nitride−Oxide−Silicon)型と呼ばれる積層構造を有するものがある。これらのタイプの不揮発性半導体メモリ装置では、二酸化珪素膜(Oxide)に挟まれた1層以上の窒化珪素膜(Nitride)を電荷蓄積領域として情報の保持が行われる。つまり、上記不揮発性半導体メモリ装置では、半導体基板(Silicon)とコントロールゲート電極(SiliconまたはMetal)との間に電圧を印加することによって、電荷蓄積領域の窒化珪素膜に電子を注入してデータを保存したり、窒化珪素膜に蓄積された電子を除去したりして、データの保存と消去の書換えを行っている。上記不揮発性半導体メモリ装置において、データ書込み特性は電荷蓄積領域である窒化珪素膜への電子の注入のしやすさと関係があり、特に窒化珪素膜中に存在する電荷捕獲中心(トラップ)と関係があると考えられる。 At present, non-volatile semiconductor memory devices represented by EEPROM (Electrically Erasable and Programmable ROM) and the like capable of electrically rewriting operation include SONOS (Silicon-Oxide-Nitride-Oxide-Silicon) type and MONOS (Metal-Oxide-). Some have a laminated structure called Nitride-Oxide-Silicon type. In these types of nonvolatile semiconductor memory devices, holding of information is performed with one or more silicon nitride films (Nitride) sandwiched between silicon dioxide films (Oxide) as charge storage regions. That is, in the non-volatile semiconductor memory device described above, a voltage is applied between the semiconductor substrate (Silicon) and the control gate electrode (Silicon or Metal) to inject electrons into the silicon nitride film of the charge storage region and data is stored. Data is stored and erased by rewriting or removing electrons accumulated in the silicon nitride film. In the above nonvolatile semiconductor memory device, the data write characteristic is related to the ease of electron injection into the silicon nitride film which is the charge storage region, and in particular to the charge trapping center (trap) present in the silicon nitride film. It is believed that there is.
不揮発性半導体メモリ装置に関する技術として、特許文献1には、窒化珪素膜とトップ酸化膜との界面のトラップ密度を増加させる目的で、これらの膜の中間部分にSiを多く含有する遷移層を設けることが記載されている。 As a technology relating to a nonvolatile semiconductor memory device, in Patent Document 1, a transition layer containing a large amount of Si is provided in the middle portion of these films for the purpose of increasing the trap density at the interface between the silicon nitride film and the top oxide film. It is described.
近年の半導体装置の高集積化に伴い、不揮発性半導体メモリ装置の素子構造も急速に微細化が進んでいる。不揮発性半導体メモリ装置を微細化するためには、個々の不揮発性半導体メモリ装置において、電荷蓄積層である窒化珪素膜のトラップ数を増加させ、データ書込み性能を高める必要がある。 With the recent high integration of semiconductor devices, the device structure of nonvolatile semiconductor memory devices is also rapidly miniaturized. In order to miniaturize the non-volatile semiconductor memory device, it is necessary to increase the number of traps of the silicon nitride film which is the charge storage layer in each non-volatile semiconductor memory device to improve the data write performance.
しかしながら、減圧CVD法や熱CVD法による成膜方法では、窒化珪素膜の形成過程で膜中のトラップ形成をコントロールすることは技術的に困難であった。また、プラズマCVD法では、多くの場合、エッチングのハードマスクやストッパー膜として使用される、緻密で欠陥が少ない窒化珪素膜の形成を目標としていた。もっとも、プラズマCVD法では、処理容器内の処理圧力を高真空状態(例えば3Pa以下)に設定してプラズマのイオン性を強めることにより、形成される窒化珪素膜中に多くのトラップを形成することが可能であると考えられていた。しかし、処理容器内を高真空状態に維持するためには、高性能の排気装置が必要になることや、高真空状態に耐えうる真空シール技術、耐圧容器が必要になるなど、装置負荷が増大し、コストも高くなるという欠点があった。また、高真空状態では、プラズマエネルギーが高くなるため、処理容器内の部品等へのスパッタリング作用が強くなり、パーティクル等による汚染危険性が増加したり、窒化珪素膜形成におけるカバレッジ性能が低下したりするなど、プロセス的な側面でも問題を有していた。さらに、従来のプラズマCVD法で成膜した窒化珪素膜は、トラップの分布が不均一であったため、電荷蓄積層として使用できなかった。 However, in the film forming method by the low pressure CVD method or the thermal CVD method, it is technically difficult to control the trap formation in the film in the process of forming the silicon nitride film. Further, in the plasma CVD method, the goal is to form a dense silicon film having few defects, which is often used as a hard mask or a stopper film for etching. However, in the plasma CVD method, many traps are formed in the formed silicon nitride film by setting the processing pressure in the processing container to a high vacuum state (for example, 3 Pa or less) to strengthen the ionicity of plasma. Was considered possible. However, in order to maintain the inside of the processing vessel in a high vacuum state, equipment load increases, such as the need for a high-performance exhaust system, the vacuum sealing technology that can withstand high vacuum states, and the pressure-resistant vessel. And the cost is high. In the high vacuum state, the plasma energy is high, so the sputtering action to the parts in the processing vessel becomes strong, the risk of contamination by particles etc increases, or the coverage performance in forming the silicon nitride film decreases. And there were problems in the process side as well. Furthermore, the silicon nitride film formed by the conventional plasma CVD method can not be used as a charge storage layer because the distribution of traps is nonuniform.
本発明は上記実情に鑑みてなされたものであり、その第1の目的は、プラズマCVD法により電荷蓄積層として利用可能な、トラップが多数存在する窒化珪素膜を成膜する方法を提供することである。また、本発明の第2の目的は、プラズマCVD法により個々の窒化珪素膜のトラップの数が異なる窒化珪素膜を積層して成膜する方法を提供することである。 The present invention has been made in view of the above situation, and its first object is to provide a method of forming a silicon nitride film having many traps, which can be used as a charge storage layer by plasma CVD. It is. A second object of the present invention is to provide a method of forming a film by laminating silicon nitride films different in the number of traps of individual silicon nitride films by plasma CVD.
本発明の窒化珪素膜の成膜方法は、複数の孔を有する平面アンテナにより処理容器内にマイクロ波を導入してプラズマを生成するプラズマCVD装置を用い、被処理体上にプラズマCVD法によって窒化珪素膜を形成する窒化珪素膜の成膜方法であって、
前記処理容器内の圧力を10Pa以上133.3Pa以下の範囲内に設定し、被処理体を載置する載置台の電極に被処理体の面積当り0.009W/cm2以上0.64W/cm2以下の範囲内の出力密度で高周波電力を供給して被処理体に高周波バイアスを印加しながら、シリコン含有化合物ガスと窒素ガスを含む成膜ガスを用いてプラズマCVDを行うことにより窒化珪素膜を形成する工程を備えている。
The method for forming a silicon nitride film according to the present invention uses a plasma CVD apparatus that generates a plasma by introducing microwaves into a processing container with a planar antenna having a plurality of holes, and nitrides the object to be processed by plasma CVD. A method of forming a silicon nitride film for forming a silicon film, the method comprising:
The pressure in the processing vessel is set in the range of 10 Pa to 133.3 Pa, and the electrode of the mounting table on which the object to be processed is mounted is 0.009 W / cm 2 to 0.64 W / cm per area of the object to be processed. Silicon nitride film by performing plasma CVD using a film forming gas containing a silicon-containing compound gas and a nitrogen gas while supplying a high frequency power with a power density within the range of 2 or less and applying a high frequency bias to the object And the process of forming the
また、本発明の窒化珪素膜の成膜方法は、複数の孔を有する平面アンテナにより処理容器内にマイクロ波を導入してプラズマを生成するプラズマCVD装置を用い、被処理体上にプラズマCVD法によって窒化珪素膜を積層して形成する窒化珪素膜の成膜方法であって、
前記処理容器内の圧力を10Pa以上133.3Pa以下の範囲内に設定し、被処理体を載置する載置台の電極に被処理体の面積当り0.009W/cm2以上0.64W/cm2以下の範囲内の出力密度で高周波電力を供給して被処理体に高周波バイアスを印加しながら、シリコン含有化合物ガスと窒素ガスを含む成膜ガスを用いてプラズマCVDを行うことにより窒化珪素膜を形成する第1の工程と、
前記第1の工程と同じ設定圧力で、前記載置台の電極に高周波電力を供給しないか、前記第1の工程とは異なる出力密度で高周波電力を供給して被処理体に高周波バイアスを印加して、シリコン含有化合物ガスと窒素ガスを含む成膜ガスを用いてプラズマCVDを行うことにより、前記第1の工程で形成される窒化珪素膜と比べてトラップの存在数が少ない窒化珪素膜を形成する第2の工程と、
を備えている。
Further, the method for forming a silicon nitride film according to the present invention uses a plasma CVD apparatus for generating plasma by introducing microwaves into a processing container by a planar antenna having a plurality of holes, and plasma CVD method on a processing object Forming a silicon nitride film by laminating the silicon nitride film by
The pressure in the processing vessel is set in the range of 10 Pa to 133.3 Pa, and the electrode of the mounting table on which the object to be processed is mounted is 0.009 W / cm 2 to 0.64 W / cm per area of the object to be processed. Silicon nitride film by performing plasma CVD using a film forming gas containing a silicon-containing compound gas and a nitrogen gas while supplying a high frequency power with a power density within the range of 2 or less and applying a high frequency bias to the object A first step of forming
The high frequency power is not supplied to the electrode of the mounting table at the same set pressure as the first step, or the high frequency power is supplied at an output density different from the first step to apply the high frequency bias to the object By performing plasma CVD using a film forming gas containing a silicon-containing compound gas and a nitrogen gas, a silicon nitride film in which the number of traps is smaller than that of the silicon nitride film formed in the first step is formed. The second step of
Is equipped.
本発明の窒化珪素膜積層体の製造方法において、前記第1のCVD工程と前記第2のCVD工程を繰り返し行うことが好ましい。 In the method for manufacturing a silicon nitride film laminate of the present invention, it is preferable to repeatedly perform the first CVD step and the second CVD step.
本発明のコンピュータ読み取り可能な記憶媒体は、コンピュータ上で動作する制御プログラムが記憶されたコンピュータ読み取り可能な記憶媒体であって、
前記制御プログラムは、実行時に、複数の孔を有する平面アンテナにより処理容器内にマイクロ波を導入してプラズマを生成させるプラズマCVD装置を用い、被処理体上にプラズマCVD法によって窒化珪素膜を形成するに際し、10Pa以上133.3Pa以下の範囲内の処理圧力で、被処理体を載置する載置台の電極に被処理体の面積当り0.009W/cm2以上0.64W/cm2以下の範囲内の出力密度で高周波電力を供給し、被処理体に高周波バイアスを印加しながら、シリコン含有化合物ガスと窒素ガスを含む成膜ガスを用いてプラズマCVDが行われるように、コンピュータに前記プラズマCVD装置を制御させるものである。
The computer-readable storage medium of the present invention is a computer-readable storage medium storing a control program that operates on a computer.
The control program forms a silicon nitride film by a plasma CVD method using a plasma CVD apparatus which generates a plasma by introducing a microwave into a processing container by a planar antenna having a plurality of holes at the time of execution. to upon, the processing pressure in the range of 10Pa or more 133.3Pa less, of the workpiece to the electrode of the mounting table for mounting the workpiece area per 0.009 W / cm 2 or more 0.64W / cm 2 or less of The plasma is supplied to the computer such that plasma CVD is performed using a film forming gas containing a silicon-containing compound gas and a nitrogen gas while supplying a high frequency power at a power density within the range and applying a high frequency bias to the object It controls the CVD apparatus.
また、本発明のプラズマCVD装置は、プラズマCVD法により被処理体上に窒化珪素膜を形成するプラズマCVD装置であって、
被処理体を収容する上部が開口した処理容器と、
前記処理容器に配置され、被処理体を載置する載置台と、
前記載置台内に設けられ、被処理体に高周波電力を印加する電極と、
前記電極に接続する高周波電源と、
前記処理容器の前記開口を塞ぐ誘電体部材と、
前記誘電体部材の上部に設けられ、前記処理容器内にマイクロ波を導入するための複数の孔を有する平面アンテナと、
前記処理容器内にシリコン含有化合物ガスと窒素含有ガスを含む成膜ガスを供給するガス供給機構に接続するガス導入部と、
前記処理容器内を減圧排気する排気機構と、
前記電極に被処理体の面積当り0.009W/cm2以上0.64W/cm2以下の範囲内の出力で前記高周波電源より高周波電力を供給して被処理体に高周波バイアスを印加しながら、前記ガス供給機構に接続するガス導入部から前記シリコン含有化合物ガスと前記窒素ガスを含む成膜ガスを前記処理容器内に供給することにより、前記処理容器内において、10Pa以上133.3Pa以下の範囲内の処理圧力で、プラズマCVDが行われるように制御する制御部と、
を備えている。
Further, the plasma CVD apparatus of the present invention is a plasma CVD apparatus for forming a silicon nitride film on an object to be processed by plasma CVD method.
A processing vessel having an open top for containing the object to be treated;
A mounting table which is disposed in the processing container and on which the object to be processed is mounted;
An electrode provided in the mounting table and applying high frequency power to the object;
A high frequency power supply connected to the electrode;
A dielectric member closing the opening of the processing container;
A planar antenna provided above the dielectric member and having a plurality of holes for introducing microwaves into the processing vessel;
A gas introduction unit connected to a gas supply mechanism for supplying a film forming gas containing a silicon-containing compound gas and a nitrogen-containing gas into the processing container;
An exhaust mechanism for depressurizing and exhausting the inside of the processing container;
The high frequency power is supplied from the high frequency power supply to the electrode with an output in the range of 0.009 W / cm 2 or more and 0.64 W / cm 2 or less per area of the object to be treated, and a high frequency bias is applied to the object to be treated The film forming gas containing the silicon-containing compound gas and the nitrogen gas is supplied into the processing container from the gas introduction unit connected to the gas supply mechanism, whereby the range of 10 Pa or more and 133.3 Pa or less is generated in the processing container. A control unit that controls plasma CVD to be performed at an internal processing pressure;
Is equipped.
本発明の窒化珪素膜の成膜方法によれば、複数の孔を有する平面アンテナにより処理容器内にマイクロ波を導入してプラズマを生成するプラズマCVD装置を用い、被処理体を載置する載置台に高周波電力を印加しながら10Pa以上133.3Pa以下の処理圧力でプラズマCVDを行うことにより、トラップの存在数の多い窒化珪素膜を形成することができる。本発明方法では、3Pa以下の高真空状態での成膜に比べて、装置負荷やコンタミネーションの危険性を軽減できる上、窒化珪素膜形成における良好なカバレッジ性能も維持できる。また、本発明方法で成膜した窒化珪素膜は、トラップの分布が均一であることから、電荷蓄積層としての使用に適したものである。 According to the film forming method of the silicon nitride film of the present invention, the object to be processed is mounted by using the plasma CVD apparatus which generates the plasma by introducing the microwave into the processing container by the planar antenna having the plurality of holes. A silicon nitride film with a large number of traps can be formed by performing plasma CVD at a processing pressure of 10 Pa or more and 133.3 Pa or less while applying high frequency power to the table. According to the method of the present invention, the risk of apparatus load and contamination can be reduced as compared with film formation in a high vacuum state of 3 Pa or less, and good coverage performance in forming a silicon nitride film can be maintained. Further, the silicon nitride film formed by the method of the present invention is suitable for use as a charge storage layer since the distribution of traps is uniform.
また、本発明の窒化珪素膜の成膜方法によれば、載置台へ印加する高周波電力のオン/オフを切り替えるだけの操作で、容易に、トラップの存在数が異なる窒化珪素膜を交互に積層形成することが可能であり、データ書込み特性に優れた半導体メモリ装置への応用が可能である。 Further, according to the method of forming a silicon nitride film of the present invention, silicon nitride films having different numbers of traps can be alternately stacked easily by an operation of simply switching on / off high frequency power applied to the mounting table. The semiconductor memory device can be formed and can be applied to a semiconductor memory device excellent in data write characteristics.
図1は窒化珪素膜の形成に適したプラズマCVD装置の一例を示す概略断面図である。
図2は平面アンテナの構造を示す図面である。
図3は制御部の構成を示す説明図である。
図4は第1の実施の形態に係る窒化珪素膜の成膜方法の工程例を示す図面である。
図5はVfbヒステリシスの測定方法を説明する図面であり、(a)は測定に使用したキャパシタの概略説明図、(b)は、CVカーブを示す図面である。
図6は窒化珪素膜形成時のRFバイアスパワーと膜の屈折率、ウエットエッチングレートおよびVfbヒステリシスの測定結果を示すグラフ図面である。
図7は窒化珪素膜形成時のAr流量と膜のVfbヒステリシスの測定結果を示すグラフ図面である。
図8は第2の実施の形態に係る窒化珪素膜積層体の製造方法の工程例を示す図面である。
図9は本発明方法を適用可能なMOS型半導体メモリ装置の概略構成を示す説明図である。
FIG. 1 is a schematic cross-sectional view showing an example of a plasma CVD apparatus suitable for forming a silicon nitride film.
FIG. 2 is a drawing showing the structure of a planar antenna.
FIG. 3 is an explanatory view showing the configuration of the control unit.
FIG. 4 is a drawing showing an example of steps of the method for forming a silicon nitride film according to the first embodiment.
FIG. 5 is a drawing for explaining the measurement method of Vfb hysteresis, in which (a) is a schematic explanatory view of a capacitor used for the measurement, and (b) is a drawing showing a CV curve.
FIG. 6 is a graph showing measurement results of RF bias power, film refractive index, wet etching rate and Vfb hysteresis when forming a silicon nitride film.
FIG. 7 is a graph showing measurement results of Ar flow rate at the time of forming a silicon nitride film and Vfb hysteresis of the film.
FIG. 8 is a drawing showing an example of steps of a method of manufacturing a silicon nitride film laminate according to the second embodiment.
FIG. 9 is an explanatory view showing a schematic configuration of a MOS semiconductor memory device to which the method of the present invention can be applied.
〔第1の実施の形態〕
以下、本発明の実施の形態について図面を参照して詳細に説明する。図1は、本発明の窒化珪素膜の製造方法に利用可能なプラズマCVD装置100の概略構成を模式的に示す断面図である。
First Embodiment
Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. FIG. 1 is a cross-sectional view schematically showing a schematic configuration of a
プラズマCVD装置100は、複数のスロット状の孔を有する平面アンテナ、特にRLSA(Radial Line Slot Antenna;ラジアルラインスロットアンテナ)にて処理容器内にマイクロ波を導入してプラズマを発生させることにより、高密度かつ低電子温度のマイクロ波励起プラズマを発生させ得るRLSAマイクロ波プラズマ処理装置として構成されている。プラズマCVD装置100では、1×1010~5×1012/cm3のプラズマ密度で、かつ0.7~2eVの低電子温度を有するプラズマによる処理が可能である。従って、プラズマCVD装置100は、各種半導体装置の製造過程においてプラズマCVDによる窒化珪素膜の成膜処理の目的で好適に利用できる。
The
プラズマCVD装置100は、主要な構成として、気密に構成された処理容器1と、処理容器1内にガスを供給するガス供給機構18にガス導入管22を介して接続されたガス導入部14、15と、処理容器1内を減圧排気するための排気装置24を含む排気機構と、処理容器1の上部に設けられ、処理容器1内にマイクロ波を導入するマイクロ波導入機構27と、これらプラズマCVD装置100の各構成部を制御する制御部50と、を備えている。なお、図1に示す実施形態では、ガス供給機構18はプラズマCVD装置100に一体に組み込まれているが、必ずしも一体に組み込む必要はない。ガス供給機構18をプラズマCVD装置100に外付けする構成としても良いことは勿論である。
The
処理容器1は、接地された略円筒状の容器により形成されている。なお、処理容器1は角筒形状の容器により形成してもよい。処理容器1は、アルミニウム等の材質からなる底壁1aと側壁1bとを有している。
The processing container 1 is formed of a substantially cylindrical container grounded. The processing vessel 1 may be formed of a square tube-shaped vessel. The processing container 1 has a
処理容器1の内部には、被処理体であるシリコンウエハ(以下、単に「ウエハ」と記す)Wを水平に支持するための載置台2が設けられている。載置台2は、熱伝導性の高い材質例えばAlN等のセラミックスにより構成されている。この載置台2は、排気室11の底部中央から上方に延びる円筒状の支持部材3により支持され、底部に固定さている。支持部材3は、例えばAlN等のセラミックスにより構成されている。
Inside the processing container 1, a mounting table 2 for horizontally supporting a silicon wafer (hereinafter, simply referred to as a “wafer”) W, which is an object to be processed, is provided. The mounting table 2 is made of a material having high thermal conductivity, such as ceramics such as AlN. The mounting table 2 is supported by a cylindrical support member 3 extending upward from the center of the bottom of the
また、載置台2には、その外縁部をカバーし、ウエハWをガイドするためのカバーリング4が設けられている。このカバーリング4は、例えば石英、AlN、Al2O3、SiN等の材質で構成された環状部材である。
Further, the mounting table 2 is provided with a
また、載置台2には、温度調節機構としての抵抗加熱型のヒータ5が埋め込まれている。このヒータ5は、ヒータ電源5aから給電されることにより載置台2を加熱して、その熱で被処理基板であるウエハWを均一に加熱する。なお、図示は省略するが、ヒータ電源5aからヒータ5に電力を供給して温度制御する際に、電極7へ供給される高周波電力に起因する高周波ノイズをカットするノズルフィルターが設けられている。
Further, a resistance heating type heater 5 as a temperature control mechanism is embedded in the mounting table 2. The heater 5 heats the mounting table 2 by being supplied with electric power from the
また、載置台2には、熱電対(TC)6が配備されている。この熱電対6により、温度計測を行うことにより、ウエハWの加熱温度を例えば室温から900℃までの範囲で制御可能となっている。
Further, a thermocouple (TC) 6 is disposed on the mounting table 2. By measuring the temperature with this
また、載置台2には、ウエハWを支持して昇降させるためのウエハ支持ピン(図示せず)を有している。各ウエハ支持ピンは、載置台2の表面に対して突没可能に設けられている。 Further, the mounting table 2 has a wafer support pin (not shown) for supporting and moving the wafer W up and down. Each wafer support pin is provided to be able to protrude and retract with respect to the surface of the mounting table 2.
また、載置台2の表面側には電極7が埋設されている。この電極7は、ヒータ5と載置台2の表面との間に配置されている。この電極7に、給電線7aによって、マッチングボックス(M.B.)8を介してバイアス印加用の高周波電源9が接続されている。電極7に高周波電源9より高周波電力を供給して、基板であるウエハWに高周波バイアス(RFバイアス)を印加できる構成となっている。電極7の材質としては、載置台2の材質であるAlN等のセラミックスと同等の熱膨張係数を有する材質が好ましく、例えばモリブデン、タングステンなどの導電性材料を用いることが好ましい。電極7は、例えば網目状、格子状、渦巻き状等の形状に形成されている。電極7のサイズは、少なくとも被処理体と同等かそれより大きく形成することが好ましい。
Further, an electrode 7 is embedded on the surface side of the mounting table 2. The electrode 7 is disposed between the heater 5 and the surface of the mounting table 2. A high
処理容器1の底壁1aの略中央部には、円形の開口部10が形成されている。底壁1aにはこの開口部10と連通し、下方に向けて突出する排気室11が設けられている。この排気室11には、排気管12が接続されており、この排気管12を介して排気装置24に接続されている。
A
処理容器1を形成する側壁1bの上端には、処理容器1を開閉させる蓋体(リッド)としての機能を有する環状のプレート13が配置されている。プレート13の内周下部は、内側(処理容器内空間)へ向けて突出し、環状の支持部13aを形成している。
An
プレート13には、ガス導入部40が配置され、ガス導入部40は、第1のガス導入孔を有する第1のガス導入部14が設けられている。また、処理容器1の側壁1bには、第2のガス導入孔を有する第2のガス導入部15が設けられている。つまり、第1のガス導入部14および第2のガス導入部15は、上下2段に設けられている。第1のガス導入部14および第2のガス導入部15は成膜原料ガスやプラズマ励起用ガスを供給するガス供給機構18に接続されている。なお、第1のガス導入部14および第2のガス導入部15はノズル状またはシャワーヘッド状に設けてもよい。また、第1のガス導入部14と第2のガス導入部15を単一のシャワーヘッドに設けてもよい。なお、第1のガス導入部14と第2のガス導入部15を共に処理容器1の側壁1bに設けてもよい。
A
また、処理容器1の側壁1bには、プラズマCVD装置100と、これに隣接する搬送室(図示せず)との間で、ウエハWの搬入出を行うための搬入出口16と、この搬入出口16を開閉するゲートバルブ17とが設けられている。
Further, a loading / unloading
ガス供給機構18は、成膜ガスとして窒素含有ガス(N含有ガス)供給源19a、シリコン含有化合物ガス(Si含有ガス)供給源19b、プラズマ生成用ガスの不活性ガス供給源19cおよび処理容器1内をクリーニングする際に用いるクリーニングガス供給源19dを有している。窒素含有ガス供給源19aは、第1のガス導入部14に接続されている。また、シリコン含有化合物ガス供給源19b、不活性ガス供給源19cおよびクリーニングガス供給源19dは、第2のガス導入部15に接続されている。なお、ガス供給機構18は、上記以外の図示しないガス供給源として、例えば処理容器内雰囲気を置換する際に用いるパージガス供給源等を別に有していてもよい。不活性ガス供給源19cをパージガス供給源として使用してもよい。
The
本発明では、成膜原料ガスである窒素含有ガスとして窒素ガス(N2)を用いる。また、他の成膜原料ガスであるシリコン含有化合物ガスとしては、例えばシラン(SiH4)、ジシラン(Si2H6)、トリシラン(Si3H8)等のSinH2n+2、TSA(トリシリルアミン)などを用いることができる。この中でも、特にジシラン(Si2H6)が好ましい。つまり、窒化珪素膜のトラップの数を制御する目的には、成膜原料ガスとして、窒素ガスとジシランとを用いる組み合わせが好ましい。さらに、不活性ガスとしては、例えばN2ガスや希ガスなどを用いることができる。希ガスは、プラズマ励起用ガスとして安定したプラズマの生成に役立つものであり、例えばArガス、Krガス、Xeガス、Heガスなどを用いることができる。また、クリーニングガスとしては、ClF3、NF3、HCl、F2ガス等を例示できる。これらの中でもNF3ガスが好ましい。 In the present invention, nitrogen gas (N 2 ) is used as the nitrogen-containing gas that is the film-forming source gas. Moreover, as silicon-containing compound gas which is another film-forming source gas, for example, Si n H 2 n + 2 such as silane (SiH 4 ), disilane (Si 2 H 6 ), trisilane (Si 3 H 8 ), TSA (trisilyl And the like can be used. Among these, disilane (Si 2 H 6 ) is particularly preferable. That is, for the purpose of controlling the number of traps in the silicon nitride film, a combination using nitrogen gas and disilane as the film-forming source gas is preferable. Furthermore, as the inert gas, for example, N 2 gas or a rare gas can be used. The rare gas helps to generate a stable plasma as a plasma excitation gas, and for example, Ar gas, Kr gas, Xe gas, He gas or the like can be used. Further, as the cleaning gas, ClF 3 , NF 3 , HCl, F 2 gas and the like can be exemplified. Among these, NF 3 gas is preferable.
窒素含有ガスは、ガス供給機構18の窒素含有ガス供給源19aから、ガスライン20を介して第1のガス導入部14に至り、第1のガス導入部14から処理容器1内に導入される。一方、シリコン含有化合物ガス、不活性ガスおよびクリーニングガスは、シリコン含有化合物ガス供給源19b、不活性ガス供給源19cおよびクリーニングガス供給源19dから、それぞれガスライン20を介して第2のガス導入部15に至り、第2のガス導入部15から処理容器1内に導入される。各ガス供給源に接続する各々のガスライン20には、マスフローコントローラ21およびその前後の開閉バルブ22が設けられている。このようなガス供給機構18の構成により、供給されるガスの切替えや流量等の制御が出来るようになっている。なお、Arなどのプラズマ励起用の不活性ガスは任意のガスであり、必ずしも成膜原料ガスと同時に供給する必要はない。
The nitrogen-containing gas is introduced from the nitrogen-containing
排気機構としての排気装置24は、ターボ分子ポンプなどの高速真空ポンプを備えている。前記のように、排気装置24は、排気管12を介して処理容器1の排気室11に接続されている。この排気装置24を作動させることにより、処理容器1内のガスは、排気室11内の空間11aへ均一に流れ、さらに空間11aから排気管12を介して外部へ排気される。これにより、処理容器1内を、例えば0.133Paまで高速に減圧することが可能となっている。
An
次に、マイクロ波導入機構27の構成について説明する。マイクロ波導入機構27は、主要な構成として、透過板28、平面アンテナ31、遅波材33、カバー部材34、導波管37およびマイクロ波発生装置39を備えている。
Next, the configuration of the
誘電体部材としての透過板28は、プレート13において内周側に張り出した支持部13a上に配備されている。透過板28は、マイクロ波を透過する誘電体、例えば石英やAl2O3、AlN等のセラミックスから構成されている。特にプラズマCVD装置として用いる場合、Al2O3、AlN等のセラミックスが好ましい。この透過板28と支持部13aとの間は、シール部材29を介して気密にシールされている。したがって、処理容器1内は気密に保持される。
A
平面アンテナ31は、透過板28の上方において、載置台2と対向するように設けられている。平面アンテナ31は、円板状をなしている。なお、平面アンテナ31の形状は、円板状に限らず、例えば四角板状でもよい。この平面アンテナ31は、プレート13の上端に係止されている。
The
平面アンテナ31は、例えば表面が金または銀メッキされた銅板、ニッケル板、SUS板またはアルミニウム板から構成されている。平面アンテナ31は、マイクロ波を放射する多数のスロット状のマイクロ波放射孔32を有している。マイクロ波放射孔32は、所定のパターンで平面アンテナ31を貫通して形成されている。
The
個々のマイクロ波放射孔32は、例えば図2に示すように、細長い長方形状(スロット状)をなし、隣接する2つのマイクロ波放射孔が対をなしている。そして、典型的には隣接するマイクロ波放射孔32が「L」字状に配置されている。また、このように所定の形状(例えばL字状)に組み合わせて配置されたマイクロ波放射孔32は、さらに全体として同心円状に配置されている。 For example, as shown in FIG. 2, the individual microwave radiation holes 32 have an elongated rectangular shape (slot shape), and two adjacent microwave radiation holes are paired. And typically, adjacent microwave radiation holes 32 are arranged in an “L” shape. Further, the microwave radiation holes 32 arranged in combination in a predetermined shape (for example, an L-shape) in this manner are further arranged concentrically as a whole.
マイクロ波放射孔32の長さや配列間隔は、マイクロ波の波長(λg)に応じて決定される。例えば、マイクロ波放射孔32の間隔は、λg/4からλgとなるように配置される。図2においては、同心円状に形成された隣接するマイクロ波放射孔32どうしの間隔をΔrで示している。なお、マイクロ波放射孔32の形状は、円形状、円弧状等の他の形状であってもよい。さらに、マイクロ波放射孔32の配置形態は特に限定されず、同心円状のほか、例えば、螺旋状、放射状等に配置することもできる。
The length and arrangement interval of the microwave radiation holes 32 are determined according to the wavelength (λg) of the microwaves. For example, the distance between the microwave radiation holes 32 is set to be λg / 4 to λg. In FIG. 2, the interval between the adjacent microwave radiation holes 32 formed concentrically is indicated by Δr. The shape of the
平面アンテナ31の上面には、真空よりも大きい誘電率、例えば石英、Al2O3、AlN、樹脂等を有する遅波材33が設けられている。この遅波材33は、真空中ではマイクロ波の波長が長くなることから、マイクロ波の波長を短くしてプラズマを調整する機能を有している。
On the top surface of the
なお、平面アンテナ31と透過板28との間、また、遅波材33と平面アンテナ31との間は、それぞれ接触させても離間させてもよいが、接触させることが好ましい。
The
プレート13の上部には、これら平面アンテナ31および遅波材33を覆うように、カバー部材34が設けられている。カバー部材34は、例えばアルミニウムやステンレス鋼等の金属材料によって形成されている。プレート13とカバー部材34とは、シール部材35によりシールされている。カバー部材34の内部には、冷却水流路34aが形成されている。この冷却水流路34aに冷却水を通流させることにより、カバー部材34、遅波材33、平面アンテナ31および透過板28を冷却できるようになっている。なお、カバー部材34は接地されている。
A
カバー部材34の上壁(天井部)の中央には、開口部36が形成されており、この開口部36には導波管37が接続されている。導波管37の他端側には、マッチング回路38を介してマイクロ波を発生するマイクロ波発生装置39が接続されている。
An
導波管37は、上記カバー部材34の開口部36から上方へ延出する断面円形状の同軸導波管37aと、この同軸導波管37aの上端部に接続された水平方向に延びる矩形導波管37bとを有している。
The
同軸導波管37aの中心には内導体41が延在している。この内導体41は、その下端部において平面アンテナ31の中心に接続固定されている。このような構造により、マイクロ波は、同軸導波管37aの内導体41を介して平面アンテナ31へ放射状に効率よく均一に伝播される。
An
以上のような構成のマイクロ波導入機構27により、マイクロ波発生装置39で発生したマイクロ波が導波管37を介して平面アンテナ31へ伝搬され、さらに透過板28を介して処理容器1内に導入されるようになっている。なお、マイクロ波の周波数としては、例えば2.45GHzが好ましく用いられ、他に、8.35GHz、1.98GHz等を用いることもできる。
The microwaves generated by the
プラズマCVD装置100の各構成部は、制御部50に接続されて制御される構成となっている。制御部50は、コンピュータを有しており、例えば図3に示したように、CPUを備えたプロセスコントローラ51と、このプロセスコントローラ51に接続されたユーザーインターフェース52および記憶部53を備えている。プロセスコントローラ51は、プラズマCVD装置100において、例えば温度、圧力、ガス流量、マイクロ波出力、バイアス印加用の高周波出力などのプロセス条件に関係する各構成部(例えば、ヒータ電源5a、高周波電源9、ガス供給機構18、排気装置24、マイクロ波発生装置39など)を統括して制御する制御手段である。
Each component of the
ユーザーインターフェース52は、工程管理者がプラズマCVD装置100を管理するためにコマンドの入力操作等を行うキーボードや、プラズマCVD装置100の稼働状況を可視化して表示するディスプレイ等を有している。また、記憶部53には、プラズマCVD装置100で実行される各種処理をプロセスコントローラ51の制御にて実現するための制御プログラム(ソフトウエア)や処理条件データ等が記録されたレシピが保存されている。
The
そして、必要に応じて、ユーザーインターフェース52からの指示等にて任意のレシピを記憶部53から呼び出してプロセスコントローラ51に実行させることで、プロセスコントローラ51の制御下、プラズマCVD装置100の処理容器1内で所望の処理が行われる。また、前記制御プログラムや処理条件データ等のレシピは、コンピュータ読み取り可能な記憶媒体、例えばCD−ROM、ハードディスク、フレキシブルディスク、フラッシュメモリ、DVD、ブルーレイディスクなどに格納された状態のものを利用したり、あるいは、他の装置から、例えば専用回線を介して随時伝送させてオンラインで利用したりすることも可能である。
Then, as required, an arbitrary recipe is called from the
次に、RLSA方式のプラズマCVD装置100を用いたプラズマCVD法による窒化珪素膜の堆積処理について説明する。まず、ゲートバルブ17を開にして搬入出口16からウエハWを処理容器1内に搬入し、載置台2上に載置する。次に、処理容器1内を減圧排気しながら、ガス供給機構18の窒素含有ガス供給源19a、シリコン含有化合物ガス供給源19bおよび不活性ガス供給源19cから、窒素含有ガス、シリコン含有化合物ガスおよび不活性ガスを所定の流量でそれぞれ第1のガス導入部14及び第2のガス導入部15を介して処理容器1内に導入する。そして、処理容器1内を所定の圧力に調節する。
Next, the deposition process of the silicon nitride film by the plasma CVD method using the RLSA type
次に、マイクロ波発生装置39で発生させた所定周波数例えば2.45GHzのマイクロ波を、マッチング回路38を介して導波管37に導く。導波管37に導かれたマイクロ波は、矩形導波管37bおよび同軸導波管37aを順次通過し、内導体41を介して平面アンテナ板31に供給される。つまり、マイクロ波は、同軸導波管37a内を平面アンテナ板31に向けて伝搬していく。そして、マイクロ波は、平面アンテナ板31のスロット状のマイクロ波放射孔32から透過板28を介して処理容器1内におけるウエハWの上方空間に放射させられる。この際のマイクロ波出力は、マイクロ波が透過する領域の透過板28の面積あたりの出力密度として0.25~2.56W/cm2の範囲内とすることが好ましい。マイクロ波出力は、例えば500~5000Wの範囲内から目的に応じて上記範囲内の出力密度になるように選択することができる。
Next, the microwave having a predetermined frequency, for example, 2.45 GHz generated by the
平面アンテナ31から透過板28を経て処理容器1に放射されたマイクロ波により、処理容器1内で電磁界が形成され、窒素含有ガス、シリコン含有化合物ガスがそれぞれプラズマ化する。そして、プラズマ中で原料ガスの解離が効率的に進み、SipHq、SiHq、NHq、N(ここで、p、qは任意の数を意味する。以下同様である。)などの活性種の反応によって、窒化珪素SiNの薄膜が堆積される。基板に窒化珪素膜が形成された後、チャンバ内に付着した窒化珪素膜は、クリーニングガスとしてClF3ガスをチャンバ内に供給して、100~500℃、好ましくは200~300℃の熱によりクリーニングして除去される。また、クリーニングガスとして、NF3を用いる場合、室温~300℃でプラズマを生成して行われる。
An electromagnetic field is formed in the processing container 1 by the microwaves radiated from the
また、プラズマCVD処理を行なっている間、載置台2の電極7に高周波電源9から所定の周波数および大きさの高周波電力を供給し、RFバイアスをウエハWに印加する。プラズマCVD装置100では、プラズマの電子温度を低く維持できるので、膜へのダメージがなく、しかも、高密度プラズマにより、成膜ガスの分子が解離されやすいので、反応が促進される。また、適切な範囲でのRFバイアスの印加は、プラズマ中のイオンをウエハWへ引き込むように作用するため、窒化珪素膜の緻密性を向上させるとともに、膜中のトラップを増加させるように作用する。
Further, during the plasma CVD process, high frequency power of a predetermined frequency and size is supplied to the electrode 7 of the mounting table 2 from the high
高周波電源9から供給されるRFバイアスの周波数は、例えば400kHz以上60MHz以下の範囲内が好ましく、450kHz以上20MHz以下の範囲内がより好ましい。RFバイアスは、ウエハWの面積当たりの出力密度として例えば0.009W/cm2以上0.64W/cm2以下の範囲内で印加することが好ましく、0.016W/cm2以上0.095W/cm2以下の範囲内で印加することがより好ましい。また、RFバイアスパワーは3W以上200W以下の範囲内が好ましく、より好ましくは5W以上20W以下の範囲内から、上記出力密度になるように電極に供給してRFバイアスを印加することができる。
The frequency of the RF bias supplied from the high
以上の条件は、制御部50の記憶部53にレシピとして保存されている。そして、プロセスコントローラ51がそのレシピを読み出してプラズマCVD装置100の各構成部例えばガス供給機構18、排気装置24、マイクロ波発生装置39、ヒータ電源5a、高周波電源9などへ制御信号を送出することにより、所望の条件でのプラズマCVD処理が実現する。
The above conditions are stored as a recipe in the
また、上記構成を有するプラズマCVD装置100においては、窒化珪素膜を成膜する際のプラズマCVD処理の圧力条件を一定にし、高周波電源9から載置台2の電極7に供給するRFバイアスパワーを0.009W/cm2以上0.64W/cm2以下の出力密度の範囲内で供給することにより、形成される窒化珪素膜中のトラップの存在数を均一に増加させる方向にコントロールできる。
Further, in the
図4は、プラズマCVD装置100において行われる窒化珪素膜の製造工程を示した工程図である。図4(a)に示したように、任意の下地層(例えば、Si基板や二酸化珪素膜)60の上に、N2/Si2H6プラズマを用いてプラズマCVD処理を行う。このプラズマCVD処理では、処理圧力を、10Pa以上133.3Pa以下の範囲内、好ましくは20Pa以上60Pa以下の範囲内で一定に設定する。そして、高周波電源9から、載置台2の電極7に0.009W/cm2以上0.64W/cm2の範囲内のRFパワーを供給する。これにより、図4(b)に示したように、窒化珪素膜70を形成することができる。下地層60にRFバイアスを印加することにより、RFバイアスを印加しない場合に比べて、窒化珪素膜70中のトラップ数を均一に増加させることができる。
FIG. 4 is a process diagram showing a manufacturing process of a silicon nitride film performed in
次に、本発明の基礎となった実験データを挙げ、プラズマCVD処理の好適な条件について説明する。ここでは、窒素含有ガスとしてN2ガス、シリコン含有化合物ガスとしてSi2H6ガス、プラズマ生成用ガスとしてArガスを使用し、プラズマCVD装置100において下記のプラズマCVD条件でプラズマCVDを実施し、単膜の窒化珪素膜を形成した。各条件で成膜された窒化珪素膜について、屈折率、ウエットエッチングレートおよびフラットバンド電位(Vfb)のヒステリシスを計測した。なお、Vfbのヒステリシスは、以下の公知技術であるHgプローブ法で測定した。まず、図5(a)に示したようなキャパシタ構造の試験用デバイスを作成した。図5(a)中、符号91はシリコン基板、符号93はプラズマCVDで形成された窒化珪素膜(ゲート絶縁膜)、符号95は水銀ゲート電極である。そして、シリコン基板91を接地電位として、水銀ゲート電極95に電圧を−20Vから10Vまで変化させて印加した(フォワード)後、逆向きに10Vから−20Vまで変化させて印加した(リバース)。この往復の電圧印加過程におけるキャパシタンスを計測し、フォワードとリバースの各CVカーブ(ヒステリシス曲線)から、図5(b)に示したように、Vfbヒステリシスを求めた。往復の電圧印加でCVカーブが変化するということは、電圧印加によって窒化珪素膜中に正孔(ホール)がトラップされた結果、その電荷を打ち消すために電圧の変化が生じたものであり、Vfbヒステリシスが大きいほど、窒化珪素膜中にトラップも多いことを示している。
Next, the experimental data on which the present invention is based will be listed, and preferable conditions for the plasma CVD process will be described. Here, using the N 2 gas as the nitrogen-containing gas, the Si 2 H 6 gas as the silicon-containing compound gas, and the Ar gas as the plasma generation gas, the
〔プラズマCVD条件〕
処理温度(載置台):400℃
マイクロ波パワー:2kW(出力密度1.023W/cm2;透過板面積あたり)
処理圧力;2.7Pa、26.6Pa、40Pa
Arガス流量;600mL/min(sccm)
N2ガス流量;400mL/min(sccm)
Si2H6ガス流量;2mL/min(sccm)
RFバイアスの周波数:13.56MHz
RFバイアスのパワー:0W、5W(出力密度0.016W/cm2)、10W(出力密度0.032W/cm2)、50W(出力密度0.16W/cm2)
[Plasma CVD conditions]
Processing temperature (mounting table): 400 ° C.
Microwave power: 2 kW (power density 1.023 W / cm 2 ; per transmission plate area)
Processing pressure; 2.7Pa, 26.6Pa, 40Pa
Ar gas flow rate; 600 mL / min (sccm)
N 2 gas flow rate; 400 mL / min (sccm)
Si 2 H 6 gas flow rate; 2 mL / min (sccm)
RF bias frequency: 13.56 MHz
RF bias power: 0 W, 5 W (power density 0.016 W / cm 2 ), 10 W (power density 0.032 W / cm 2 ), 50 W (power density 0.16 W / cm 2 )
図6(a)は、窒化珪素膜の屈折率と載置台2に供給されるRFバイアスパワーとの関係を示している。図6(b)は、希フッ酸を使用した窒化珪素膜のウエットエッチングレートと載置台2に供給されるRFバイアスパワーとの関係を示している。図6(c)は、窒化珪素膜のVfb測定におけるヒステリシスの大きさと載置台2に供給されるRFバイアスパワーとの関係を示している。図6(a)から、RFバイアスが0.16W/cm2において、2.7Pa、26.6Paおよび40.0Paの処理圧力で、屈折率は1.85以上と高く好ましく、特に、2.7Paの処理圧力では、屈折率が1.95以上と高くさらに好ましい。さらに、RFバイアスが0.016W/cm2においては、2.7Pa、26.6Paおよび40.0Paの処理圧力で、屈折率が約1.90以上と高く好ましい。 FIG. 6A shows the relationship between the refractive index of the silicon nitride film and the RF bias power supplied to the mounting table 2. FIG. 6B shows the relationship between the wet etching rate of the silicon nitride film using dilute hydrofluoric acid and the RF bias power supplied to the mounting table 2. FIG. 6C shows the relationship between the magnitude of the hysteresis in the Vfb measurement of the silicon nitride film and the RF bias power supplied to the mounting table 2. From FIG. 6 (a), the refractive index is preferably as high as 1.85 or more at a treatment pressure of 2.7 Pa, 26.6 Pa and 40.0 Pa at an RF bias of 0.16 W / cm 2 , and in particular 2.7 Pa At a treatment pressure of 1, the refractive index is as high as 1.95 or more, and more preferable. Furthermore, when the RF bias is 0.016 W / cm 2 , the refractive index is preferably as high as about 1.90 or more at processing pressures of 2.7 Pa, 26.6 Pa and 40.0 Pa.
図6(a)~(c)から、26.6Paおよび40Paの処理圧力では、出力密度はおよそ0.016W/cm2~0.032W/cm2程度のRFバイアスを印加することで、屈折率は高く、ウエットエッチングレートは低く、またVfbヒステリシスは高く変化した。屈折率の向上、ウエットエッチングレートの低下、Vfbヒステリシスの向上は、RFバイアスが0.016W/cm2以上0.032W/cm2以下の範囲内の出力密度のときに、RFバイアスを印加しない場合に対する変化量が最大となり、0.16W/cm2の出力密度でRFバイアスを印加した場合には、同変化量が縮小していた。以上の結果から、RFバイアスを0.016W/cm2~0.032W/cm2程度の出力密度で印加することにより、(屈折率が高くエッチングレートが低く)緻密でありながら、膜中のトラップが多い窒化珪素膜を成膜できることが示された。 Figures 6 (a) ~ (c) , the process pressure of 26.6Pa and 40 Pa, power density by applying approximately 0.016W / cm 2 ~ 0.032W / cm 2 about RF bias, the refractive index , The wet etching rate was low, and the Vfb hysteresis changed high. The improvement of the refractive index, the reduction of the wet etching rate, and the improvement of the Vfb hysteresis are when the RF bias is not applied when the power density is within the range of 0.016 W / cm 2 or more and 0.032 W / cm 2 or less. When the RF bias is applied at a power density of 0.16 W / cm 2 , the variation is reduced. From the above results, by applying an RF bias at a power density of about 0.016 W / cm 2 to 0.032 W / cm 2 , traps in the film can be obtained while being dense (high in refractive index and low in etching rate). It has been shown that a large amount of silicon nitride film can be formed.
図6(a)~(c)に示されたデータは、適切な範囲の出力密度でRFバイアスを印加することによって、窒化珪素膜の緻密性が向上するとともに、膜中のトラップを均一に増加させ得ることを示している。一見すると相反する上記データは、以下のように解釈することで合理的な説明が可能になる。プラズマCVDでは、ウエハWにRFバイアスを印加することにより、ウエハWにプラズマ中のイオンが引き込まれる傾向が強くなる。しかし、本願で使用するマイクロ波プラズマでは、RFバイアスを印加しても電子温度を低く(0.7~2eV)維持できるため、例えば26.6Pa~40Paの低圧力条件でも電子温度が低く維持される。その結果、膜へのダメージが抑制されて緻密な膜が形成されると同時に、RFバイアスによってイオンの引き込みがコントロールされるので、膜中に適度な量のトラップが均一な分布で形成されるものと考えられる。 The data shown in FIGS. 6 (a) to 6 (c) show that the density of the silicon nitride film is improved and the traps in the film are uniformly increased by applying the RF bias at an appropriate range of power density. It shows that it can be done. The seemingly contradictory data above can be rationally explained by interpreting it as follows. In plasma CVD, by applying an RF bias to the wafer W, the ions in the plasma are more likely to be drawn into the wafer W. However, in the microwave plasma used in the present application, the electron temperature can be kept low (0.7 to 2 eV) even when the RF bias is applied, so the electron temperature is kept low even under a low pressure condition of 26.6 Pa to 40 Pa, for example Ru. As a result, damage to the film is suppressed and a dense film is formed, and at the same time, ion attraction is controlled by the RF bias, so that an appropriate amount of traps are formed in a uniform distribution in the film. it is conceivable that.
一方、図6(a)および(b)に示した屈折率およびウエットエッチングレートの結果から、26.6Paおよび40Paの圧力条件においても、RFバイアスのパワーが大きすぎる場合(例えば0.16W/cm2の出力密度)には、膜の緻密性が低下していくことが判明した。また、プラズマCVDによる窒化珪素膜は、本来的に緻密性の高い膜であるが、圧力を高くしていくと緻密性が低下する。しかし、微少のRFバイアス(例えば0.016~0.032W/cm2程度の出力密度)を印加した場合には、その緻密性を向上させることが出来た。この場合は、膜の緻密性を保ちつつ、多くのトラップが形成されるものと推測される。しかし、RFバイアスを0.16W/cm2の出力密度にすると、膜自体の緻密性が低下するので、Si未結合手が終端しやすくなり、図6(b)、(c)に示したように、エッチングレートの増大、Vfbヒステリシスの低下(つまり、トラップの減少)として計測されるものと考えられる。 On the other hand, according to the results of the refractive index and the wet etching rate shown in FIGS. 6A and 6B, when the RF bias power is too large even under the pressure conditions of 26.6 Pa and 40 Pa (for example, 0.16 W / cm In the power density of 2 , it was found that the compactness of the film decreased. Further, although the silicon nitride film by plasma CVD is inherently high in density, the density decreases as the pressure is increased. However, when a minute RF bias (for example, a power density of about 0.016 to 0.032 W / cm 2 ) is applied, the compactness can be improved. In this case, it is presumed that many traps are formed while maintaining the compactness of the film. However, when the RF bias is set to a power density of 0.16 W / cm 2 , the compactness of the film itself is reduced, so that Si non-bonds tend to be terminated, as shown in FIGS. 6 (b) and 6 (c). It is considered to be measured as an increase in etching rate and a decrease in Vfb hysteresis (that is, a decrease in traps).
以上の結果から、プラズマCVD装置100を用いたプラズマCVD法において、RFバイアスを0.016~0.032W/cm2の範囲内の出力密度で印加し、かつ、処理圧力を40Pa以下(例えば10~40Pa)の範囲内に設定することにより、トラップ数が多く、かつトラップの分布が均一に制御された窒化珪素膜を形成できることが示された。また、処理圧力を3Pa以下の高真空条件に設定してプラズマCVD処理を行う場合に比べて、ターボ分子ポンプなどの高性能の排気装置が必須でなくなることや、処理容器1の耐圧設計基準を緩和できるなど、装置負荷が軽減され、コストも低下させることができるという利点がある。また、3Pa以下の高真空状態では、イオンのスパッタ等により、パーティクル等によるウエハWの汚染危険性が増加したり、窒化珪素膜形成におけるカバレッジ性能が低下したりするなど、プロセス的な問題を有するが、これらの問題についても、処理圧力を高い範囲に設定できることによって回避できる。
From the above results, in the plasma CVD method using the
次に、プラズマCVD装置100で被処理体にRFバイアスを印加して窒化珪素膜を形成する場合に、Arの流量比率が窒化珪素膜のVfbヒステリシスに与える影響について検討を行った。下記の条件でAr流量を変化させてプラズマCVDを行い、前記と同様の方法でVfbヒステリシスを測定した。
Next, when forming a silicon nitride film by applying an RF bias to the object to be processed in the
〔プラズマCVD条件〕
処理温度(載置台):400℃
マイクロ波パワー:2kW(出力密度1.023W/cm2;透過板面積あたり)
処理圧力;26.6Pa
Arガス流量;100mL/min(sccm)、600mL/min(sccm)、1100mL/min(sccm)
N2ガス流量;400mL/min(sccm)
Si2H6ガス流量;2mL/min(sccm)
RFバイアスの周波数:13.56MHz
RFバイアスのパワー:5W(出力密度0.016W/cm2)
[Plasma CVD conditions]
Processing temperature (mounting table): 400 ° C.
Microwave power: 2 kW (power density 1.023 W / cm 2 ; per transmission plate area)
Processing pressure: 26.6 Pa
Ar gas flow rate: 100 mL / min (sccm), 600 mL / min (sccm), 1100 mL / min (sccm)
N 2 gas flow rate; 400 mL / min (sccm)
Si 2 H 6 gas flow rate; 2 mL / min (sccm)
RF bias frequency: 13.56 MHz
RF bias power: 5 W (power density 0.016 W / cm 2 )
図7に示したように、RFバイアスパワーを0.016W/cm2で一定に印加した場合、Ar流量が100mL/min(sccm)および600mL/min(sccm)では、Vfbヒステリシスが高く観察された。また、Ar流量が1100mL/min(sccm)ではVfbヒステリシスは低く観察された。従って、Vfbヒステリシスを大きくする観点から、Arガスの流量は50~1000mL/min(sccm)の範囲内が好ましく、100~800mL/min(sccm)の範囲内とすることがより好ましいと考えられた。 As shown in FIG. 7, when the RF bias power was constantly applied at 0.016 W / cm 2 , Vfb hysteresis was observed high at Ar flow rates of 100 mL / min (sccm) and 600 mL / min (sccm). . In addition, the Vfb hysteresis was observed to be low when the Ar flow rate was 1100 mL / min (sccm). Therefore, from the viewpoint of increasing the Vfb hysteresis, it is considered that the flow rate of Ar gas is preferably in the range of 50 to 1000 mL / min (sccm), and more preferably in the range of 100 to 800 mL / min (sccm) .
また、N2ガスに対するArガスの流量比(Ar/N2)は、0.1以上3以下の範囲内が好ましく、トラップ数を多くする観点では、Ar/N2が2以下(例えば0.2以上2以下)の範囲内から選択することが好ましい。Arの流量比が多くなるとプラズマ中のArイオンが多くなるので、Vfbヒステリシスが小さくなり、トラップ数が少なくなる。また、Si2H6ガスとArガスの流量比(Si2H6/Ar)は、0.005以上0.01以下の範囲内から選択することが好ましい。なお、N2ガスの流量は100~1000mL/min(sccm)の範囲内、好ましくは100~500mL/min(sccm)の範囲内、Si2H6ガスの流量は0.5~40mL/min(sccm)の範囲内、好ましくは0.5~10mL/min(sccm)の範囲内から、それぞれ上記流量比になるように設定することができる。 The flow ratio (Ar / N 2 ) of Ar gas to N 2 gas is preferably in the range of 0.1 or more and 3 or less, and in view of increasing the number of traps, Ar / N 2 is 2 or less (for example, 0. It is preferable to select from the range of 2 or more and 2 or less). As the flow ratio of Ar increases, Ar ions in the plasma increase, so the Vfb hysteresis decreases and the number of traps decreases. The flow ratio (Si 2 H 6 / Ar) of the Si 2 H 6 gas to the Ar gas is preferably selected from the range of 0.005 or more and 0.01 or less. The flow rate of N 2 gas is in the range of 100 to 1000 mL / min (sccm), preferably in the range of 100 to 500 mL / min (sccm), and the flow rate of Si 2 H 6 gas is 0.5 to 40 mL / min ( The flow rate ratio can be set within the range of sccm), preferably within the range of 0.5 to 10 mL / min (sccm).
また、プラズマCVD処理の処理温度は、載置台2の温度を300℃以上から600℃以下が好ましく、より好ましくは400℃以上600℃以下の範囲内に設定すればよい。 The processing temperature of the plasma CVD process may be set to a temperature of the mounting table 2 of 300 ° C. to 600 ° C., preferably 400 ° C. to 600 ° C.
また、プラズマCVD処理におけるマイクロ波の出力密度は、マイクロ波が透過する透過板の面積あたり0.25W/cm2以上2.56W/cm2以下の範囲内とすることが好ましい。 Further, the power density of the microwave in the plasma CVD process is preferably in the range of 0.25 W / cm 2 or more 2.56 W / cm 2 or less per area of the transmissive plate microwaves transmitted.
以上のように、本発明の窒化珪素膜の製造方法では、RFバイアスパワーと処理圧力を選択してプラズマCVDを行なうことにより、ウエハW上に、所望の量のトラップを有する窒化珪素膜を簡単に製造できる。このようにして形成されるトラップ数の多い窒化珪素膜は、例えば、MOS型半導体メモリ装置の電荷蓄積層として有利に利用できる。 As described above, in the method of manufacturing a silicon nitride film according to the present invention, the silicon nitride film having a desired amount of traps is easily formed on the wafer W by performing the plasma CVD by selecting the RF bias power and the processing pressure. Can be manufactured. The silicon nitride film having a large number of traps thus formed can be advantageously used, for example, as a charge storage layer of a MOS semiconductor memory device.
〔第2の実施の形態〕
次に、本発明の第2の実施の形態に係る窒化珪素膜を積層する成膜方法について説明する。前記第1の実施の形態で説明したとおり、プラズマCVD装置100においては、窒化珪素膜を成膜する際のプラズマCVD処理の条件、特に高周波電源9から載置台2の電極7に供給するRFバイアスパワーの大きさと、処理圧力とを適切に設定することによって、形成される窒化珪素膜に多くのトラップを均一な分布で形成することができる。この特徴を利用して、基板へのRFバイアス印加のオン/オフを切り替えたり、RFバイアスパワーを変化させたりすることにより、例えば隣接する窒化珪素膜でトラップの数が異なる窒化珪素膜を積層して成膜することができる。
Second Embodiment
Next, a film forming method of laminating a silicon nitride film according to a second embodiment of the present invention will be described. As described in the first embodiment, in the
図8は、プラズマCVD装置100において行われる窒化珪素膜を積層して形成する成膜工程を示した工程図である。まず、図8(a)に示したように、例えば10Pa以上133.3Pa以下の範囲内の圧力で任意の下地層(例えばSi基板または二酸化珪素膜)60の上に、RFバイアスを0.009~0.64W/cm2の範囲内の出力密度で印加しながら(RFバイアス/ON)、N2ガスとSi2H6ガスの混合ガスプラズマを用いてプラズマCVD処理を行い、図8(b)に示したように、第1の窒化珪素膜70を形成する。この窒化珪素膜70は、膜中に多数のトラップを有するものである。
FIG. 8 is a process diagram showing a film forming step of laminating and forming a silicon nitride film performed in the
次に、図8(c)に示したように、例えば10Pa以上133.3Pa以下の範囲内の圧力で第1の窒化珪素膜70の上に、RFバイアスを印加せずに(RFバイアス/OFF)、N2ガスとSi2H6ガスの混合ガスプラズマを用いてプラズマCVD処理を行う。その結果、図8(d)に示したように、第2のバンドギャップを有する第2の窒化珪素膜71を形成する。この第2の窒化珪素膜71は、第1の窒化珪素膜70に比較して膜中のトラップが少ない窒化珪素膜である。以上の工程により、図8(e)に示したように、2層の窒化珪素膜からなる窒化珪素膜積層体80を形成できる。
Next, as shown in FIG. 8C, for example, without applying an RF bias on the first
また、必要に応じて、図8(e)に示したように、例えば10Pa以上133.3Pa以下の範囲内の圧力で第2の窒化珪素膜71に、RFバイアスを0.009~0.64W/cm2の出力密度で印加しながら(RFバイアス/ON)、N2ガスとSi2H6ガスの混合ガスプラズマを用いてプラズマCVD処理を行うことができる。その結果、図8(f)に示したように、第3の窒化珪素膜72を形成することができる。この場合、第3の窒化珪素膜72のトラップ数は、第1の窒化珪素膜70と同等としてもよいし、第1の窒化珪素膜70とは異なるようにしてもよい。第3の窒化珪素膜72のトラップ数は印加するRFバイアスの大きさによってコントロールできる。
Further, if necessary, as shown in FIG. 8E, for example, the RF bias is set to 0.009 to 0.64 W for the second
以降、プラズマCVD処理を必要回数繰り返し行うことによって、所望の層構造を有する窒化珪素膜積層体80を形成できる。
Thereafter, the silicon
以上のように、本実施の形態の窒化珪素膜を積層する成膜方法では、処理圧力を一定に設定した状態で、下地層にRFバイアスの入/切(ON/OFF)によって、第1の窒化珪素膜70、第2の窒化珪素膜71および第3の窒化珪素膜72のトラップ数を変化させることができる。このように、シリコン含有化合物ガスと窒素ガスとを含む成膜ガスを用い、RFバイアスのON/OFFを切り替え、または該微少バイアスの範囲でRFバイアスの大きさ変えることによって、ウエハW上に、トラップ数の異なる窒化珪素膜を交互に堆積させて窒化珪素膜を積層して形成することができる。特に、本実施の形態の窒化珪素膜を積層する成膜方法では、処理圧力を一定にして微少RFバイアスによる制御のみによって各窒化珪素膜のトラップ数とその分布を均一に制御できることから、異なるトラップ数を有する窒化珪素膜の積層体を形成する場合に、同一処理容器内で真空状態を維持したまま連続的な成膜が可能になり、プロセス効率が非常に優れている。そのため、本発明方法を、例えばMOS型半導体メモリ装置の電荷蓄積領域としての窒化珪素膜の積層形成に適用することにより、優れたデータ書込み特性を備えたMOS型半導体メモリ装置を製造できる。
As described above, in the film forming method in which the silicon nitride film of the present embodiment is stacked, the first process is performed by turning on / off the RF bias on the underlayer in a state in which the processing pressure is set constant. The number of traps in the
〔半導体メモリ装置の製造への適用例〕
次に、図9を参照しながら、本実施の形態に係る窒化珪素膜の製造方法を半導体メモリ装置の製造過程に適用した例について説明する。図9は、MOS型半導体メモリ装置201の概略構成を示す断面図である。MOS型半導体メモリ装置201は、半導体層としてのp型のシリコン基板101と、このp型のシリコン基板101上に積層形成された、トラップ数が異なる複数の絶縁膜と、さらにその上に形成されたゲート電極103と、を有している。シリコン基板101とゲート電極103との間には、第1の絶縁膜111と、第2の絶縁膜112と、第3の絶縁膜113と、第4の絶縁膜114と、第5の絶縁膜115とが設けられている。このうち、第2の絶縁膜112、第3の絶縁膜113および第4の絶縁膜114は、いずれも窒化珪素膜であり、積層窒化珪素膜102aを形成している。
[Example of application to manufacture of semiconductor memory device]
Next, with reference to FIG. 9, an example in which the method for manufacturing a silicon nitride film according to the present embodiment is applied to the manufacturing process of a semiconductor memory device will be described. FIG. 9 is a cross-sectional view showing a schematic configuration of the MOS
また、シリコン基板101には、ゲート電極103の両側に位置するように、表面から所定の深さでn型拡散層である第1のソース・ドレイン104および第2のソース・ドレイン105が形成され、両者の間はチャネル形成領域106となっている。なお、MOS型半導体メモリ装置201は、半導体基板内に形成されたpウェルやp型シリコン層に形成されていてもよい。また、本実施の形態は、nチャネルMOSデバイスを例に挙げて説明を行うが、pチャネルMOSデバイスで実施してもかまわない。従って、以下に記載する本実施の形態の内容は、全てnチャネルMOSデバイス、及び、pチャネルMOSデバイスに適用することができる。
Further, on the
第1の絶縁膜111は、例えばシリコン基板101の表面を熱酸化法により酸化して形成された二酸化珪素膜(SiO2膜)である。第1の絶縁膜111の膜厚は、例えば0.5nm~20nmの範囲内が好ましく、1nm~3nmの範囲内がより好ましい。
The first
積層窒化珪素膜102aを構成する第2の絶縁膜112は、第1の絶縁膜111の表面に形成された窒化珪素膜(SiN膜;ここで、SiとNとの組成比は必ずしも化学量論的に決定されず、成膜条件により異なる値をとる。以下、同様である)である。第2の絶縁膜112の膜厚は、例えば2nm~20nmの範囲内が好ましく、3nm~5nmの範囲内がより好ましい。
The second
第3の絶縁膜113は、第2の絶縁膜112上に形成された窒化珪素膜(SiN膜)である。第3の絶縁膜113の膜厚は、例えば2nm~30nmの範囲内が好ましく、4nm~10nmの範囲内がより好ましい。
The third
第4の絶縁膜114は、第3の絶縁膜113上に形成された窒化珪素膜(SiN膜)である。この第4の絶縁膜114は、例えば第2の絶縁膜112と同様のトラップ数および膜厚を有している。
The fourth
第5の絶縁膜115は、第4の絶縁膜114上に、例えばCVD法により堆積させた二酸化珪素膜(SiO2膜)である。この第5の絶縁膜115は、電極103と第4の絶縁膜114との間でブロック層(バリア層)として機能する。第5の絶縁膜115の膜厚は、例えば2nm~30nmの範囲内が好ましく、5nm~8nmの範囲内がより好ましい。
The fifth
なお、第1の絶縁膜111と第2の絶縁膜112との間にフローティングゲート電極としてのポリシリコン層を形成した構成としてもよい。
Note that a polysilicon layer may be formed as a floating gate electrode between the first insulating
ゲート電極103は、例えばCVD法により成膜された多結晶シリコン膜からなり、コントロールゲート(CG)電極として機能する。また、ゲート電極103は、例えばW,Ti,Ta,Cu,Al,Au,Pt等の金属を含む層であってもよい。ゲート電極103は、単層に限らず、ゲート電極103の比抵抗を下げ、MOS型半導体メモリ装置201の動作速度を高速化する目的で、例えばタングステン、モリブデン、タンタル、チタン、白金それらのシリサイド、ナイトライド、合金等を含む積層構造にすることもできる。ゲート電極103は、図示しない配線層に接続されている。
The
また、MOS型半導体メモリ装置201において、第2の絶縁膜112、第3の絶縁膜113および第4の絶縁膜114により構成される積層窒化珪素膜102aは、主に電荷を蓄積する電荷蓄積領域である。従って、第2の絶縁膜112、第3の絶縁膜113および第4の絶縁膜114の形成に際して、本発明の第1の実施の形態に係る窒化珪素膜の成膜方法を適用し、各膜のトラップ数とその分布を制御することによって、MOS型半導体メモリ装置201のデータ書き込み性能やデータ保持性能を調節できる。また、本発明の第2の実施の形態に係る積層窒化珪素膜の成膜方法を適用し、第2の絶縁膜112、第3の絶縁膜113および第4の絶縁膜114を、プラズマCVD装置100において処理圧力を一定にし、RFバイアスのON/OFFを切り替えることにより、またはその大きさを変化させることにより同一処理容器内で連続的に製造することもできる。
In the MOS type
ここでは代表的な手順を挙げて、本発明方法をMOS型半導体メモリ装置201の製造に適用した例について説明を行う。まず、LOCOS(Local Oxidation of Silicon)法やSTI(Shallow Trench Isolation)法などの手法で素子分離膜(図示せず)が形成されたシリコン基板101を準備し、その表面に、例えば熱酸化法によって第1の絶縁膜111を形成する。
Here, an example in which the method of the present invention is applied to the manufacture of a MOS
次に、第1の絶縁膜111の上に、プラズマCVD装置100を用いプラズマCVD法によって第2の絶縁膜112、第3の絶縁膜113および第4の絶縁膜114を順次形成する。
Next, a second
第2の絶縁膜112を形成する場合は、処理圧力を10Pa以上133.3Pa以下の範囲内に設定し、載置台2の電極7にウエハWの面積当り0.009W/cm2以上0.64W/cm2以下の範囲内の出力密度でRFパワーを供給する。このように、シリコン基板101にRFバイアスを印加してトラップが均一な分布で多く形成されるように成膜を行う。第3の絶縁膜113を形成するときは、シリコン基板101にRFバイアスを印加せずにプラズマCVDを行い、第2の絶縁膜112よりも膜中のトラップが少なくなるようにする。第4の絶縁膜114を形成するときは、第3の絶縁膜113を形成する成膜条件とは異なる成膜条件(例えば第2の絶縁膜112を形成する場合と同様のRFバイアスをシリコン基板101に印加)でプラズマCVDを行い、膜中のトラップ数が第3の絶縁膜113よりも多くなるようにする。各膜のトラップの数は、前記のとおり、プラズマCVD処理の処理圧力を一定にし、RFバイアス印加のON/OFFを切り替えることにより、またはその大きさを変化させることにより制御できる。
When forming the second
次に、第4の絶縁膜114の上に、第5の絶縁膜115を形成する。この第5の絶縁膜115は、例えばCVD法によって形成することができる。さらに、第5の絶縁膜115の上に、例えばCVD法によってポリシリコン層や金属層、あるいは金属シリサイド層などを成膜してゲート電極103となる金属膜を形成する。
Next, the fifth insulating
次に、フォトリソグラフィー技術を用い、パターン形成したレジストをマスクとして、前記金属膜、第5の絶縁膜115~第1の絶縁膜111をエッチングすることにより、パターン形成されたゲート電極103と複数の絶縁膜を有するゲート積層構造体が得られる。次に、ゲート積層構造体の両側に隣接するシリコン表面にn型不純物を高濃度にイオン注入し、第1のソース・ドレイン104および第2のソース・ドレイン105を形成する。このようにして、図9に示した構造のMOS型半導体メモリ装置201を製造できる。
Next, the metal film and the fifth insulating
なお、上記例では、積層窒化珪素膜102a中の第3の絶縁膜113のトラップ数に比べて、第2の絶縁膜112および第4の絶縁膜114のトラップ数が多くなるようにしたが、第2の絶縁膜112および第4の絶縁膜114のトラップ数に比べて、第3の絶縁膜113のトラップ数が多くなるようにしてもよい。また、第2の絶縁膜112と第4の絶縁膜114のトラップ数が同じである必要はない。
In the above example, the number of traps in the second
また、図9では、積層窒化珪素膜102aとして、第2の絶縁膜112~第4の絶縁膜114からなる3層を有する場合を例に挙げたが、本発明方法は、窒化珪素膜が2層または4層以上積層された積層窒化珪素膜を有するMOS型半導体メモリ装置を製造する場合にも適用できる。
Although FIG. 9 exemplifies the case where the laminated silicon nitride film 102a has three layers including the second
以上、本発明の実施形態を述べたが、本発明は上記実施形態に制約されることはなく、種々の変形が可能である。例えば、以上に挙げた各実施の形態では、成膜原料ガスとして、窒素ガスとジシランを用いる場合を例に挙げて説明したが、窒素ガス以外に、例えばアンモニア、ヒドラジン、モノヒドラジン等を用いることも可能であり、また、他のシリコン含有化合物ガス例えばシラン、トリシラン、トリシリルアミンなどを用いても、同様に基板にRFバイアスを印加することによって窒化珪素膜中のトラップの数とその分布を均一に制御することが可能である。 As mentioned above, although embodiment of this invention was described, this invention is not restrict | limited to the said embodiment, A various deformation | transformation is possible. For example, in each embodiment mentioned above, although the case where nitrogen gas and disilane were used was mentioned as an example and explained as a film-forming source gas, ammonia, a hydrazine, monohydrazine etc. are used other than nitrogen gas, for example. Even if other silicon-containing compound gases such as silane, trisilane, trisilylamine, etc. are used, the number and distribution of traps in the silicon nitride film can be obtained by similarly applying an RF bias to the substrate. It is possible to control uniformly.
1…処理容器
2…載置台
3…支持部材
5…ヒータ
9…高周波電源
12…排気管
14…第1のガス導入部
15…第2のガス導入部
16…搬入出口
17…ゲートバルブ
18…ガス供給機構
19a…窒素含有ガス供給源
19b…シリコン含有化合物ガス供給源
19c…不活性ガス供給源
19d…クリーニングガス供給源
24…排気装置
27…マイクロ波導入機構
28…透過板
29…シール部材
31…平面アンテナ
32…マイクロ波放射孔
37…導波管
39…マイクロ波発生装置
50…制御部
100…プラズマCVD装置
101…シリコン基板
102a…積層窒化珪素膜
103…ゲート電極
104…第1のソース・ドレイン
105…第2のソース・ドレイン
111…第1の絶縁膜
112…第2の絶縁膜
113…第3の絶縁膜
114…第4の絶縁膜
115…第5の絶縁膜
201…MOS型半導体メモリ装置
W…シリコンウエハ(基板)
DESCRIPTION OF SYMBOLS 1 ... Processing
Claims (5)
前記処理容器内の圧力を10Pa以上133.3Pa以下の範囲内に設定し、被処理体を載置する載置台の電極に被処理体の面積当り0.009W/cm2以上0.64W/cm2以下の範囲内の出力密度で高周波電力を供給して被処理体に高周波バイアスを印加しながら、シリコン含有化合物ガスと窒素ガスを含む成膜ガスを用いてプラズマCVDを行うことにより窒化珪素膜を形成する工程を備えたことを特徴とする窒化珪素膜の成膜方法。 Method of forming a silicon nitride film, in which a silicon nitride film is formed on a processing object by plasma CVD using a plasma CVD apparatus in which microwaves are introduced into a processing container by a planar antenna having a plurality of holes to generate plasma And
The pressure in the processing vessel is set in the range of 10 Pa to 133.3 Pa, and the electrode of the mounting table on which the object to be processed is mounted is 0.009 W / cm 2 to 0.64 W / cm per area of the object to be processed. Silicon nitride film by performing plasma CVD using a film forming gas containing a silicon-containing compound gas and a nitrogen gas while supplying a high frequency power with a power density within the range of 2 or less and applying a high frequency bias to the object Forming a silicon nitride film.
前記処理容器内の圧力を10Pa以上133.3Pa以下の範囲内に設定し、被処理体を載置する載置台の電極に被処理体の面積当り0.009W/cm2以上0.64W/cm2以下の範囲内の出力密度で高周波電力を供給して被処理体に高周波バイアスを印加しながら、シリコン含有化合物ガスと窒素ガスを含む成膜ガスを用いてプラズマCVDを行うことにより窒化珪素膜を形成する第1の工程と、
前記第1の工程と同じ設定圧力で、前記載置台の電極に高周波電力を供給しないか、前記第1の工程とは異なる出力密度で高周波電力を供給して被処理体に高周波バイアスを印加して、シリコン含有化合物ガスと窒素ガスを含む成膜ガスを用いてプラズマCVDを行うことにより、前記第1の工程で形成される窒化珪素膜と比べてトラップの存在数が少ない窒化珪素膜を形成する第2の工程と、
を備えたことを特徴とする窒化珪素膜の成膜方法。 A silicon nitride film formed by laminating a silicon nitride film by plasma CVD on a target using a plasma CVD apparatus that generates a plasma by introducing microwaves into a processing container with a planar antenna having a plurality of holes. A film forming method,
The pressure in the processing vessel is set in the range of 10 Pa to 133.3 Pa, and the electrode of the mounting table on which the object to be processed is mounted is 0.009 W / cm 2 to 0.64 W / cm per area of the object to be processed. Silicon nitride film by performing plasma CVD using a film forming gas containing a silicon-containing compound gas and a nitrogen gas while supplying a high frequency power with a power density within the range of 2 or less and applying a high frequency bias to the object A first step of forming
The high frequency power is not supplied to the electrode of the mounting table at the same set pressure as the first step, or the high frequency power is supplied at an output density different from the first step to apply the high frequency bias to the object By performing plasma CVD using a film forming gas containing a silicon-containing compound gas and a nitrogen gas, a silicon nitride film in which the number of traps is smaller than that of the silicon nitride film formed in the first step is formed. The second step of
A method of forming a silicon nitride film, comprising:
前記制御プログラムは、実行時に、複数の孔を有する平面アンテナにより処理容器内にマイクロ波を導入してプラズマを生成させるプラズマCVD装置を用い、被処理体上にプラズマCVD法によって窒化珪素膜を形成するに際し、10Pa以上133.3Pa以下の範囲内の処理圧力で、被処理体を載置する載置台の電極に被処理体の面積当り0.009W/cm2以上0.64W/cm2以下の範囲内の出力密度で高周波電力を供給し、被処理体に高周波バイアスを印加しながら、シリコン含有化合物ガスと窒素ガスを含む成膜ガスを用いてプラズマCVDが行われるように、コンピュータに前記プラズマCVD装置を制御させるものであることを特徴とするコンピュータ読み取り可能な記憶媒体。 A computer readable storage medium storing a control program operating on a computer, comprising:
The control program forms a silicon nitride film by a plasma CVD method using a plasma CVD apparatus which generates a plasma by introducing a microwave into a processing container by a planar antenna having a plurality of holes at the time of execution. to upon, the processing pressure in the range of 10Pa or more 133.3Pa less, of the workpiece to the electrode of the mounting table for mounting the workpiece area per 0.009 W / cm 2 or more 0.64W / cm 2 or less of The plasma is supplied to the computer such that plasma CVD is performed using a film forming gas containing a silicon-containing compound gas and a nitrogen gas while supplying a high frequency power at a power density within the range and applying a high frequency bias to the object A computer readable storage medium for controlling a CVD device.
被処理体を収容する上部が開口した処理容器と、
前記処理容器内に配置され、被処理体を載置する載置台と、
前記載置台内に設けられ、被処理体に高周波電力を印加する電極と、
前記電極に接続する高周波電源と、
前記処理容器の前記開口を塞ぐ誘電体部材と、
前記誘電体部材の上部に設けられ、前記処理容器内にマイクロ波を導入するための複数の孔を有する平面アンテナと、
前記処理容器内にシリコン含有化合物ガスと窒素含有ガスを含む成膜ガスを供給するガス供給機構に接続するガス導入部と、
前記処理容器内を減圧排気する排気機構と、
前記電極に被処理体の面積当り0.009W/cm2以上0.64W/cm2以下の範囲内の出力で前記高周波電源より高周波電力を供給して被処理体に高周波バイアスを印加しながら、前記ガス供給機構に接続するガス導入部から前記シリコン含有化合物ガスと前記窒素ガスを含む成膜ガスを前記処理容器内に供給することにより、前記処理容器内において、10Pa以上133.3Pa以下の範囲内の処理圧力で、プラズマCVDが行われるように制御する制御部と、
を備えたことを特徴とするプラズマCVD装置。 A plasma CVD apparatus for forming a silicon nitride film on an object to be processed by plasma CVD method, comprising:
A processing vessel having an open top for containing the object to be treated;
A mounting table disposed in the processing container for mounting the object to be processed;
An electrode provided in the mounting table and applying high frequency power to the object;
A high frequency power supply connected to the electrode;
A dielectric member closing the opening of the processing container;
A planar antenna provided above the dielectric member and having a plurality of holes for introducing microwaves into the processing vessel;
A gas introduction unit connected to a gas supply mechanism for supplying a film forming gas containing a silicon-containing compound gas and a nitrogen-containing gas into the processing container;
An exhaust mechanism for depressurizing and exhausting the inside of the processing container;
The high frequency power is supplied from the high frequency power supply to the electrode with an output in the range of 0.009 W / cm 2 or more and 0.64 W / cm 2 or less per area of the object to be treated, and a high frequency bias is applied to the object to be treated The film forming gas containing the silicon-containing compound gas and the nitrogen gas is supplied into the processing container from the gas introduction unit connected to the gas supply mechanism, whereby the range of 10 Pa or more and 133.3 Pa or less is generated in the processing container. A control unit that controls plasma CVD to be performed at an internal processing pressure;
The plasma CVD apparatus characterized by having.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1020117007198A KR101254987B1 (en) | 2008-09-30 | 2009-09-29 | Method for depositing silicon nitride film, computer-readable storage medium, plasma cvd device and semiconductor memory device |
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| Application Number | Priority Date | Filing Date | Title |
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| JP2008253932A JP5460011B2 (en) | 2008-09-30 | 2008-09-30 | Silicon nitride film forming method, computer-readable storage medium, and plasma CVD apparatus |
| JP2008-253932 | 2008-09-30 |
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| WO2010038886A1 true WO2010038886A1 (en) | 2010-04-08 |
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| Application Number | Title | Priority Date | Filing Date |
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| PCT/JP2009/067303 Ceased WO2010038886A1 (en) | 2008-09-30 | 2009-09-29 | Method for depositing silicon nitride film, computer-readable storage medium, and plasma cvd device |
Country Status (4)
| Country | Link |
|---|---|
| JP (1) | JP5460011B2 (en) |
| KR (1) | KR101254987B1 (en) |
| TW (1) | TW201030172A (en) |
| WO (1) | WO2010038886A1 (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20130075875A1 (en) * | 2010-05-28 | 2013-03-28 | Mitsubishi Heavy Industries, Ltd. | Silicon nitride film of semiconductor element, and method and apparatus for producing silicon nitride film |
| WO2013108523A1 (en) | 2012-01-19 | 2013-07-25 | 株式会社フジクラ | Multi-core fiber |
Families Citing this family (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR101227718B1 (en) * | 2011-04-18 | 2013-01-29 | 세크론 주식회사 | Probe station |
| JP6101467B2 (en) | 2012-10-04 | 2017-03-22 | 東京エレクトロン株式会社 | Film forming method and film forming apparatus |
| JP6410622B2 (en) | 2014-03-11 | 2018-10-24 | 東京エレクトロン株式会社 | Plasma processing apparatus and film forming method |
| US9214333B1 (en) * | 2014-09-24 | 2015-12-15 | Lam Research Corporation | Methods and apparatuses for uniform reduction of the in-feature wet etch rate of a silicon nitride film formed by ALD |
| JP6787813B2 (en) * | 2017-02-16 | 2020-11-18 | 株式会社Kokusai Electric | Semiconductor device manufacturing methods, substrate processing devices and programs |
| JP7724661B2 (en) * | 2021-08-30 | 2025-08-18 | 東京エレクトロン株式会社 | Film formation method and film formation apparatus |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02244676A (en) * | 1989-03-16 | 1990-09-28 | Fujitsu Ltd | Thin film transistor |
| JP2007138301A (en) * | 1998-10-07 | 2007-06-07 | Lg Philips Lcd Co Ltd | Thin film deposition equipment |
| WO2007139142A1 (en) * | 2006-05-31 | 2007-12-06 | Tokyo Electron Limited | Plasma cvd method, method for forming silicon nitride film, method for manufacturing semiconductor device and plasma cvd method |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2000058483A (en) * | 1998-08-05 | 2000-02-25 | Hitachi Ltd | Method for manufacturing semiconductor device |
| JP2008124424A (en) * | 2006-10-16 | 2008-05-29 | Tokyo Electron Ltd | Plasma film forming apparatus and plasma film forming method |
-
2008
- 2008-09-30 JP JP2008253932A patent/JP5460011B2/en not_active Expired - Fee Related
-
2009
- 2009-09-29 KR KR1020117007198A patent/KR101254987B1/en not_active Expired - Fee Related
- 2009-09-29 WO PCT/JP2009/067303 patent/WO2010038886A1/en not_active Ceased
- 2009-09-30 TW TW098133188A patent/TW201030172A/en unknown
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02244676A (en) * | 1989-03-16 | 1990-09-28 | Fujitsu Ltd | Thin film transistor |
| JP2007138301A (en) * | 1998-10-07 | 2007-06-07 | Lg Philips Lcd Co Ltd | Thin film deposition equipment |
| WO2007139142A1 (en) * | 2006-05-31 | 2007-12-06 | Tokyo Electron Limited | Plasma cvd method, method for forming silicon nitride film, method for manufacturing semiconductor device and plasma cvd method |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20130075875A1 (en) * | 2010-05-28 | 2013-03-28 | Mitsubishi Heavy Industries, Ltd. | Silicon nitride film of semiconductor element, and method and apparatus for producing silicon nitride film |
| WO2013108523A1 (en) | 2012-01-19 | 2013-07-25 | 株式会社フジクラ | Multi-core fiber |
Also Published As
| Publication number | Publication date |
|---|---|
| KR20110055703A (en) | 2011-05-25 |
| JP5460011B2 (en) | 2014-04-02 |
| KR101254987B1 (en) | 2013-04-16 |
| TW201030172A (en) | 2010-08-16 |
| JP2010087186A (en) | 2010-04-15 |
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