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WO2008108258A3 - 積層体およびその製造方法 - Google Patents

積層体およびその製造方法 Download PDF

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Publication number
WO2008108258A3
WO2008108258A3 PCT/JP2008/053479 JP2008053479W WO2008108258A3 WO 2008108258 A3 WO2008108258 A3 WO 2008108258A3 JP 2008053479 W JP2008053479 W JP 2008053479W WO 2008108258 A3 WO2008108258 A3 WO 2008108258A3
Authority
WO
WIPO (PCT)
Prior art keywords
inner layer
laminated body
manufacturing
layer resistive
same
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/JP2008/053479
Other languages
English (en)
French (fr)
Other versions
WO2008108258A2 (ja
Inventor
Isao Tonouchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Koa Corp
Original Assignee
Koa Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Koa Corp filed Critical Koa Corp
Priority to US12/529,700 priority Critical patent/US8193898B2/en
Priority to CN2008800068948A priority patent/CN101636797B/zh
Publication of WO2008108258A2 publication Critical patent/WO2008108258A2/ja
Publication of WO2008108258A3 publication Critical patent/WO2008108258A3/ja
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01C—RESISTORS
    • H01C1/00—Details
    • H01C1/14—Terminals or tapping points or electrodes specially adapted for resistors; Arrangements of terminals or tapping points or electrodes on resistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01C—RESISTORS
    • H01C17/00—Apparatus or processes specially adapted for manufacturing resistors
    • H01C17/28—Apparatus or processes specially adapted for manufacturing resistors adapted for applying terminals
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01C—RESISTORS
    • H01C7/00—Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material
    • H01C7/003—Thick film resistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01C—RESISTORS
    • H01C7/00—Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material
    • H01C7/18—Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material comprising a plurality of layers stacked between terminals
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/16—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor
    • H05K1/167—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor incorporating printed resistors
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/03—Use of materials for the substrate
    • H05K1/0306—Inorganic insulating substrates, e.g. ceramic, glass
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H05K1/115—Via connections; Lands around holes or via connections
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
    • H05K2201/09672—Superposed layout, i.e. in different planes
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
    • H05K2201/0979—Redundant conductors or connections, i.e. more than one current path between two points
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4626—Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials
    • H05K3/4629—Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials laminating inorganic sheets comprising printed circuits, e.g. green ceramic sheets

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Manufacturing & Machinery (AREA)
  • Non-Adjustable Resistors (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Apparatuses And Processes For Manufacturing Resistors (AREA)
  • Fixed Capacitors And Capacitor Manufacturing Machines (AREA)

Abstract

　省スペース化を可能にし、かつ内層抵抗値のばらつきを抑制した積層体およびその製造方法を提供する。セラミックス多層基板１０内に内層抵抗７を形成する際、従来の積層体において採用していたパッド電極をなくし、並列する複数のビア電極３ａ，３ｂによって内層抵抗体７と外部電極（上面電極３２、下面電極３４）とを直接接続する。また、複数の内層抵抗体が多層に配されたセラミックス多層基板では、内層抵抗体同士を並列する複数のビア電極によって相互に直接接続する。
PCT/JP2008/053479 2007-03-02 2008-02-28 積層体およびその製造方法 Ceased WO2008108258A2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
US12/529,700 US8193898B2 (en) 2007-03-02 2008-02-28 Laminated body and manufacturing method thereof
CN2008800068948A CN101636797B (zh) 2007-03-02 2008-02-28 层叠体及其制造方法

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2007052567A JP4224109B2 (ja) 2007-03-02 2007-03-02 積層体およびその製造方法
JP2007-052567 2007-03-02

Publications (2)

Publication Number Publication Date
WO2008108258A2 WO2008108258A2 (ja) 2008-09-12
WO2008108258A3 true WO2008108258A3 (ja) 2008-12-04

Family

ID=39738909

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2008/053479 Ceased WO2008108258A2 (ja) 2007-03-02 2008-02-28 積層体およびその製造方法

Country Status (4)

Country Link
US (1) US8193898B2 (ja)
JP (1) JP4224109B2 (ja)
CN (1) CN101636797B (ja)
WO (1) WO2008108258A2 (ja)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103180915A (zh) * 2010-11-03 2013-06-26 埃普科斯股份有限公司 多层陶瓷元件及用于制造多层陶瓷元件的方法
JP6385075B2 (ja) * 2013-04-15 2018-09-05 キヤノン株式会社 プリント配線板、プリント回路板及び電子機器
CN104628408B (zh) * 2013-11-07 2017-01-11 中国科学院宁波材料技术与工程研究所 一种max相陶瓷材料的焊接方法
CN108966491B (zh) * 2017-12-29 2019-07-16 深圳硅基仿生科技有限公司 气密馈通的陶瓷基板及其制造方法
WO2020158808A1 (ja) * 2019-01-30 2020-08-06 京セラ株式会社 電子部品実装用基体および電子装置
JP7548900B2 (ja) * 2019-03-28 2024-09-10 ローム株式会社 チップ抵抗器
TWI687944B (zh) * 2019-08-15 2020-03-11 聚鼎科技股份有限公司 正溫度係數元件
JP7475167B2 (ja) * 2020-03-10 2024-04-26 Koa株式会社 電流検出装置
US11776899B2 (en) 2020-05-11 2023-10-03 Mediatek Inc. Via array design for multi-layer redistribution circuit structure

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01290283A (ja) * 1988-05-17 1989-11-22 Nec Corp 混成集積回路用厚膜印刷基板
JPH0696914A (ja) * 1992-09-16 1994-04-08 Ribaa Eretetsuku Kk 角形チップ抵抗器の製造方法
JPH09298365A (ja) * 1996-03-04 1997-11-18 Ibiden Co Ltd 多層プリント配線板
JPH10163004A (ja) * 1996-12-02 1998-06-19 Sony Corp 抵抗器、コンデンサ、インダクタ及びコネクタ
JP2003203806A (ja) * 2001-10-30 2003-07-18 Murata Mfg Co Ltd 高圧可変抵抗器
JP2004356306A (ja) * 2003-05-28 2004-12-16 Kyocera Corp 抵抗体ペースト並びに抵抗体付きセラミック配線基板およびその製法
JP2006121005A (ja) * 2004-10-25 2006-05-11 Denso Corp プリント基板及びその製造方法

Family Cites Families (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0677660A (ja) 1992-08-26 1994-03-18 Sumitomo Kinzoku Ceramics:Kk 抵抗体付きセラミックス回路基板
JP3213663B2 (ja) 1993-12-28 2001-10-02 コーア株式会社 角形チップ抵抗器の製造方法
US6236302B1 (en) * 1998-03-05 2001-05-22 Bourns, Inc. Multilayer conductive polymer device and method of manufacturing same
US6518570B1 (en) * 1998-04-03 2003-02-11 Brookhaven Science Associates Sensing mode atomic force microscope
US6346189B1 (en) * 1998-08-14 2002-02-12 The Board Of Trustees Of The Leland Stanford Junior University Carbon nanotube structures made using catalyst islands
JP3811004B2 (ja) * 2000-11-26 2006-08-16 喜萬 中山 導電性走査型顕微鏡用プローブ
US6862921B2 (en) * 2001-03-09 2005-03-08 Veeco Instruments Inc. Method and apparatus for manipulating a sample
US7441444B2 (en) * 2001-03-30 2008-10-28 The Johns Hopkins University AFM cantilevers and methods for making and using same
CN1231926C (zh) 2001-10-30 2005-12-14 株式会社村田制作所 高压可变电阻器
US7022541B1 (en) * 2001-11-19 2006-04-04 The Board Of Trustees Of The Leland Stanford Junior University Patterned growth of single-walled carbon nanotubes from elevated wafer structures
US6668628B2 (en) * 2002-03-29 2003-12-30 Xerox Corporation Scanning probe system with spring probe
TW539229U (en) * 2002-06-06 2003-06-21 Protectronics Technology Corp Surface mountable laminated thermistor device
TW547866U (en) * 2002-07-31 2003-08-11 Polytronics Technology Corp Over-current protection device
US7163658B2 (en) * 2003-04-23 2007-01-16 Rouvain Bension Rapid sequencing of polymers
US6973722B2 (en) * 2003-11-17 2005-12-13 Palo Alto Research Center Incorporated Release height adjustment of stressy metal devices by annealing before and after release
US7374793B2 (en) * 2003-12-11 2008-05-20 International Business Machines Corporation Methods and structures for promoting stable synthesis of carbon nanotubes
US7026583B2 (en) * 2004-04-05 2006-04-11 China Steel Corporation Surface mountable PTC device
US7170055B1 (en) * 2005-08-18 2007-01-30 The Board Of Trustees Of The Leland Stanford Junior University Nanotube arrangements and methods therefor

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01290283A (ja) * 1988-05-17 1989-11-22 Nec Corp 混成集積回路用厚膜印刷基板
JPH0696914A (ja) * 1992-09-16 1994-04-08 Ribaa Eretetsuku Kk 角形チップ抵抗器の製造方法
JPH09298365A (ja) * 1996-03-04 1997-11-18 Ibiden Co Ltd 多層プリント配線板
JPH10163004A (ja) * 1996-12-02 1998-06-19 Sony Corp 抵抗器、コンデンサ、インダクタ及びコネクタ
JP2003203806A (ja) * 2001-10-30 2003-07-18 Murata Mfg Co Ltd 高圧可変抵抗器
JP2004356306A (ja) * 2003-05-28 2004-12-16 Kyocera Corp 抵抗体ペースト並びに抵抗体付きセラミック配線基板およびその製法
JP2006121005A (ja) * 2004-10-25 2006-05-11 Denso Corp プリント基板及びその製造方法

Also Published As

Publication number Publication date
JP4224109B2 (ja) 2009-02-12
US20100097172A1 (en) 2010-04-22
CN101636797B (zh) 2012-06-13
WO2008108258A2 (ja) 2008-09-12
CN101636797A (zh) 2010-01-27
US8193898B2 (en) 2012-06-05
JP2008218628A (ja) 2008-09-18

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