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WO2004084303A2 - Dispositif a puce a bosses sur support de substrat - Google Patents

Dispositif a puce a bosses sur support de substrat Download PDF

Info

Publication number
WO2004084303A2
WO2004084303A2 PCT/DE2004/000504 DE2004000504W WO2004084303A2 WO 2004084303 A2 WO2004084303 A2 WO 2004084303A2 DE 2004000504 W DE2004000504 W DE 2004000504W WO 2004084303 A2 WO2004084303 A2 WO 2004084303A2
Authority
WO
WIPO (PCT)
Prior art keywords
chip
contact elements
substrate
substrate carrier
arrangement according
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/DE2004/000504
Other languages
German (de)
English (en)
Other versions
WO2004084303A3 (fr
Inventor
Erik Heinemann
Frank PÜSCHNER
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Infineon Technologies AG
Original Assignee
Infineon Technologies AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Infineon Technologies AG filed Critical Infineon Technologies AG
Publication of WO2004084303A2 publication Critical patent/WO2004084303A2/fr
Publication of WO2004084303A3 publication Critical patent/WO2004084303A3/fr
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • H10W72/20—
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07745—Mounting details of integrated circuit chips
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07745—Mounting details of integrated circuit chips
    • G06K19/07747—Mounting details of integrated circuit chips at least one of the integrated circuit chips being mounted as a module
    • H10W70/66—
    • H10W70/699—
    • H10W72/30—
    • H10W74/012—
    • H10W74/15—
    • H10W72/072—
    • H10W72/073—
    • H10W72/251—
    • H10W72/5522—
    • H10W72/856—
    • H10W72/884—
    • H10W74/00—
    • H10W90/724—
    • H10W90/734—
    • H10W90/754—

Definitions

  • the invention relates to an arrangement with a substrate carrier and a chip attached thereon.
  • FIG. 2 shows an exemplary embodiment of a substrate carrier with a chip attached thereon, for example for telephone cards or chip cards (smart cards) for security applications.
  • a chip is glued to a substrate carrier by means of an adhesive.
  • On the opposite side of the substrate carrier there are external contacts which can be connected, for example, to a chip card reader.
  • the substrate has openings at the location of these external contacts, so that the external contacts are connected to wires which lead to the contact points on the top of the chip ,
  • these wires are usually covered with a gold layer or formed directly from gold.
  • the substrate carrier with the chip thereon is then inserted into a chip card in such a way that the chip is protected. Bonding methods are available for the intimate connection of the gold wires to the external contacts or the chip contacts. For this purpose, the gold wire and the contact point are heated locally, which leads to an intimate electrical connection between the gold wire and
  • Contact point leads In order to protect the gold wires from tearing when the chip card is mechanically loaded, they are usually additionally embedded in a resin. However, the high processing temperatures of such contacting require a temperature-stable substrate or a temperature-stable chip and therefore cause a higher space and cost.
  • the object of the present invention is to provide an arrangement without the disadvantages mentioned.
  • the arrangement also has a chip provided with contact points, which is connected to the substrate carrier such that its side provided with contact points faces the surface of the substrate carrier provided with the chip contact elements and is electrically connected to the chip contact elements.
  • the thickness of the chip is larger than the thickness of the substrate.
  • the thickness of the chip is always greater than the sum of the thicknesses of the substrate of the external contact elements and the chip contact elements.
  • the substrate carrier itself is advantageously formed from a thin plastic.
  • An alternative embodiment is the formation of the substrate carrier by paper. This ensures the highest possible reliability in mechanical, dynamic bending processes.
  • An advantageous embodiment of the contact is the formation of the contact elements by a gold-nickel-copper metallization layer in which gold forms the uppermost partial layer.
  • the object according to the invention can advantageously be connected to a data card with a card body which has a recess.
  • FIG. 1 shows an exemplary embodiment of the invention
  • Figure 2 shows a known embodiment.
  • the substrate carrier S which has two surfaces 01 and 02. Furthermore, the substrate contains through holes D, so that the holes
  • the substrate S has external contact elements AK which consist of a metal layer.
  • the substrate carrier contains chip contact elements CK, which are electrically connected through the through holes D to the external contact elements AK.
  • the bushings D are completely filled with a metal that is also part of the metal layer.
  • External contact elements AK, the substrate layer and the contact elements CK together have a thickness Dl in the order of 100 ⁇ m.
  • the substrate carrier S which uses a plastic such as PEN, PET, PI or SR4 as the base material, has a layer thickness of approximately 75 ⁇ m. Alternatively, this substrate carrier can also be realized using paper or another flexible material.
  • the contact layers AK and CK are made up of a three-component metallization layer. Two approximately 10 ⁇ m thick copper metallization layers are connected to the two surfaces of the substrate and directly to one another via the through holes D. An approx. 2 ⁇ m thick nickel layer is applied to each copper layer. To protect against oxidation, a thin gold layer is applied to these contacts, which is typically 0.05 ⁇ m or a flash layer. In addition to this embodiment variant, however, other metal layers and alloys can also be used, for example palladium.
  • the thickness By varying the thickness, increased stability of the substrate carrier can be achieved if necessary.
  • the metals are deposited galvanically. Through this
  • Preparation with metal layers of very small thickness is a flexible substrate carrier with great reliability in mechanical, dynamic bending processes.
  • the arrangement also has a chip IC, the contacts of which are connected to the chip contact elements CK via the B ps B.
  • the side of the chip IC provided with the contact points is that side provided with the chip contact elements CK
  • Surface 02 of the substrate carrier S faces and thus forms a flip chip.
  • the bumps B are raised contacting parts which consist of metal which has a different degree of hardness compared to the chip contact elements CK.
  • the chip contact element CK can be made of a softer material than the bumps B.
  • An adhesive G is provided for attaching the chip IC to the substrate S.
  • This can be, for example, a resin or a soft plastic. It makes sense to arrange the adhesive around the chip contact elements CK in order on the one hand to protect the electrical contact between the chip IC and the chip contact element CK and on the other hand to connect the chip IC to the substrate.
  • the contact surfaces can be coated with conductive silver or a similar substance beforehand.
  • the thickness D2 of the so-called flip chip IC in this arrangement is significantly greater than the thickness D1 of the sum of the substrate S, and of the contact elements CK and AK. As a result, the reliability of the arrangement is given even with mechanical static loading. Through the direct contact of the chip IC with the chip contact elements CK and Eliminating the need for additional contact wires means that overall thinner modules can be manufactured without having to accept a lower load capacity.
  • a data carrier card which has a card body with a recess and the substrate carrier arrangement according to the invention.
  • the substrate carrier is arranged in the recess such that the chip placed on it extends into the recess.
  • a thinner data carrier card can be implemented overall.
  • the invention is not limited to the arrangement with a data carrier card. The main idea is rather the arrangement between a carrier and a chip located thereon, which is arranged such that its contacts are on the side facing the carrier and the chip always has a greater thickness than the carrier.

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Credit Cards Or The Like (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)

Abstract

L'invention concerne un dispositif comprenant un support de substrat (S) présentant une première surface (01) sur laquelle sont disposés des éléments de contact extérieur (AK), une seconde surface opposée (02) sur laquelle sont disposés des éléments de contact à puce (CK), les éléments de contact des deux surfaces étant connectés électriquement entre eux (D) à travers le substrat (S), une puce (IC), dont la partie (K) munie de points de contact (B) est tournée vers la seconde surface, et qui est connectée électriquement avec les éléments de contact à puce (CK), l'épaisseur (D2) de la puce étant supérieure à l'épaisseur du substrat (S). Les points de contact (B) de la puce (IC) sont formés en un métal présentant une dureté différente des éléments de contact à puce (CK).
PCT/DE2004/000504 2003-03-18 2004-03-12 Dispositif a puce a bosses sur support de substrat Ceased WO2004084303A2 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE10311965.5 2003-03-18
DE10311965A DE10311965A1 (de) 2003-03-18 2003-03-18 Flip-Chip Anordnung auf einem Substratträger

Publications (2)

Publication Number Publication Date
WO2004084303A2 true WO2004084303A2 (fr) 2004-09-30
WO2004084303A3 WO2004084303A3 (fr) 2004-12-23

Family

ID=32980617

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/DE2004/000504 Ceased WO2004084303A2 (fr) 2003-03-18 2004-03-12 Dispositif a puce a bosses sur support de substrat

Country Status (2)

Country Link
DE (1) DE10311965A1 (fr)
WO (1) WO2004084303A2 (fr)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP3062266B1 (fr) * 2013-10-22 2020-10-14 Toppan Printing Co., Ltd. Module de ci, carte à ci et substrat de module de ci

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07302858A (ja) * 1994-04-28 1995-11-14 Toshiba Corp 半導体パッケージ
JPH0863567A (ja) * 1994-08-19 1996-03-08 Citizen Watch Co Ltd Ｉｃカード用モジュール
FR2736452B1 (fr) * 1995-07-05 1997-09-19 Solaic Sa Procede de fabrication d'une carte intelligente comprenant un corps en matiere fibreuse, et carte intelligente ainsi obtenue
FR2740935B1 (fr) * 1995-11-03 1997-12-05 Schlumberger Ind Sa Procede de fabrication d'un ensemble de modules electroniques pour cartes a memoire electronique
EP0905657B1 (fr) * 1997-09-23 2003-05-28 STMicroelectronics S.r.l. Billet de banque comportant un circuit integré
FR2773642B1 (fr) * 1998-01-13 2000-03-03 Schlumberger Ind Sa Procede de connexion de plots d'un composant a circuits integres a des plages de connexion d'un substrat plastique au moyen de protuberances
EP1256982A1 (fr) * 2001-05-11 2002-11-13 Valtronic S.A. Module électronique et son procede d'assemblage
DE10139395A1 (de) * 2001-08-10 2003-03-06 Infineon Technologies Ag Kontaktierung von Halbleiterchips in Chipkarten
DE10145752B4 (de) * 2001-09-17 2004-09-02 Infineon Technologies Ag Nicht-leitendes, ein Band oder einen Nutzen bildendes Substrat, auf dem eine Vielzahl von Trägerelementen ausgebildet ist

Also Published As

Publication number Publication date
WO2004084303A3 (fr) 2004-12-23
DE10311965A1 (de) 2004-10-14

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