TWI854645B - Heat dissipating sheet and chip on film package structure - Google Patents
Heat dissipating sheet and chip on film package structure Download PDFInfo
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- TWI854645B TWI854645B TW112117145A TW112117145A TWI854645B TW I854645 B TWI854645 B TW I854645B TW 112117145 A TW112117145 A TW 112117145A TW 112117145 A TW112117145 A TW 112117145A TW I854645 B TWI854645 B TW I854645B
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本發明是有關於一種貼片以及封裝結構,且特別是有關於一種散熱貼片以及採用此散熱貼片的薄膜覆晶封裝結構。The present invention relates to a patch and a packaging structure, and in particular to a heat dissipation patch and a film flip chip packaging structure using the heat dissipation patch.
現行的薄膜覆晶封裝(Chip on Film, COF)為增進散熱效果,通常會貼附散熱貼片於薄膜覆晶封裝結構的表面上,特別是對應主要發熱源的晶片位置處,藉以增加散熱面積而達到較佳的散熱效果。然而,當散熱貼片貼附於薄膜覆晶封裝結構的晶片面時,晶片的厚度使散熱貼片拉伸產生應力,特別是對應晶片的長邊處。若散熱貼片的邊緣與晶片之間的距離較短,而不足以使對應晶片長邊處積累的連續應力均勻消散時,散熱貼片無法平整貼附於薄膜覆晶封裝結構上,而易在散熱貼片的邊緣處產生皺摺或波浪紋,進而影響產品的可靠度、外觀規格及散熱效果。In order to improve the heat dissipation effect, the current chip on film (COF) usually attaches a heat sink to the surface of the COF structure, especially at the location of the chip corresponding to the main heat source, so as to increase the heat dissipation area and achieve a better heat dissipation effect. However, when the heat sink is attached to the chip surface of the COF structure, the thickness of the chip causes the heat sink to stretch and generate stress, especially at the long side of the chip. If the distance between the edge of the heat sink and the chip is short and insufficient to evenly dissipate the continuous stress accumulated at the corresponding long side of the chip, the heat sink cannot be smoothly attached to the film flip chip package structure, and wrinkles or waves are likely to form at the edge of the heat sink, thereby affecting the reliability, appearance specifications and heat dissipation effect of the product.
本發明提供一種散熱貼片,其可減少或避免現有技術中散熱貼片無法平整貼附於薄膜覆晶封裝結構上,而在散熱貼片的邊緣產生皺摺/波浪紋的情形。The present invention provides a heat sink patch, which can reduce or avoid the problem in the prior art that the heat sink patch cannot be evenly attached to the film chip package structure and wrinkles/waves are generated on the edge of the heat sink patch.
本發明還提供一種薄膜覆晶封裝結構,其包括上述的散熱貼片,可具有較佳的產品可靠度及散熱效率。The present invention also provides a thin film chip package structure, which includes the above-mentioned heat sink patch and can have better product reliability and heat dissipation efficiency.
本發明的散熱貼片,用以配置於一可撓性線路載板。可撓性線路載板具有一表面以及定義於表面的一晶片設置區。散熱貼片配置於可撓性線路載板的表面上並對應晶片設置區。晶片設置區具有相對的兩個長邊與相對的兩個短邊。散熱貼片包括一散熱層以及一絕緣保護層。絕緣保護層設置於散熱層上。散熱貼片對應於兩個長邊的兩個側邊的至少其中一者具有內凹部,且內凹部形成於散熱層與絕緣保護層的至少其中一者。The heat sink patch of the present invention is used to be configured on a flexible circuit carrier. The flexible circuit carrier has a surface and a chip setting area defined on the surface. The heat sink patch is configured on the surface of the flexible circuit carrier and corresponds to the chip setting area. The chip setting area has two opposite long sides and two opposite short sides. The heat sink patch includes a heat sink layer and an insulating protective layer. The insulating protective layer is arranged on the heat sink layer. At least one of the two side edges of the heat sink patch corresponding to the two long edges has an inner recess, and the inner recess is formed in at least one of the heat sink layer and the insulating protective layer.
本發明的薄膜覆晶封裝結構,包括一可撓性線路載板、一晶片以及一散熱貼片。可撓性線路載板具有一表面以及定義於表面的一晶片設置區。晶片設置區具有相對的兩個長邊與相對的兩個短邊。晶片配置於晶片設置區內並與可撓性線路載板電性連接。散熱貼片配置於可撓性線路載板的表面上。散熱貼片對應晶片設置區並覆蓋晶片。散熱貼片包括一散熱層以及一絕緣保護層。絕緣保護層設置於散熱層上。散熱貼片對應於兩個長邊的兩個側邊的至少其中一者具有內凹部,且內凹部形成於散熱層與絕緣保護層的至少其中一者。The film flip chip packaging structure of the present invention includes a flexible circuit carrier, a chip and a heat sink. The flexible circuit carrier has a surface and a chip setting area defined on the surface. The chip setting area has two opposite long sides and two opposite short sides. The chip is arranged in the chip setting area and is electrically connected to the flexible circuit carrier. The heat sink is arranged on the surface of the flexible circuit carrier. The heat sink corresponds to the chip setting area and covers the chip. The heat sink includes a heat sink layer and an insulating protective layer. The insulating protective layer is arranged on the heat sink layer. At least one of the two side edges of the heat dissipation patch corresponding to the two long edges has a concave portion, and the concave portion is formed in at least one of the heat dissipation layer and the insulating protection layer.
基於上述,在本發明的散熱貼片的設計中,散熱貼片對應於晶片設置區的兩個長邊的兩個側邊的至少其中一者具有內凹部,且內凹部形成於散熱層與絕緣保護層的至少其中一者。當散熱貼片貼附於可撓性線路載板時,晶片的厚度對散熱貼片在平行晶片的長邊方向上產生的連續應力可藉由這些內凹部阻斷、減弱,進而避免散熱貼片在邊緣處產生皺摺或波浪紋等不符外觀規格的情形。因此,採用本發明的散熱貼片的薄膜覆晶封裝結構,則可具有較佳的產品可靠度及散熱效率。Based on the above, in the design of the heat sink of the present invention, at least one of the two side edges of the two long sides of the chip setting area of the heat sink has an inner recess, and the inner recess is formed in at least one of the heat sink layer and the insulating protective layer. When the heat sink is attached to the flexible circuit carrier, the continuous stress generated by the thickness of the chip on the heat sink in the direction parallel to the long side of the chip can be blocked and weakened by these inner recesses, thereby avoiding the heat sink from generating wrinkles or wavy lines at the edges that do not meet the appearance specifications. Therefore, the film flip chip packaging structure using the heat sink of the present invention can have better product reliability and heat dissipation efficiency.
為了讓本發明的上述特徵及優點能夠更明顯易懂,下文特舉實施例,並配合所附圖式詳細說明如下。In order to make the above features and advantages of the present invention more clearly understood, embodiments are specifically described below in detail with reference to the accompanying drawings.
參照本實施例之圖式以更全面地闡述本發明。然而,本發明亦可以各種不同的形式體現,而不應限於本文中所述之實施例。圖式中的層或區域的厚度、尺寸或大小會為了清楚起見而放大。The present invention is more fully described with reference to the drawings of the present embodiment. However, the present invention can also be embodied in various different forms and should not be limited to the embodiments described herein. The thickness, size or size of the layers or regions in the drawings may be exaggerated for clarity.
應說明的是,下述圖式的薄膜覆晶封裝結構係以捲帶傳輸的方式作業,儘管下述圖式的散熱貼片僅示意地繪示應用於形成薄膜覆晶封裝結構的捲帶上的一個封裝單元,然而,本發明不限於此,下述圖式的散熱貼片可以同時應用於捲帶上的多個封裝單元。It should be noted that the chip-on-film packaging structure shown in the following figure is operated in a reel-to-reel transmission manner. Although the heat sink in the following figure is only schematically shown as being applied to a packaging unit on the reel that forms the chip-on-film packaging structure, the present invention is not limited to this. The heat sink in the following figure can be applied to multiple packaging units on the reel at the same time.
圖1A是依照本發明的一實施例的一種薄膜覆晶封裝結構的俯視示意圖。圖1B是圖1A中的散熱貼片的立體示意圖。圖1C是圖1A的剖面示意圖。圖1A省略繪示部分構件,省略的部分可參考圖1C的剖視示意圖加以理解。FIG. 1A is a schematic top view of a thin film chip package structure according to an embodiment of the present invention. FIG. 1B is a schematic three-dimensional view of the heat sink in FIG. 1A. FIG. 1C is a schematic cross-sectional view of FIG. 1A. FIG. 1A omits some components, and the omitted parts can be understood by referring to the schematic cross-sectional view of FIG. 1C.
請先同時參考圖1A以及圖1C,在本實施例中,薄膜覆晶封裝結構100a包括一可撓性線路載板110、一晶片120以及一散熱貼片130a。可撓性線路載板110具有一表面112以及定義於表面112的一晶片設置區114。晶片設置區114具有相對的兩個長邊115與相對的兩個短邊117。晶片120配置於晶片設置區114內並與可撓性線路載板110電性連接。散熱貼片130a配置於可撓性線路載板110的表面112上。散熱貼片130a對應晶片設置區114並覆蓋晶片120。散熱貼片130a包括一散熱層132a以及一絕緣保護層134a。絕緣保護層134a設置於散熱層132a上。散熱貼片130a對應於兩個長邊115的兩個側邊S1、S2中的一個側邊S1具有內凹部C1,且內凹部C1形成於散熱層132a與絕緣保護層134a的至少其中一者。在本實施例中,內凹部C1是形成於絕緣保護層134a。此外,散熱貼片130a在一個側邊S1上的內凹部C1的數量為至少兩個,且分別對應於晶片設置區114的兩個短邊117。在本實施例中,在側邊S1的內凹部C1的數量為四個,且其中兩個內凹部C1分別對應於晶片設置區114的兩個短邊117。然而,本發明對於一個側邊上的內凹部的數量不加以限制。Please refer to FIG. 1A and FIG. 1C at the same time. In this embodiment, the thin film flip
詳細來說,晶片120可以是採用覆晶(flip-chip)的方式配置於晶片設置區114內並與可撓性線路載板110電性連接。於此,可撓性線路載板110可包括可撓性基板111、多個引腳113以及防焊層119。可撓性基板111的材質例如是聚醯亞胺(Polyimide, PI)、聚乙烯對苯二甲酸酯(polyethylene terephthalate, PET)、聚醚(polyethersulfone, PES)、碳酸脂(polycarbonate, PC)或其他適合的可撓性材料。多個引腳113設置於可撓性基板111的表面111a上。防焊層119設置於可撓性基板111的表面111a上,且位於晶片設置區114外並局部覆蓋多個引腳113,以避免多個引腳113產生氧化或受異物汙染而短路。被防焊層119裸露出的部分多個引腳113可用於與晶片120或外部元件的電性連接。防焊層119的材料例如是綠漆,於此並不加以限制。Specifically, the
在一實施例中,薄膜覆晶封裝結構100a還包括填充膠層140,其中填充膠層140可填充於可撓性基板111與晶片120之間,以防止水氣或異物侵入造成電性接點損壞或電性異常。填充膠層140例如是底部填充膠(underfill),但不以此為限。In one embodiment, the chip-on-
請同時參考圖1B以及圖1C,本實施例的散熱貼片130a配置於可撓性線路載板110的表面112上並對應晶片設置區114。於此,散熱貼片130a還包括一第一黏膠層136a以及一第二黏膠層138a。第一黏膠層136a設置於絕緣保護層134a與散熱層132a的第一表面131a之間,其中絕緣保護層134a透過第一黏膠層136a貼附於散熱層132a上。第二黏膠層138a設置於散熱層132a相對第一表面131a的第二表面133a上,其中散熱貼片130a可透過第二膠層138a貼附於可撓性線路載板110的表面112且覆蓋晶片120,以直接幫助晶片120散熱。Please refer to FIG. 1B and FIG. 1C , the
如圖1B及圖1C所示,絕緣保護層134a的尺寸大於散熱層132a的尺寸,且絕緣保護層134a完全覆蓋散熱層132a。也就是說,散熱層132a於可撓性線路載板110上的正投影會完全位於絕緣保護層134a於可撓性線路載板110上的正投影內,以達到對散熱層132a的保護效果。在本實施例中,第一黏膠層136a的尺寸與散熱層132a大致相同,因此,當散熱貼片130a配置於可撓性線路載板110上時,絕緣保護層134a的外緣超出散熱層132a的部分並無黏膠層貼附而自然垂墜或懸空。在此,散熱層132a的材質可包括金屬箔或石墨類薄膜,其中金屬箔例如是鋁箔或銅箔,但本發明不限於此。絕緣保護層134a的材質例如是聚醯亞胺(Polyimide, PI) 等可撓性材料,用以保護散熱層132a,避免散熱層132a刮傷受損,但本發明亦不限於此。As shown in FIG. 1B and FIG. 1C , the size of the insulating
請再參考圖1A,散熱貼片130a配置於可撓性線路載板110上的覆蓋範圍大於晶片設置區114且完全覆蓋晶片設置區114。以俯視觀之,於散熱貼片130a的側邊S1的多個內凹部C1的形狀例如是圓弧狀,但不以此為限。自具有內凹部C1的側邊S1至內凹部C1最遠離側邊S1的一點在垂直側邊S1的方向上的水平距離H例如是介於0.1毫米至5毫米。此外,內凹部C1在平行側邊S1上的距離L的總和不小於側邊S1的長度的1/6。Please refer to FIG. 1A again. The
由於本實施例的散熱貼片130a對應於晶片設置區114的一個長邊115的側邊S1具有內凹部C1,當散熱貼片130a貼附於可撓性線路載板110時,晶片120的厚度對散熱貼片130a在平行長邊115方向上產生的連續應力可藉由這些內凹部C1阻斷、減弱,進而避免散熱貼片130a在邊緣(即側邊S1)處產生皺摺或波浪紋的情形。因此,採用此散熱貼片130a的薄膜覆晶封裝結構100a,則可具有較佳的產品可靠度及散熱效率。Since the
在此必須說明的是,下述實施例沿用前述實施例的元件標號與部分內容,其中採用相同的標號來表示相同或近似的元件,並且省略了相同技術內容的說明。關於省略部分的說明可參考前述實施例,下述實施例不再重複贅述。It should be noted that the following embodiments use the component numbers and some contents of the previous embodiments, wherein the same number is used to represent the same or similar components, and the description of the same technical contents is omitted. The description of the omitted parts can refer to the previous embodiments, and the following embodiments will not be repeated.
圖2是依照本發明的另一實施例的一種散熱貼片的立體示意圖。請同時參考圖1B與圖2,本實施例的散熱貼片130b和上述的散熱貼片130a相似,兩者的差異在於:在本實施例中,散熱貼片130b的內凹部C2是形成於散熱層132b、第一黏膠層136b及第二黏膠層138b的組合上。意即,內凹部C2沒有形成在絕緣保護層134b上。FIG2 is a three-dimensional schematic diagram of a heat sink according to another embodiment of the present invention. Please refer to FIG1B and FIG2 simultaneously. The
圖3是依照本發明的另一實施例的一種散熱貼片的立體示意圖。請同時參考圖1B與圖3,本實施例的散熱貼片130c和上述的散熱貼片130a相似,兩者的差異在於:在本實施例中,散熱貼片130c的內凹部C3形成於散熱層132c、第一黏膠層136c、第二黏膠層138c以及絕緣保護層134c上。FIG3 is a three-dimensional schematic diagram of a heat sink according to another embodiment of the present invention. Please refer to FIG1B and FIG3 simultaneously. The
簡言之,散熱貼片130a的內凹部C1可形成於絕緣保護層134a;或者是,散熱貼片130b的內凹部C2可形成於散熱層132b、第一黏膠層136b及第二黏膠層138b的組合上;或者是,散熱貼片130c的內凹部C3可形成於散熱層132c、第一黏膠層136c、第二黏膠層138c以及絕緣保護層134c上。換言之,只要散熱貼片的內凹部形成於散熱層與絕緣保護層的至少其中一者,皆屬於本發明所欲保護的範圍。In short, the concave portion C1 of the
此外,上述以俯視觀之,內凹部C1的形狀為圓弧形,且僅形成在散熱貼片130a、130b、130c的一個側邊S1,但本發明並不以此為限。In addition, in the plan view, the inner concave portion C1 is in an arc shape and is only formed on one side S1 of the
圖4是依照本發明的另一實施例的一種散熱貼片的立體示意圖。請同時參考圖2與圖4,本實施例的散熱貼片130d和上述的散熱貼片130b相似,兩者的差異在於:在本實施例中,以俯視觀之,散熱貼片130d的內凹部C4的形狀例如是矩形。散熱貼片130d的內凹部C4是形成於散熱層132d、第一黏膠層136d及第二黏膠層138d的組合上。然而,在其他實施例中,內凹部C4也可以只形成在絕緣保護層134d或形成於散熱層132d、第一黏膠層136d、第二黏膠層138d以及絕緣保護層134d上。於另一實施例中,以俯視觀之,散熱貼片的內凹部的形狀例如是鋸齒狀或其他適當的形狀。FIG4 is a three-dimensional schematic diagram of a heat sink according to another embodiment of the present invention. Please refer to FIG2 and FIG4 simultaneously. The
圖5是依照本發明的另一實施例的一種薄膜覆晶封裝結構的俯視示意圖。請同時參考圖1A與圖5,本實施例的薄膜覆晶封裝結構100b和上述的薄膜覆晶封裝結構100a相似,兩者的差異在於:在本實施例中,以俯視觀之,散熱貼片130e的二個側邊S1、S2分別具有對應於晶片設置區114的長邊115設置的內凹部C5,其中內凹部C5的形狀例如是圓弧狀,但不以此為限。於另一實施例中,散熱貼片130e的二個側邊S1、S2的內凹部C5的數量可以不一致,但單一側邊S1、S2的內凹部C5的數量至少為一個,較佳地,為多個。在本實施例中,散熱貼片130e的二個側邊S1、S2的內凹部C5的位置為對稱設置。然而,於另一實施例中,散熱貼片130e的二個側邊S1、S2的內凹部C5的位置也可以不對稱。FIG5 is a schematic top view of a chip-on-film package structure according to another embodiment of the present invention. Please refer to FIG1A and FIG5 simultaneously. The chip-on-
綜上所述,在本發明的散熱貼片的設計中,散熱貼片對應於晶片設置區的兩個長邊的兩個側邊的至少其中一者具有內凹部,且內凹部形成於散熱層與絕緣保護層的至少其中一者。當散熱貼片貼附於可撓性線路載板時,晶片的厚度對散熱貼片在平行晶片的長邊方向上產生的連續應力可藉由這些內凹部阻斷、減弱,進而避免散熱貼片在邊緣處產生皺摺或波浪紋等不符外觀規格的情形。因此,採用本發明的散熱貼片的薄膜覆晶封裝結構,則可具有較佳的產品可靠度及散熱效率。In summary, in the design of the heat sink of the present invention, at least one of the two side edges of the two long sides of the chip placement area of the heat sink has an inner recess, and the inner recess is formed in at least one of the heat sink layer and the insulating protective layer. When the heat sink is attached to the flexible circuit carrier, the continuous stress generated by the thickness of the chip on the heat sink in the direction parallel to the long side of the chip can be blocked and weakened by these inner recesses, thereby avoiding the heat sink from generating wrinkles or wavy lines at the edges that do not meet the appearance specifications. Therefore, the film flip chip packaging structure using the heat sink of the present invention can have better product reliability and heat dissipation efficiency.
雖然本發明已以實施例揭露如上,然其並非用以限定本發明,任何所屬技術領域中具有通常知識者,在不脫離本發明的精神和範圍內,當可作些許的更動與潤飾,故本發明的保護範圍當視後附的申請專利範圍所界定者為準。Although the present invention has been disclosed as above by the embodiments, they are not intended to limit the present invention. Any person with ordinary knowledge in the relevant technical field can make some changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention shall be defined by the scope of the attached patent application.
100a、100b:薄膜覆晶封裝結構
110:可撓性線路載板
111:可撓性基板
111a:表面
112:表面
113:引腳
114:晶片設置區
115:長邊
117:短邊
119:防焊層
120:晶片
130a、130b、130c、130d、130e:散熱貼片
131a:第一表面
132a、132b、132c、132d:散熱層
133a:第二表面
134a、134b、134c、134d:絕緣保護層
136a、136b、136c、136d:第一黏膠層
138a、138b、138c、138d:第二黏膠層
140:填充膠層
C1、C2、C3、C4、C5:內凹部
H:水平距離
L:距離
S1、S2:側邊
100a, 100b: film flip chip package structure
110: flexible circuit carrier
111:
圖1A是依照本發明的一實施例的一種薄膜覆晶封裝結構的俯視示意圖。 圖1B是圖1A中的散熱貼片的立體示意圖。 圖1C是圖1A的剖面示意圖。 圖2是依照本發明的另一實施例的一種散熱貼片的立體示意圖。 圖3是依照本發明的另一實施例的一種散熱貼片的立體示意圖。 圖4是依照本發明的另一實施例的一種散熱貼片的立體示意圖。 圖5是依照本發明的另一實施例的一種薄膜覆晶封裝結構的俯視示意圖。 FIG. 1A is a schematic top view of a chip-on-film package structure according to an embodiment of the present invention. FIG. 1B is a schematic three-dimensional view of the heat sink in FIG. 1A. FIG. 1C is a schematic cross-sectional view of FIG. 1A. FIG. 2 is a schematic three-dimensional view of a heat sink according to another embodiment of the present invention. FIG. 3 is a schematic three-dimensional view of a heat sink according to another embodiment of the present invention. FIG. 4 is a schematic three-dimensional view of a heat sink according to another embodiment of the present invention. FIG. 5 is a schematic top view of a chip-on-film package structure according to another embodiment of the present invention.
100a:薄膜覆晶封裝結構 100a: Thin film chip packaging structure
110:可撓性線路載板 110: Flexible circuit board
112:表面 112: Surface
114:晶片設置區 114: Chip setting area
115:長邊 115: Long side
117:短邊 117: Short side
120:晶片 120: Chip
130a:散熱貼片 130a: Heat sink
132a:散熱層 132a: Heat dissipation layer
134a:絕緣保護層 134a: Insulation protective layer
140:填充膠層 140: Filling glue layer
C1:內凹部 C1: Concave part
H:水平距離 H: horizontal distance
L:距離 L: Distance
S1、S2:側邊 S1, S2: Side
Claims (12)
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW112117145A TWI854645B (en) | 2023-05-09 | 2023-05-09 | Heat dissipating sheet and chip on film package structure |
| CN202310873649.3A CN118943092A (en) | 2023-05-09 | 2023-07-17 | Heat sink and chip-on-film packaging structure |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW112117145A TWI854645B (en) | 2023-05-09 | 2023-05-09 | Heat dissipating sheet and chip on film package structure |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| TWI854645B true TWI854645B (en) | 2024-09-01 |
| TW202445792A TW202445792A (en) | 2024-11-16 |
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|---|---|---|---|
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Country Status (2)
| Country | Link |
|---|---|
| CN (1) | CN118943092A (en) |
| TW (1) | TWI854645B (en) |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20110143625A1 (en) * | 2007-07-20 | 2011-06-16 | Choi Kyoung-Sei | Tape for heat dissipating member, chip on film type semiconductor package including heat dissipating member, and electronic apparatus including the same |
| TWI776768B (en) * | 2022-01-12 | 2022-09-01 | 南茂科技股份有限公司 | Heat dissipating sheet and chip on film package structure |
-
2023
- 2023-05-09 TW TW112117145A patent/TWI854645B/en active
- 2023-07-17 CN CN202310873649.3A patent/CN118943092A/en active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20110143625A1 (en) * | 2007-07-20 | 2011-06-16 | Choi Kyoung-Sei | Tape for heat dissipating member, chip on film type semiconductor package including heat dissipating member, and electronic apparatus including the same |
| TWI776768B (en) * | 2022-01-12 | 2022-09-01 | 南茂科技股份有限公司 | Heat dissipating sheet and chip on film package structure |
Also Published As
| Publication number | Publication date |
|---|---|
| TW202445792A (en) | 2024-11-16 |
| CN118943092A (en) | 2024-11-12 |
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