TWI850859B - Chip on film package structure - Google Patents

Abstract

A chip on film package structure includes a flexible circuit substrate, a chip and a heat dissipation structure. The flexible circuit substrate includes a predetermined bending area and a chip bonding area on a first surface. The heat dissipation structure includes a lower structure and an upper structure. The heat dissipation structure corresponds to the chip bonding area. The lower structure includes a first lower adhesive layer. The upper structure includes a first upper insulating protection layer, an upper heat dissipation layer and a second upper insulating protection layer. The upper heat dissipation layer is located between the first upper insulating protection layer and the second upper insulating protection layer. The upper structure is attached to the lower structure by the first upper insulating protection layer. The orthographic projection area of the upper structure on the flexible circuit substrate is larger than and completely covers the orthographic projection area of the lower structure on the flexible circuit substrate. The orthographic projection of the lower structure on the flexible circuit substrate does not overlap with the predetermined bending area.

Description

Chip-on-film packaging structure

The present invention relates to a chip-on-film packaging structure.

Chip on Film (COF) packaging structure is a common packaging type for driver chips of liquid crystal displays. With the advancement of technology, the efficiency of chips has been continuously improved, and the number of chip bumps per unit area has been continuously increasing. However, this also causes the heat dissipated by the chip during operation to become more. Therefore, in order to prevent the performance of the chip from being reduced due to heat, many manufacturers are committed to developing heat dissipation technology for the COF packaging structure. Generally speaking, the larger the area of the heat dissipation structure on the COF packaging structure, the better the heat dissipation capacity of the heat dissipation structure.

The present invention provides a thin film chip package structure, which can improve the heat dissipation capacity by increasing the area of the heat dissipation structure.

At least one embodiment of the present invention provides a thin film chip-on-chip packaging structure. The thin film chip-on-chip packaging structure includes a flexible circuit substrate, a chip, and a heat dissipation structure. The flexible circuit substrate has a first surface and a second surface relative to each other, and includes a predetermined bending area and a chip bonding area located on the first surface. The chip bonding area and the predetermined bending area extend along a first direction. The chip is bonded to the chip bonding area of the flexible circuit substrate. The heat dissipation structure includes a lower structure and an upper structure. The heat dissipation structure is attached to at least one of the first surface and the second surface with the lower structure, and corresponds to the chip bonding area. The lower structure includes a first lower adhesive layer. The upper structure includes a first upper insulating protective layer, an upper heat dissipation layer, and a second upper insulating protective layer. The upper heat dissipation layer is located between the first upper insulation protection layer and the second upper insulation protection layer. The upper structure is attached to the lower structure by the first upper insulation protection layer. The orthographic projection area of the upper structure on the flexible circuit substrate is larger than and completely covers the orthographic projection area of the lower structure on the flexible circuit substrate. The orthographic projection of the lower structure on the flexible circuit substrate does not overlap the predetermined bending area.

Based on the above, the heat dissipation structure in the film flip chip packaging structure of the present invention can improve the heat dissipation capacity by increasing the area of the upper structure, effectively improving the overall heat dissipation efficiency of the film flip chip packaging structure, and because the orthographic projection of the lower structure on the flexible circuit substrate does not overlap with the predetermined bending area, the heat dissipation structure can be prevented from affecting the bending of the film flip chip packaging structure.

FIG. 1A is a top view of a chip-on-film package structure 10 according to an embodiment of the present invention. FIG. 1B is a cross-sectional view along line A-A' of FIG. 1A. Referring to FIG. 1A and FIG. 1B, the chip-on-film package structure 10 includes a flexible circuit substrate 100, a chip 200, and a heat dissipation structure HD1. In this embodiment, the chip-on-film package structure 10 further includes an underfill 210.

The flexible circuit substrate 100 includes a flexible dielectric substrate 110, a circuit layer 120 and a solder-proof layer 130. The material of the flexible dielectric substrate 110 includes, for example, polyethylene terephthalate (PET), polyimide (PI), polyethersulfone (PES), polycarbonate (PC) or other suitable flexible dielectric materials. The circuit layer 120 is located on the flexible dielectric substrate 110. The circuit layer 120 includes a plurality of pins, and its material includes copper, tinned copper or other metals. The solder-proof layer 130 is located on the circuit layer 120 and covers a portion of the circuit layer 120.

The flexible circuit substrate 100 has a first surface 100a and a second surface 100b relative to each other, and includes a predetermined bending area 104 and a chip bonding area 102 located on the first surface 100a. In the present embodiment, the chip bonding area 102 can be defined by an opening of the anti-soldering layer 130. The predetermined bending area 104 refers to the area where the thin film chip package structure 10 is expected to be bent after being bonded to other devices (such as a liquid crystal panel and/or a printed circuit board). In FIG. 1B, the predetermined bending area 104 is shown with a dotted line after being bent. In some embodiments, the chip bonding area 102 and the predetermined bending area 104 extend along a first direction D1.

The chip 200 is bonded to the chip bonding area 102 of the flexible circuit substrate 100. For example, the chip 200 is electrically bonded to the circuit layer 120 by the bumps 202 located on the active surface. In some embodiments, the chip 200 can be a driver chip or any other suitable chip. The bottom filler 210 is filled between the chip 200 and the flexible circuit substrate 100 and covers the periphery of the chip 200.

In some embodiments, the flexible circuit substrate 100 further includes a cutting line CT. In some embodiments, the flexible circuit substrate 100 is cut along the cutting line CT to remove the chip-on-film package structure 10. The cutting line CT defines the boundary of the chip-on-film package structure 10.

The heat dissipation structure HD1 includes a lower structure 300a and an upper structure 300b. The heat dissipation structure HD1 corresponds to the chip bonding area 102. The heat dissipation structure HD1 is attached to at least one of the first surface 100a and the second surface 100b with the lower structure 300a. In this embodiment, the heat dissipation structure HD1 is attached to the second surface 100b with the lower structure 300a. In some embodiments, the orthographic projection of the lower structure 300a of the heat dissipation structure HD1 on the flexible circuit substrate 100 overlaps the orthographic projection of the bottom filler 210 on the flexible circuit substrate 100. In some embodiments, the orthographic projection area of the lower structure 300a on the flexible circuit substrate 100 is larger than the orthographic projection area of the bottom filler 210 on the flexible circuit substrate 100.

In this embodiment, the lower structure 300a includes a first lower adhesive layer 310. The first lower adhesive layer 310 includes, for example, a polymer material. The orthographic projection of the lower structure 300a on the flexible circuit substrate 100 overlaps the chip bonding area 102 but does not overlap the predetermined bending area 104. Therefore, it is possible to avoid the thin film chip package structure 10 from being unable to bend smoothly in the predetermined bending area 104 due to the lower structure 300a being bonded to the predetermined bending area 104. In some embodiments, the area of the lower structure 300a is greater than or equal to the area of the chip bonding area 102.

The upper structure 300b includes a first upper insulating protective layer 320, an upper heat dissipation layer 340, and a second upper insulating protective layer 360. The upper structure 300b is attached to the lower structure 300a by the first upper insulating protective layer 320. In this embodiment, the first upper insulating protective layer 320 is attached to the first lower adhesive layer 310 and is attached to the second surface 100b through the first lower adhesive layer 310.

The upper heat dissipation layer 340 is located between the first upper insulating protection layer 320 and the second upper insulating protection layer 360. In some embodiments, the upper structure 300b may optionally further include a first upper adhesive layer 330 and a second upper adhesive layer 350, wherein the first upper adhesive layer 330 and the second upper adhesive layer 350 are respectively located between the first upper insulating protection layer 320 and the upper heat dissipation layer 340 and between the upper heat dissipation layer 340 and the second upper insulating protection layer 360. In some embodiments, the area of the upper heat dissipation layer 340 is smaller than the area of the first upper insulating protection layer 320 and the area of the second upper insulating protection layer 360, thereby preventing the upper heat dissipation layer 340 from being directly exposed to air due to exceeding the first upper insulating protection layer 320 and the second upper insulating protection layer 360 and causing problems such as oxidation and rust.

The material of the upper heat dissipation layer 340 may include metal foil or graphite film, wherein the metal foil is, for example, aluminum foil or copper foil, but the present invention is not limited thereto. The material of the first upper insulating protection layer 320 and the second upper insulating protection layer 360 is, for example, polyimide (PI), but the present invention is not limited thereto.

In this embodiment, the orthographic projection area of the upper structure 300b on the flexible circuit substrate 100 is larger than and completely covers the orthographic projection area of the lower structure 300a on the flexible circuit substrate 100. In some embodiments, the orthographic projection of the upper heat dissipation layer 340 of the upper structure 300b on the flexible circuit substrate 100 partially overlaps with the predetermined bending area 104. Since the predetermined bending area 104 is mostly located on one or both sides of the thin film flip chip package structure 10 far away from the chip bonding area 102, the upper structure 300b is enlarged to partially overlap with the predetermined bending area 104, so as to increase the heat dissipation area of the upper heat dissipation layer 340, thereby improving the heat dissipation effect of the heat dissipation structure HD1.

In some embodiments, at the position overlapping the lower structure 300a, the minimum vertical distance H from the upper heat dissipation layer 340 to the flexible circuit substrate 100 is not less than 80 microns. For example, in this embodiment, the minimum vertical distance H is equal to the total thickness of the first lower adhesive layer 310, the first upper insulating protection layer 320, and the first upper adhesive layer 330, and the total thickness of the first lower adhesive layer 310, the first upper insulating protection layer 320, and the first upper adhesive layer 330 is greater than or equal to 80 microns. Based on the above, by increasing the thickness of the lower structure 300a that does not overlap the predetermined bending area 104 and the first upper insulating protection layer 320, even if the size of the upper structure 300b is increased to overlap with the predetermined bending area 104, the interference of the upper heat dissipation layer 340 with the predetermined bending area 104 can still be reduced, thereby reducing the impact of the heat dissipation structure HD1 on the process of the bent film flip chip packaging structure 10.

In this embodiment, the orthographic projection of the upper structure 300b of the heat dissipation structure HD1 on the flexible circuit substrate 100 is located within the cutting line CT. In some embodiments, the orthographic projections of the boundaries B1 and B2 of the upper structure 300b parallel to the first direction D1 on the flexible circuit substrate 100 are located between the cutting line CT and the predetermined bending area 104, but the present invention is not limited thereto. In other embodiments, the boundaries B1 and B2 may be located within the predetermined bending area 104. Since the orthographic projection of the larger upper structure 300b in the heat dissipation structure HD1 on the flexible circuit substrate 100 is located within the cutting line CT, when the single-piece thin film flip chip package structure 10 is cut along the cutting line CT, the tool will not pass through any layer of the heat dissipation structure HD1, thereby avoiding problems such as adhesive layer residues remaining on the tool, resulting in shortened tool life or residual glue contamination.

FIG2 is a cross-sectional schematic diagram of a thin film chip package structure 20 according to an embodiment of the present invention. It must be noted that the embodiment of FIG2 uses the component numbers and partial contents of the embodiments of FIG1A and FIG1B, wherein the same or similar numbers are used to represent the same or similar components, and the description of the same technical contents is omitted. The description of the omitted parts can be referred to the aforementioned embodiments, and will not be repeated here.

The main difference between the thin film chip package structure 20 of FIG. 2 and the thin film chip package structure 10 of FIG. 1A and FIG. 1B is that the thin film chip package structure 20 further includes a heat dissipation structure HD2 attached to the first surface 100a of the flexible circuit substrate 100. In this embodiment, the heat dissipation structure HD2 adopts the same structure as the heat dissipation structure HD1. Therefore, for a detailed description of the heat dissipation structure HD2, please refer to the embodiment of FIG. 1A and FIG. 1B, which will not be repeated here. The heat dissipation structure HD2 located on the first surface 100a is attached to the first surface 100a with the lower structure 300a, and corresponds to the chip bonding area 102. More specifically, in this embodiment, the first lower adhesive layer 310 of the lower structure 300a of the heat dissipation structure HD2 is conformably attached to the chip 200 and the bottom filler 210 covering the periphery of the chip 200. In other words, the orthographic projection of the lower structure 300a of the heat dissipation structure HD2 on the flexible circuit substrate 100 completely covers the orthographic projection of the bottom filler 210 on the flexible circuit substrate 100. In some embodiments, the orthographic projection area of the lower structure 300a of the heat dissipation structure HD2 on the flexible circuit substrate 100 is larger than the orthographic projection area of the bottom filler 210 on the flexible circuit substrate 100. Compared to the chip-on-film package structure 10 of FIG. 1A and FIG. 1B , the chip-on-film package structure 20 of the present embodiment also has a heat dissipation structure HD2 disposed on the first surface 100a. By directly contacting the heat source (i.e., the chip 200) with the heat dissipation structure HD2, the heat energy generated during the operation of the chip 200 can be more efficiently dissipated, thereby helping to improve the overall heat dissipation efficiency of the chip-on-film package structure 20.

In this embodiment, the orthographic projection area of the upper structure 300b of the heat dissipation structure HD2 on the flexible circuit substrate 100 is larger than and completely covers the orthographic projection area of the lower structure 300a on the flexible circuit substrate 100. The orthographic projection of the lower structure 300a of the heat dissipation structure HD2 on the flexible circuit substrate 100 does not overlap with the predetermined bending area 104. In this embodiment, the orthographic projection of the upper heat dissipation layer 340 of the upper structure 300b of the heat dissipation structure HD2 on the flexible circuit substrate 100 partially overlaps with the predetermined bending area 104. However, in some embodiments, the orthographic projection of the upper structure 300b of the heat dissipation structure HD2 on the flexible circuit substrate 100 may not overlap the predetermined bending area 104, and the present invention does not limit whether the upper structure 300b overlaps the predetermined bending area 104. By increasing the area of the upper structure 300b, the heat dissipation effect of the heat dissipation structure HD2 can be improved. In addition, the thickness of the lower structure 300a that does not overlap the predetermined bending area 104 and the first upper insulating protection layer 320 are increased, so that the interference of the upper heat dissipation layer 340 with the predetermined bending area 104 is reduced, thereby reducing the influence of the heat dissipation structure HD2 on the process of the curved thin film chip package structure 20.

In the present embodiment, the orthographic projection of the upper structure 300b of the heat dissipation structure HD2 on the flexible circuit substrate 100 is located within the cutting line CT. In some embodiments, the orthographic projection of the boundary of the upper structure 300b parallel to the first direction on the flexible circuit substrate 100 is located between the cutting line CT and the predetermined bending area 104. In other embodiments, the boundary of the upper structure 300b parallel to the first direction D1 (please refer to FIG. 1A ) may be located within the predetermined bending area 104. Thus, when the singulated thin film flip chip package structure 20 is cut along the cutting line CT, the tool will not pass through any layer of the heat dissipation structure HD2, thereby avoiding problems such as adhesive layer residues remaining on the tool, resulting in a shortened tool life or residual glue contamination.

FIG3 is a cross-sectional schematic diagram of a thin film chip package structure 30 according to an embodiment of the present invention. It must be noted that the embodiment of FIG3 uses the component numbers and partial contents of the embodiments of FIG1A and FIG1B, wherein the same or similar numbers are used to represent the same or similar components, and the description of the same technical contents is omitted. The description of the omitted parts can refer to the aforementioned embodiments, and will not be repeated here.

The main difference between the COF package structure 30 of FIG. 3 and the COF package structure 10 of FIGS. 1A and 1B is that the lower structure 300a′ of the heat dissipation structure HD3 of the COF package structure 30 further includes a second lower adhesive layer 370 and a lower heat dissipation layer 380.

3 , the lower heat dissipation layer 380 is located between the first lower adhesive layer 310 and the second lower adhesive layer 370, and the first upper insulating protection layer 320 of the upper structure 300b is attached to the second lower adhesive layer 370. In some embodiments, the material of the lower heat dissipation layer 380 may include metal foil or graphite film, wherein the metal foil is, for example, aluminum foil or copper foil.

In this embodiment, the orthographic projection area of the upper structure 300b on the flexible circuit substrate 100 is larger than and completely covers the orthographic projection area of the lower structure 300a′ on the flexible circuit substrate 100. More specifically, the orthographic projection area of the upper heat dissipation layer 340 on the flexible circuit substrate 100 is larger than and completely covers the orthographic projection area of the lower heat dissipation layer 380 on the flexible circuit substrate 100. In this embodiment, the orthographic projection of the lower structure 300a′ on the flexible circuit substrate 100 does not overlap the predetermined bending area 104. Therefore, it is possible to avoid the problem that the chip-on-film package structure 30 cannot be bent smoothly in the predetermined bending area 104 due to the lower structure 300a' being adhered to the predetermined bending area 104. In some embodiments, the orthographic projection of the upper heat dissipation layer 340 of the upper structure 300b on the flexible circuit substrate 100 partially overlaps the predetermined bending area 104, thereby increasing the heat dissipation area of the upper heat dissipation layer 340, thereby improving the heat dissipation effect of the heat dissipation structure HD3.

In some embodiments, at the position overlapping the lower structure 300a', the minimum vertical distance H from the upper heat dissipation layer 340 to the flexible circuit substrate 100 is not less than 80 microns. For example, in this embodiment, the minimum vertical distance H is equal to the total thickness of the first lower adhesive layer 310, the second lower adhesive layer 370, the lower heat dissipation layer 380, the first upper insulating protection layer 320 and the first upper adhesive layer 330, and the total thickness is greater than or equal to 80 microns. Based on the above, by increasing the thickness of the lower structure 300a' which does not overlap the predetermined bending area 104 and the first upper insulating protection layer 320, even if the size of the upper structure 300b is increased to overlap with the predetermined bending area 104, the interference of the upper heat dissipation layer 340 with the predetermined bending area 104 can still be reduced, thereby reducing the impact of the heat dissipation structure HD3 on the process of the curved thin film chip packaging structure 30.

Compared with the chip-on-film package structure 10 of FIG. 1A and FIG. 1B , the heat dissipation capacity of the heat dissipation structure HD3 in the chip-on-film package structure 30 of the present embodiment can be further enhanced because the lower structure 300a′ is also provided with a lower heat dissipation layer 380 , which helps to improve the overall heat dissipation efficiency of the chip-on-film package structure 30 .

FIG4 is a cross-sectional schematic diagram of a thin film chip package structure 40 according to an embodiment of the present invention. It must be noted that the embodiment of FIG4 uses the component numbers and partial contents of the embodiments of FIG2 and FIG3, wherein the same or similar numbers are used to represent the same or similar components, and the description of the same technical contents is omitted. The description of the omitted parts can be referred to the aforementioned embodiments, and will not be repeated here.

The main difference between the COF package structure 40 of FIG. 4 and the COF package structure 30 of FIG. 3 is that the COF package structure 40 further includes a heat dissipation structure HD4 attached to the first surface 100a of the flexible circuit substrate 100. In this embodiment, the heat dissipation structure HD4 adopts the same structure as the heat dissipation structure HD3. Therefore, please refer to the embodiment of FIG. 3 for a detailed description of the heat dissipation structure HD4, which will not be repeated here.

Referring to FIG. 4 , in the present embodiment, the heat dissipation structure HD4 is attached to the first surface 100a with the lower structure 300a′, and corresponds to the chip bonding area 102. More specifically, the lower structure 300a′ of the heat dissipation structure HD4 is attached to the chip 200 and the bottom filler 210 covering the periphery of the chip 200. In other words, the orthographic projection of the lower structure 300a′ of the heat dissipation structure HD4 on the flexible circuit substrate 100 completely covers the orthographic projection of the bottom filler 210 on the flexible circuit substrate 100. In some embodiments, the orthographic projection area of the lower structure 300a′ of the heat dissipation structure HD4 on the flexible circuit substrate 100 is larger than the orthographic projection area of the bottom filler 210 on the flexible circuit substrate 100. In addition, in this embodiment, the orthographic projection of the lower structure 300a' of the heat dissipation structure HD4 on the flexible circuit substrate 100 does not overlap the predetermined bending area 104. Therefore, it can be avoided that the thin film flip chip package structure 40 cannot be smoothly bent in the predetermined bending area 104 due to the lower structure 300a' being adhered to the predetermined bending area 104.

Compared to the chip-on-film package structure 30 of FIG. 3 , the chip-on-film package structure 40 of the present embodiment also has a heat dissipation structure HD4 disposed on the first surface 100a. By directly contacting the heat source (i.e., the chip 200) with the heat dissipation structure HD4, the heat energy generated during the operation of the chip 200 can be more efficiently dissipated, thereby helping to improve the overall heat dissipation efficiency of the chip-on-film package structure 40.

In summary, the heat dissipation structure in the film flip chip packaging structure of the present invention can improve the heat dissipation capacity by increasing the area of the upper structure, effectively improving the overall heat dissipation efficiency of the film flip chip packaging structure, and because the orthographic projection of the lower structure on the flexible circuit substrate does not overlap with the predetermined bending area, the heat dissipation structure can be prevented from affecting the bending of the film flip chip packaging structure.

10, 20, 30, 40: Chip-on-film package structure 100: Flexible circuit substrate 100a: First surface 100b: Second surface 102: Chip bonding area 104: Predetermined bending area 110: Flexible dielectric substrate 120: Circuit layer 130: Anti-soldering layer 200: Chip 202: Bump 210: Bottom filling glue 300a, 300a’: Lower structure 300b: Upper structure 310: First lower adhesive layer 320: First upper insulating protection layer 330: First upper adhesive layer 340: Upper heat sink layer 350: Second upper adhesive layer 360: Second upper insulation protection layer 370: Second lower adhesive layer 380: Lower heat dissipation layer B1, B2: Boundary CT: Cutting line D1: First direction H: Minimum vertical distance HD1, HD2, HD3, HD4: Heat dissipation structure

FIG. 1A is a schematic top view of a thin film chip-on-chip packaging structure according to an embodiment of the present invention. FIG. 1B is a schematic cross-sectional view along line A-A’ of FIG. 1A. FIG. 2 is a schematic cross-sectional view of a thin film chip-on-chip packaging structure according to an embodiment of the present invention. FIG. 3 is a schematic cross-sectional view of a thin film chip-on-chip packaging structure according to an embodiment of the present invention. FIG. 4 is a schematic cross-sectional view of a thin film chip-on-chip packaging structure according to an embodiment of the present invention.

10: Film chip package structure 100: Flexible circuit substrate 100a: First surface 100b: Second surface 102: Chip bonding area 104: Predetermined bending area 110: Flexible dielectric substrate 120: Circuit layer 130: Anti-soldering layer 200: Chip 202: Bump 210: Bottom filling glue 300a: Lower structure 300b: Upper structure 310: First lower adhesive layer 320: First upper insulating protective layer 330: First upper adhesive layer 340: Upper heat dissipation layer 350: Second upper adhesive layer 360: Second upper insulating protective layer B1: Boundary CT: Cutting line H: Minimum vertical distance HD1: Heat dissipation structure

Claims (10)

A film flip chip packaging structure includes: a flexible circuit substrate having a first surface and a second surface opposite to each other, and including a predetermined bending area and a chip bonding area located on the first surface, wherein the chip bonding area and the predetermined bending area extend along a first direction; a chip bonded to the chip bonding area of the flexible circuit substrate; and a heat dissipation structure including a lower structure and an upper structure, wherein the heat dissipation structure is attached to at least one of the first surface and the second surface with the lower structure and corresponds to the chip bonding area, wherein the lower structure includes a first lower adhesive layer, and the upper structure includes a first upper insulating protective layer, an upper heat dissipation layer and a second upper insulating protective layer, wherein the upper heat dissipation layer is located between the first upper insulating protective layer and the upper heat dissipation layer. The upper structure is attached to the lower structure by the first upper insulating protective layer, wherein the orthographic projection area of the upper structure on the flexible circuit substrate is larger than and completely covers the orthographic projection area of the lower structure on the flexible circuit substrate, and the orthographic projection of the lower structure on the flexible circuit substrate does not overlap the predetermined bending area. The chip-on-film package structure as described in claim 1, wherein at a position overlapping the lower structure, a minimum vertical distance from the upper heat sink to the flexible circuit substrate is not less than 80 microns. A chip-on-film package structure as described in claim 1, wherein the orthographic projection of the upper heat sink on the flexible circuit substrate partially overlaps the predetermined bending area. The chip-on-film package structure as described in claim 1, wherein the flexible circuit substrate further includes a cutting line, and the orthographic projection of the upper structure of the heat dissipation structure on the flexible circuit substrate is located within the cutting line. A chip-on-film package structure as described in claim 4, wherein the orthographic projection of the boundary of the upper structure parallel to the first direction on the flexible circuit substrate is located between the cutting line and the predetermined bending area. In the chip-on-film packaging structure as described in claim 1, the upper structure of the heat dissipation structure further includes a first upper adhesive layer and a second upper adhesive layer, which are respectively located between the first upper insulating protection layer and the upper heat dissipation layer and between the upper heat dissipation layer and the second upper insulating protection layer. A chip-on-film packaging structure as described in claim 1, wherein the lower structure of the heat dissipation structure further includes a second lower adhesive layer and a lower heat dissipation layer, wherein the lower heat dissipation layer is located between the first lower adhesive layer and the second lower adhesive layer, and the first upper insulating protection layer of the upper structure is attached to the second lower adhesive layer. In the chip-on-film package structure as described in claim 7, the orthographic projection area of the upper heat dissipation layer on the flexible circuit substrate is larger than and completely covers the orthographic projection area of the lower heat dissipation layer on the flexible circuit substrate. The thin film chip packaging structure as described in claim 1 further includes a bottom filling glue, which is filled between the chip and the flexible circuit substrate and covers the four sides of the chip, wherein the orthographic projection of the lower structure of the heat dissipation structure on the flexible circuit substrate completely covers the orthographic projection of the bottom filling glue on the flexible circuit substrate. A chip-on-film package structure as described in claim 9, wherein the orthographic projection area of the lower structure on the flexible circuit substrate is larger than the orthographic projection area of the bottom filling glue on the flexible circuit substrate.

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