TWI761060B - Chip on film package structure - Google Patents

Abstract

A chip on film package structure including a flexible substrate, a chip, an underfill and a heat dissipating tape is provided. The flexible substrate has a first surface and a second surface opposite to each other and a punching range defined. The first surface includes a chip bonding area and a potting area located inside the punching range, and the chip bonding area is located inside the potting area. The chip is disposed in the chip bonding area. The underfill is disposed in the potting area and at least fills the space in between the chip and the flexible substrate. The heat dissipating tape is disposed on at least one of the first surface and the second surface. The heat dissipating tape includes a first adhesive layer, a heat dissipation layer and a protective layer. The protective layer covers the heat dissipation layer. The first adhesive layer is located between the heat dissipation layer and the flexible substrate. An orthographic projection of the first adhesive layer on the flexible substrate covers the potting area and is located within the punching range.

Description

Chip-on-Film Package Structure

The present invention relates to a package structure, and more particularly, to a chip on film package structure.

In the current Chip on Film (COF), in order to improve the heat dissipation effect, a heat dissipation patch is attached to the surface of the package structure, and in order to increase the heat dissipation area to achieve a better heat dissipation effect, the heat dissipation patch The size of the heat-dissipating metal layer and the underlying glue below it is usually as large as possible (much larger than the die and the potting area). Further, when the chip is judged to be a defective product and the defective chip needs to be removed from the chip-on-film packaging structure by the drawing mechanism, the punching range of the drawing mechanism is usually only performed for the size of the chip and the scope of the dispensing area. design, so the punching range is often smaller than the size of the adhesive at the bottom of the heat-dissipating patch. As a result, when the drawing mechanism is pulling, the tool will pass through the adhesive at the bottom of the heat-dissipating patch, resulting in residual adhesive on the tool. This affects the performance of the tool and shortens its service life, and the remaining bottom adhesive on the film-on-chip package after being pulled out may also overflow and contaminate the good product when the whole roll of the film-on-chip package structure is rolled and pressed. At present, in order to reduce the occurrence of the above-mentioned situation, it is often necessary to remove the heat sink first and then perform the pulling action, which increases the complexity and time of the manufacturing process.

The present invention provides a film-on-chip packaging structure, which can simplify the manufacturing process and reduce the probability of glue spillage contamination during subsequent winding of the entire roll of the film-on-chip packaging structure.

A film-on-chip package structure of the present invention includes a flexible substrate, a chip, an underfill material and a heat dissipation patch. The flexible substrate has opposite first and second surfaces and defines a die cut range. The first surface includes a die bonding area and a glue dispensing area within the punching range, and the wafer bonding area is located in the glue dispensing area. The wafer is disposed in the wafer bonding area. The bottom filling material is arranged in the glue dispensing area and is filled at least between the wafer and the flexible substrate. The heat dissipation patch is disposed on at least one of the first surface and the second surface. The heat dissipation patch includes a first adhesive layer, a heat dissipation layer and a protection layer. The protective layer covers the heat dissipation layer. The first adhesive layer is located between the heat dissipation layer and the flexible substrate. The orthographic projection of the first adhesive layer on the flexible substrate covers the dispensing area and is located within the punching range.

In an embodiment of the present invention, the orthographic projection range of the first adhesive layer on the flexible substrate is not smaller than the dispensing area.

In an embodiment of the present invention, the orthographic projection range of the heat dissipation layer on the flexible substrate is larger than the punching range.

In an embodiment of the present invention, the size of the protective layer is larger than that of the heat dissipation layer, and the protective layer completely covers the heat dissipation layer.

In an embodiment of the present invention, the above-mentioned heat dissipation patch further includes a second adhesive layer, and the second adhesive layer is located between the protective layer and the heat dissipation layer.

In an embodiment of the present invention, the orthographic projection of the second adhesive layer on the flexible substrate is within the punching range.

In an embodiment of the present invention, the thickness of the second adhesive layer is not greater than 1/2 of the thickness of the first adhesive layer.

In an embodiment of the present invention, the above-mentioned heat dissipation patch is disposed on the first surface, and the first adhesive layer covers at least the backside of the chip and the underfill material.

In an embodiment of the present invention, the protective layer and the heat dissipation layer have the same size and completely cover the heat dissipation layer.

In an embodiment of the present invention, the above-mentioned protective layer is formed on the heat dissipation layer by coating.

Based on the above, the first adhesive layer in the heat dissipation patch to attach the heat dissipation layer to the flexible substrate is designed to cover the dispensing area of the flexible substrate by an orthographic projection on the flexible substrate and is located in the flexible substrate. In this way, the first adhesive layer of the heat dissipation patch can be shrunk within the punching range, so that the tool of the drawing mechanism will not pass through the first adhesive layer when drawing, avoiding The first adhesive layer remains on the cutter and avoids the problem that the remaining first adhesive layer after being pulled out will overflow and contaminate good products when the whole roll of the film-on-chip packaging structure is rolled and pressed. Therefore, the film-on-chip packaging structure of the present invention It can simplify the manufacturing process (no need to perform the action of removing the heat dissipation patch separately), and at the same time reduce the probability of adhesive overflow on the tool and the occurrence of adhesive overflow contamination during the subsequent winding of the entire film-on-chip packaging structure.

In order to make the above-mentioned features and advantages of the present invention more obvious and easy to understand, the following embodiments are given and described in detail with the accompanying drawings as follows.

The present invention is more fully described with reference to the drawings of this embodiment. However, the present invention may be embodied in various forms and should not be limited to the embodiments described herein. The thickness, size or size of layers or regions in the drawings may be exaggerated for clarity.

It should be noted that the chip-on-film packaging structure in the following figures is operated in a tape-and-reel mode, although the heat sink in the figures below is only schematically shown applied to the tape and tape forming the chip-on-film packaging structure. However, the present invention is not limited to this, and the heat dissipation patches of the following figures can be applied to a plurality of device areas on the tape at the same time.

1A and FIG. 1B are partial cross-sectional schematic views of a chip-on-film package structure before and after a patch according to an embodiment of the present invention. FIG. 1C is a schematic top view of the chip-on-film packaging structure of FIG. 1B in a tape-and-reel state. Please refer to FIG. 1A to FIG. 1C at the same time, in this embodiment, the chip on film package structure 100 includes a flexible substrate 110 , a chip 120 and an underfill 130 , wherein the flexible substrate 110 has an opposite first The surface 110a and the second surface 110b also define a punching range P. Further, the first surface 110a includes a die bonding area 122 and a glue dispensing area 132 located within the punching range P, the die bonding area 122 is located in the glue dispensing area 132, wherein the wafer 120 is disposed in the die bonding area 122, and the underfill is The material 130 is disposed in the dispensing area 132 and is at least filled between the wafer 120 and the flexible substrate 110 . More specifically, in this embodiment, the chip on film package structure 100 further includes a plurality of pins 112 and a solder mask layer 114 , wherein the pins 112 are disposed on the flexible substrate 110 and the solder mask layer 114 partially covers pin 112 and expose die bonding area 122 . In addition, the chip 120 is electrically connected to the pins 112 through the plurality of bumps 124 , in other words, the chip 120 is flip-chip bonded to the pins 112 . Here, the material of the flexible substrate 110 is, for example, polyethylene terephthalate (PET), polyimide (PI), polyethersulfone (PES), carbonate (polycarbonate, PC) or other suitable flexible material, and wafer 120 may be a drive wafer or any suitable wafer.

Furthermore, the chip on film package structure 100 further includes a heat sink 140 disposed on at least one of the first surface 110a and the second surface 110b. In this embodiment, the heat dissipation patch 140 is disposed on the first surface 110 a of the flexible substrate 110 . The heat dissipation patch 140 includes a first adhesive layer 142 , a heat dissipation layer 144 and a protective layer 148 , wherein the protective layer 148 covers the heat dissipation layer 144 , and the first adhesive layer 142 is located between the heat dissipation layer 144 and the flexible substrate 110 to separate the heat dissipation layer 144 is attached to the flexible substrate 110 . In addition, when the heat dissipation patch 140 is correspondingly disposed on the first surface 110a, the orthographic projection of the first adhesive layer 142 on the flexible substrate 110 covers the dispensing area 132 of the flexible substrate 110 and is located within the punching range P , in this way, the first adhesive layer 142 of the heat dissipation patch 140 can be retracted by a distance d1 from the boundary of the punching range P, so that the tool 10 of the drawing mechanism (not shown) will not pass through when drawing The first adhesive layer 142 of the heat dissipation patch 140 prevents the first adhesive layer 142 from remaining on the cutter 10 and the remaining first adhesive layer 142 after being pulled out when the whole roll of the film-on-chip packaging structure 100 is rolled and pressed Therefore, the chip-on-film packaging structure 100 of this embodiment can simplify the manufacturing process (without the need to remove the heat dissipation patch), and at the same time reduce the residual adhesive on the tool and the subsequent film coating of the whole roll. The probability of the occurrence of problems such as glue overflow pollution when the chip package structure is wound. Here, the material of the heat dissipation layer 144 may include metal foil or graphite film, wherein the metal foil is, for example, aluminum foil or copper foil, but the invention is not limited thereto. The material of the protective layer 148 is, for example, polyimide (PI), but the present invention is not limited thereto.

Further, FIG. 1A is a stage before disposing the heat dissipation patch 140 on the first surface 110a, and FIG. 1B is a stage after disposing the heat dissipation patch 140 on the first surface 110a. In this embodiment, as shown in FIG. 1A and FIG. 1B , the heat dissipation patch 140 may be positioned on the first surface 110 a first, so that the first adhesive layer 142 at least covers the back surface 120 b of the chip 120 and the underfill material 130 . Next, the heat dissipation patch 140 is adhered to the first surface 110a through the first adhesive layer 142 by rolling by means such as a roller (not shown). It should be noted that, although the heat dissipation patch 140 is only disposed on the first surface 110a in this embodiment, the present invention does not limit the surface to which the heat dissipation patch 140 is attached, nor does it limit the number of surfaces to which it is attached, as long as The heat dissipation patch 140 disposed on at least one of the first surface 110a and the second surface 110b belongs to the protection scope of the present invention. Therefore, in other embodiments, the heat dissipation patch 140 may be disposed only on the second surface 110b or It is disposed on the first surface 110a and the second surface 110b at the same time.

In some embodiments, the orthographic projection range of the first adhesive layer 142 on the flexible substrate 110 is not smaller than the dispensing area 132 , in other words, the first adhesive layer 142 completely covers the dispensing area 132 to achieve a better adhesive effect, but the present invention is not limited to this. As shown in FIG. 1B , in this embodiment, the orthographic projection range of the first adhesive layer 142 on the flexible substrate 110 is approximately equal to the range of the dispensing area 132 , that is, the first adhesive layer 142 just covers the dispensing area 132 .

In addition, in this embodiment, the orthographic projection range of the heat dissipation layer 144 on the flexible substrate 110 may be larger than the punching range P. In other words, the edge of the heat dissipation layer 144 may exceed the punching range P. The larger heat dissipation area can improve the heat dissipation effect, but the present invention is not limited to this.

Furthermore, in this embodiment, the size of the protective layer 148 is larger than the size of the heat dissipation layer 144 , and the protective layer 148 completely covers the heat dissipation layer 144 . In other words, the orthographic projection of the heat dissipation layer 144 on the flexible substrate 110 is completely It is located in the orthographic projection of the protective layer 148 on the flexible substrate 110 to achieve a protective effect on the heat dissipation layer 144 , but the invention is not limited thereto.

In this embodiment, the heat dissipation patch 140 further includes a second adhesive layer 146 located between the protection layer 148 and the heat dissipation layer 144 , so as to adhere the protection layer 148 to the heat dissipation layer 144 . In addition, in this embodiment, the thickness of the second adhesive layer 146 is not greater than the thickness of the first adhesive layer 142 , for example, the thickness of the second adhesive layer 146 is not greater than 1/2 of the thickness of the first adhesive layer 142 . Since the thickness of the second adhesive layer 146 is much thinner than that of the first adhesive layer 142 , when the heat dissipation patch 140 is pulled out, the second adhesive layer 146 has a relatively low impact on the problem of tool adhesive residue and adhesive overflow. Therefore, in this embodiment, the size of the second adhesive layer 146 can be approximately equal to the size of the heat dissipation layer 144 and located within the range of the heat dissipation layer 144, so that the maximum bonding area between the heat dissipation layer 144 and the protective layer 148 is achieved. to enhance the bonding effect between the two. In other words, the orthographic projection of the second adhesive layer 146 on the flexible substrate 110 is larger than the punching range P, but the invention is not limited thereto.

It must be noted here that the following embodiments use the element numbers and parts of the above-mentioned embodiments, wherein the same or similar numbers are used to represent the same or similar elements, and the description of the same technical content is omitted, and the description of the omitted part is omitted. Reference may be made to the foregoing embodiments, and detailed descriptions in the following embodiments will not be repeated.

FIG. 1D is a partial cross-sectional schematic diagram of a chip on film package structure according to another embodiment of the present invention. Referring to FIG. 1D , the chip on film package structure 100 a of the present embodiment is similar to the chip on film package structure 100 in the above-mentioned embodiment, and the difference is that the heat sink 140 is disposed on the second surface 110 b. In more detail, the heat dissipation patch 140 is attached to the second surface 110b corresponding to the position of the chip 120 , and the orthographic projection of the first adhesive layer 142 on the flexible substrate 110 also covers the dispensing area 132 and is located in the punching area 132 . within the cut range P.

FIG. 1E is a partial cross-sectional schematic diagram of a chip on film package structure according to yet another embodiment of the present invention. Referring to FIG. 1E , the chip on film package structure 100 b of this embodiment is similar to the chip on film package structure 100 in the above-mentioned embodiment, and the difference is that the heat dissipation patch 140 is disposed on the first surface 110 a and the second surface 110 b at the same time , but the present invention is not limited to this. By disposing the heat dissipation patch 140 on the first surface 110a and the second surface 110b of the flexible substrate 110 corresponding to the positions of the chip 120 at the same time, the heat dissipation efficiency of the chip on film package structure 100b can be improved, and the thermal effect on the chip on film package structure can be reduced. 100b adverse effects, thereby improving product reliability.

FIG. 2 is a partial cross-sectional schematic diagram of a chip-on-film package structure according to still another embodiment of the present invention. Referring to FIG. 2 , the chip on film package structure 200 of the present embodiment is similar to the chip on film package structure 100 in the above-mentioned embodiment, and the difference lies in: the second adhesive layer 246 of the heat dissipation patch 240 of the chip on film package structure 200 The orthographic projection on the flexible substrate 110 is located within the punching range P, so that the second adhesive layer 246 of the heat dissipation patch 240 can be retracted by a distance d2 from the boundary of the punching range P, so that the drawing mechanism The cutter 10 will not pass through the second adhesive layer 246 of the heat dissipation patch 240 when pulling out, so as to prevent the second adhesive layer 246 from remaining on the cutter and to prevent the remaining second adhesive layer 246 from remaining on the entire roll of film after being pulled out. When the flip chip package structure 200 is rolled and pressurized, the glue overflows and contaminates the good products. Therefore, the film flip chip package structure 200 of this embodiment can further reduce the residual glue on the tool and the subsequent winding of the film flip chip package structure. The probability of occurrence of the problem of time overflow glue contamination, but the present invention is not limited to this. In this embodiment, although the heat dissipation patch 240 is only disposed on the first surface 110a, the present invention is not limited thereto. In other embodiments not shown, the heat dissipation patch 240 may be only disposed on the first surface 110a as shown in FIG. 1D It is disposed on the second surface 110b or simultaneously on the first surface 110a and the second surface 110b as shown in FIG. 1E .

In this embodiment, the size of the second adhesive layer 246 may be approximately the same as the size of the first adhesive layer 142, but the invention is not limited thereto. The sizes of the second adhesive layers 246 may be different.

3 is a partial cross-sectional schematic view of a chip-on-film package structure according to yet another embodiment of the present invention. Referring to FIG. 3 , the chip on film package structure 300 of the present embodiment is similar to the chip on film package structure 100 in the above-mentioned embodiment, and the difference lies in: the protective layer 348 of the heat dissipation patch 340 of the chip on film package structure 300 and the heat dissipation The layer 144 is the same size and completely covers the heat dissipation layer 144, and the second glue layer is omitted. Further, the protective layer 348 can be formed on the heat dissipation layer 144 by coating, and the second adhesive layer can be omitted to bond the two, so it can be completely avoided that the tool 10 is in contact with the second adhesive layer. To further avoid residual glue on the cutter 10 and the probability of glue overflow contamination when the whole roll of the film-on-chip packaging structure 300 is wound, the material of the protective layer 348 can be polyimide (PI), but The present invention is not limited to this. In this embodiment, although the heat dissipation patch 340 is only disposed on the first surface 110a, the present invention is not limited to this. In other embodiments not shown, the heat dissipation patch 340 may be only disposed on the first surface 110a as shown in FIG. 1D It is disposed on the second surface 110b or simultaneously on the first surface 110a and the second surface 110b as shown in FIG. 1E .

It should be noted that the heat dissipation patch of the present invention is not limited to the dimensional relationship of each layer in the above-mentioned embodiments, as long as the orthographic projection of the first adhesive layer of the heat dissipation patch on the flexible substrate covers the points of the flexible substrate. Both the glue area and the punching range of the flexible substrate belong to the protection scope of the present invention.

To sum up, the first adhesive layer in the heat dissipation patch, which is attached to the heat dissipation layer on the flexible substrate, is designed to cover the dispensing area with an orthographic projection on the flexible substrate and is located within the punching range. In this way, , the first adhesive layer of the heat dissipation patch can be shrunk within the punching range, so that the tool of the drawing mechanism will not pass through the first adhesive layer during the drawing, so as to avoid the first adhesive layer remaining on the tool and avoid hitting The problem that the remaining first adhesive layer after pulling out will overflow and contaminate good products when the whole roll of the film-on-chip packaging structure is rolled and pressed. Therefore, the film-on-chip packaging structure of the present invention can simplify the manufacturing process (without the need for additional heat dissipation stickers) The action of removing the chip) at the same time reduces the probability of glue spillage contamination during the subsequent winding of the entire roll of film-on-chip packaging structure with residual glue on the tool. Furthermore, when the second adhesive layer in the heat dissipation patch, which is attached to the heat dissipation layer and the protective layer, is designed so that the orthographic projection on the flexible substrate is within the die-cutting range, or the second adhesive layer is omitted, for example, by coating. When the protective layer is formed on the heat dissipation layer, it can further avoid the problem that the tool passes through the second adhesive layer and remains on the tool during pulling or the problem of glue overflow pollution when the whole roll of film-on-chip packaging structure is wound and pressed. Therefore, the present invention The excellent film-on-chip packaging structure can further reduce the probability of adhesive residue on the tool and the occurrence of glue spillage contamination when the entire roll of the film-on-chip packaging structure is wound.

Although the present invention has been disclosed as above with examples, it is not intended to limit the present invention. Anyone with ordinary knowledge in the technical field can make some changes and modifications without departing from the spirit and scope of the present invention. The protection scope of the present invention shall be determined by the scope of the appended patent application.

10: Knives 100, 100a, 100b, 200, 300: Thin film flip chip package structure 110: Flexible substrate 110a: First surface 110b: Second surface 112: pin 114: Solder mask 120: Wafer 120b: Back 122: Wafer Bonding Area 124: bump 130: Underfill 132: Dispensing area 140, 240, 340: heat dissipation patch 142: The first adhesive layer 144: heat dissipation layer 146, 246: The second adhesive layer 148, 348: protective layer d1, d2: distance P: Punching range

1A and FIG. 1B are partial cross-sectional schematic views of a chip-on-film package structure before and after a patch according to an embodiment of the present invention. FIG. 1C is a schematic top view of the chip-on-film packaging structure of FIG. 1B in a tape-and-reel state. FIG. 1D is a partial cross-sectional schematic diagram of a chip on film package structure according to another embodiment of the present invention. FIG. 1E is a partial cross-sectional schematic diagram of a chip on film package structure according to yet another embodiment of the present invention. FIG. 2 is a partial cross-sectional schematic diagram of a chip-on-film package structure according to still another embodiment of the present invention. 3 is a partial cross-sectional schematic view of a chip-on-film package structure according to yet another embodiment of the present invention. It should be noted that the first adhesive layer, the heat dissipation layer, the second adhesive layer and the protective layer of the heat dissipation patch in FIG. 1C are all drawn in perspective, and the chips and pins are omitted.

10: Knives

100: Thin film flip chip package structure

110: Flexible substrate

110a: First surface

110b: Second surface

112: pin

114: Solder mask

120: Wafer

120b: Back

122: Wafer Bonding Area

124: bump

130: Underfill

132: Dispensing area

140: heat dissipation patch

142: The first adhesive layer

144: heat dissipation layer

146: The second adhesive layer

148: Protective Layer

P: Punching range

Claims (10)

A film-on-chip packaging structure, comprising: A flexible substrate having opposite first and second surfaces and defining a punching range, wherein the first surface includes a die bonding area and a dispensing area located within the punching range, the die bonding area in the dispensing area; a wafer, disposed in the wafer bonding area; an underfill, disposed in the glue dispensing area and at least filled between the wafer and the flexible substrate; and A heat dissipation patch, disposed on at least one of the first surface and the second surface, the heat dissipation patch includes a first adhesive layer, a heat dissipation layer and a protection layer, and the protection layer covers the heat dissipation layer , the first adhesive layer is located between the heat dissipation layer and the flexible substrate, and the orthographic projection of the first adhesive layer on the flexible substrate covers the dispensing area and is located in the within the cutting range. The chip-on-film package structure according to claim 1, wherein an orthographic projection range of the first adhesive layer on the flexible substrate is not smaller than the adhesive dispensing area. The chip on film package structure according to claim 1, wherein an orthographic projection range of the heat dissipation layer on the flexible substrate is larger than the punching range. The chip on film package structure according to claim 1, wherein the size of the protective layer is larger than that of the heat dissipation layer, and the protective layer completely covers the heat dissipation layer. The chip-on-film package structure according to claim 1, wherein the heat dissipation patch further comprises a second adhesive layer located between the protection layer and the heat dissipation layer. The chip on film package structure according to claim 5, wherein the orthographic projection of the second adhesive layer on the flexible substrate is located within the punching range. The chip on film packaging structure according to claim 5, wherein the thickness of the second adhesive layer is not greater than 1/2 of the thickness of the first adhesive layer. The chip on film package structure according to claim 1, wherein the heat dissipation patch is disposed on the first surface, and the first adhesive layer covers at least the backside of the chip and the underfill material. The chip on film package structure of claim 1, wherein the protective layer has the same size as the heat dissipation layer and completely covers the heat dissipation layer. The chip on film package structure according to claim 9, wherein the protective layer is formed on the heat dissipation layer by coating.

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