TWI891553B - Power supply device with high output stability - Google Patents

Abstract

A power supply device with high output stability includes a bridge rectifier, a first inductor, a power switch element, a first output stage circuit, a voltage divider circuit, a switch circuit, a transformer, a resonant capacitor, a tunable impedance circuit, a second output stage circuit, and a delay control circuit. A soft start mechanism is provided by the tunable impedance circuit and the delay control circuit.

Description

High output stability power supply

The present invention relates to a power supply, and more particularly to a power supply with high output stability.

Power supplies are essential components in laptop computers. However, if the power supply's output stability is insufficient, it can easily lead to a decline in the overall performance of the laptop. This necessitates a new solution to overcome the difficulties faced by previous technologies.

In a preferred embodiment, the present invention provides a power supply with high output stability, comprising: a bridge rectifier, generating a rectified potential according to a first input potential and a second input potential; a first inductor, receiving the rectified potential; a power switch, selectively coupling the first inductor to a ground potential according to a first drive potential; a first output stage circuit, coupled to the first inductor, and generating an intermediate potential; a voltage divider circuit, generating a voltage divider potential according to the intermediate potential; a switching circuit, generating a switching potential according to the intermediate potential, a second drive potential, and a third drive potential; a transformer, comprising a main coil, A first secondary coil and a second secondary coil, wherein the transformer has a built-in leakage inductor and an excitation inductor, and the main coil receives the switching potential via the leakage inductor; a resonant capacitor coupled to the excitation inductor; an adjustable impedance circuit providing a variable impedance value to the leakage inductor and the resonant capacitor according to a control potential; a second output stage circuit coupled to the first secondary coil and the second secondary coil and generating an output potential; and a delay control circuit generating the first drive potential, the second drive potential, and the third drive potential; wherein the delay control circuit further generates the control potential according to the rectified potential and the divided potential.

In some embodiments, the bridge rectifier includes: a first diode having an anode and a cathode, wherein the anode of the first diode is coupled to a first input node to receive the first input potential, and the cathode of the first diode is coupled to a first node to output the rectified potential; a second diode having an anode and a cathode, wherein the anode of the second diode is coupled to a second input node to receive the second input potential, and the cathode of the second diode is coupled to the first node; a third diode having an anode and a cathode. cathode, wherein the anode of the third diode is coupled to the ground potential, and the cathode of the third diode is coupled to the first input node; and a fourth diode having an anode and a cathode, wherein the anode of the fourth diode is coupled to the ground potential, and the cathode of the fourth diode is coupled to the second input node; wherein the first inductor has a first end and a second end, the first end of the first inductor is coupled to the first node to receive the rectified potential, and the second end of the first inductor is coupled to a second node.

In some embodiments, the power switch includes: a first transistor having a control terminal, a first terminal, and a second terminal, wherein the control terminal of the first transistor is used to receive the first driving potential, the first terminal of the first transistor is coupled to the ground potential, and the second terminal of the first transistor is coupled to the second node.

In some embodiments, the first output stage circuit includes: a fifth diode having an anode and a cathode, wherein the anode of the fifth diode is coupled to the second node, and the cathode of the fifth diode is coupled to a third node to output the intermediate potential; and a first capacitor having a first end and a second end, wherein the first end of the first capacitor is coupled to the third node, and the second end of the first capacitor is coupled to the ground potential.

In some embodiments, the voltage divider circuit includes: a first resistor having a first end and a second end, wherein the first end of the first resistor is coupled to the third node to receive the intermediate potential, and the second end of the first resistor is coupled to a fourth node to output the divided potential; and a second resistor having a first end and a second end, wherein the first end of the second resistor is coupled to the fourth node, and the second end of the second resistor is coupled to the ground potential.

In some embodiments, the switching circuit includes: a second transistor having a control terminal, a first terminal, and a second terminal, wherein the control terminal of the second transistor is used to receive the second drive potential, the first terminal of the second transistor is coupled to a fifth node to output the switching potential, and the second terminal of the second transistor is coupled to the third node to receive the intermediate potential; and a third transistor having a control terminal, a first terminal, and a second terminal, wherein the control terminal of the third transistor is used to receive the third drive potential, the first terminal of the third transistor is coupled to the ground potential, and the second terminal of the third transistor is coupled to the fifth node.

In some embodiments, the leakage inductor has a first end and a second end, the first end of the leakage inductor is coupled to the fifth node to receive the switching potential, the second end of the leakage inductor is coupled to a sixth node, the main coil has a first end and a second end, the first end of the main coil is coupled to the sixth node, the second end of the main coil is coupled to a seventh node, the excitation inductor has a first end and a second end, the first end of the excitation inductor is coupled to the sixth node, the second end of the excitation inductor is coupled to the seventh node. The resonant capacitor has a first end and a second end, the first end of the resonant capacitor is coupled to the seventh node, and the second end of the resonant capacitor is coupled to the ground potential. The first secondary coil has a first end and a second end, the first end of the first secondary coil is coupled to an eighth node, and the second end of the first secondary coil is coupled to a common node. The second secondary coil has a first end and a second end, the first end of the second secondary coil is coupled to the common node, and the second end of the second secondary coil is coupled to a ninth node.

In some embodiments, the adjustable impedance circuit includes: a fourth transistor having a control terminal, a first terminal, and a second terminal, wherein the control terminal of the fourth transistor is used to receive the control potential, the first terminal of the fourth transistor is coupled to a tenth node, and the second terminal of the fourth transistor is coupled to the fifth node; a second capacitor having a first terminal and a second terminal, wherein the first terminal of the second capacitor is coupled to the tenth node, and the second terminal of the second capacitor is coupled to the fifth node. to the sixth node; a second inductor having a first end and a second end, wherein the first end of the second inductor is coupled to an eleventh node, and the second end of the second inductor is coupled to the ground potential; and a fifth transistor having a control end, a first end, and a second end, wherein the control end of the fifth transistor is used to receive the control potential, the first end of the fifth transistor is coupled to the eleventh node, and the second end of the fifth transistor is coupled to the seventh node.

In some embodiments, the second output stage circuit includes: a sixth diode having an anode and a cathode, wherein the anode of the sixth diode is coupled to the eighth node, and the cathode of the sixth diode is coupled to an output node to output the output potential; a seventh diode having an anode and a cathode, wherein the anode of the seventh diode is coupled to the ninth node, and the cathode of the seventh diode is coupled to the output node; and a third capacitor having a first end and a second end, wherein the first end of the third capacitor is coupled to the output node, and the second end of the third capacitor is coupled to the common node.

In some embodiments, the delay control circuit includes: a microcontroller that generates the first drive potential, the second drive potential, and the third drive potential, wherein the microcontroller further obtains a cycle time of the rectified potential; and a timer controlled by the microcontroller, wherein if the timer receives the divided voltage from the voltage divider circuit, the timer begins to calculate a delay time equal to the cycle time; wherein during the delay time, the timer outputs the control potential with a high logic level; wherein when the delay time expires, the timer switches the control potential from the high logic level to a low logic level.

In order to make the objects, features and advantages of the present invention more clearly understood, specific embodiments of the present invention are given below and described in detail with reference to the accompanying drawings.

Certain terms are used in the specification and patent application to refer to specific components. Those skilled in the art will understand that hardware manufacturers may use different terms to refer to the same component. This specification and patent application do not use differences in name as a way to distinguish components, but rather use differences in the functions of the components as the criterion for distinction. The words "include" and "including" mentioned throughout the specification and patent application are open-ended terms and should be interpreted as "including but not limited to". The word "substantially" means that within an acceptable error range, those skilled in the art can solve the technical problem within a certain error range and achieve the basic technical effect. In addition, the word "coupled" in this specification includes any direct and indirect electrical connection means. Therefore, if a first device is described herein as being coupled to a second device, it means that the first device may be directly electrically connected to the second device, or indirectly electrically connected to the second device via other devices or connection means.

FIG1 is a schematic diagram of a power supply 100 according to an embodiment of the present invention. For example, the power supply 100 can be applied to a desktop computer, a laptop computer, or an all-in-one computer. As shown in FIG1 , the power supply 100 includes: a bridge rectifier 110, a first inductor L1, a power switch 120, a first output stage circuit 130, a voltage divider circuit 140, a switching circuit 150, a transformer 160, a resonant capacitor CR, an adjustable impedance circuit 170, a second output stage circuit 180, and a delay control circuit 190. It should be noted that, although not shown in FIG1 , the power supply 100 may further include other components, such as: a voltage regulator and/or a negative feedback circuit.

The bridge rectifier 110 can generate a rectified potential VR based on a first input potential VIN1 and a second input potential VIN2. An AC voltage having any frequency and amplitude can be formed between the first input potential VIN1 and the second input potential VIN2. For example, the frequency of the AC voltage can be approximately 50 Hz or 60 Hz, and the RMS value of the AC voltage can be approximately between 90 V and 264 V, but is not limited thereto. The first inductor L1 can receive the rectified potential VR. The power switch 120 can selectively couple the first inductor L1 to a ground potential VSS (e.g., 0 V) based on a first drive potential VG1. For example, if the first drive potential VG1 has a high logic level (i.e., a logic "1"), the power switch 120 can couple the first inductor L1 to the ground potential VSS (i.e., the power switch 120 can be similar to a short circuit path). Conversely, if the first drive potential VG1 has a low logic level (i.e., a logic "0"), the power switch 120 will not couple the first inductor L1 to the ground potential VSS (i.e., the power switch 120 can be similar to an open circuit path). The first output stage circuit 130 is coupled to the first inductor L1 and can generate an intermediate potential VE. The voltage divider circuit 140 can generate a divided voltage VD according to the intermediate potential VE, wherein the divided voltage VD can be equal to a specific ratio of the intermediate potential VE, for example, approximately 1% or 2%.

The switching circuit 150 can generate a switching potential VW based on the intermediate potential VE, a second drive potential VG2, and a third drive potential VG3. The transformer 160 includes a main coil 161, a first secondary coil 162, and a second secondary coil 163. The transformer 160 can further include a leakage inductor LR and an excitation inductor LM, wherein the leakage inductor LR, the excitation inductor LM, and the main coil 161 can all be located on the same side of the transformer 160, while the first secondary coil 162 and the second secondary coil 163 can both be located on opposite sides of the transformer 160. The main coil 161 can receive the switching potential VW via the leakage inductor LR, and the first secondary coil 162 and the second secondary coil 163 can operate in response to the switching potential VW. The resonant capacitor CR is coupled to the magnetizing inductor LM. For example, the leakage inductor LR, the magnetizing inductor LM, and the resonant capacitor CR can collectively form a resonant tank of the power supply 100. The adjustable impedance circuit 170 can provide a variable impedance value to the leakage inductor LR and the resonant capacitor CR based on a control potential VC. The second output stage circuit 180 is coupled to the first and second secondary coils 162 and 163 and can generate an output potential VOUT. For example, the output potential VOUT can be a DC potential with a potential level between 18V and 22V, but is not limited thereto.

The delay control circuit 190 can generate a first drive potential VG1, a second drive potential VG2, and a third drive potential VG3. Furthermore, the delay control circuit 190 can generate a control potential VC based on the rectified potential VR and the divided voltage VD. According to actual measurement results, because the adjustable impedance circuit 170 and the delay control circuit 190 provide a soft start mechanism, the power supply 100 of the present invention can significantly improve its output stability.

The following embodiments will introduce the detailed structure and operation of the power supply 100. It must be understood that these drawings and descriptions are only examples and are not intended to limit the scope of the present invention.

FIG2 shows a circuit diagram of a power supply 200 according to an embodiment of the present invention. In the embodiment of FIG2 , the power supply 200 has a first input node NIN1, a second input node NIN2, and an output node NOUT, and includes: a bridge rectifier 210, a first inductor L1, a power switch 220, a first output stage circuit 230, a voltage divider circuit 240, a switching circuit 250, a transformer 260, a resonant capacitor CR, an adjustable impedance circuit 270, a second output stage circuit 280, and a delay control circuit 290. The first input node NIN1 and the second input node NIN2 of the power supply 200 can respectively receive a first input potential VIN1 and a second input potential VIN2 from an external input power source (not shown), while the output node NOUT of the power supply 200 can be used to output an output potential VOUT to a system end (not shown), such as a laptop computer.

The bridge rectifier 210 includes a first diode D1, a second diode D2, a third diode D3, and a fourth diode D4. The first diode D1 has an anode and a cathode, wherein the anode of the first diode D1 is coupled to the first input node NIN1, and the cathode of the first diode D1 is coupled to the first node N1 to output a rectified potential VR. The second diode D2 has an anode and a cathode, wherein the anode of the second diode D2 is coupled to the second input node NIN2, and the cathode of the second diode D2 is coupled to the first node N1. The third diode D3 has an anode and a cathode, wherein the anode of the third diode D3 is coupled to a ground potential VSS, and the cathode of the third diode D3 is coupled to the first input node NIN1. The fourth diode D4 has an anode and a cathode, wherein the anode of the fourth diode D4 is coupled to the ground potential VSS, and the cathode of the fourth diode D4 is coupled to the second input node NIN2.

The first inductor L1 has a first terminal and a second terminal, wherein the first terminal of the first inductor L1 is coupled to the first node N1 to receive the rectified potential VR, and the second terminal of the first inductor L1 is coupled to a second node N2.

The power switch 220 includes a first transistor M1. For example, the first transistor M1 can be an N-type Metal-Oxide-Semiconductor Field-Effect Transistor (NMOSFET). The first transistor M1 has a control terminal (e.g., a gate), a first terminal (e.g., a source), and a second terminal (e.g., a drain). The control terminal of the first transistor M1 is configured to receive a first drive potential VG1. The first terminal of the first transistor M1 is coupled to the ground potential VSS. The second terminal of the first transistor M1 is coupled to the second node N2.

The first output stage circuit 230 includes a fifth diode D5 and a first capacitor C1. The fifth diode D5 has an anode and a cathode. The anode of the fifth diode D5 is coupled to the second node N2, and the cathode of the fifth diode D5 is coupled to a third node N3 to output an intermediate potential VE. The first capacitor C1 has a first terminal and a second terminal. The first terminal of the first capacitor C1 is coupled to the third node N3, and the second terminal of the first capacitor C1 is coupled to the ground potential VSS.

The voltage divider circuit 240 includes a first resistor R1 and a second resistor R2. For example, the resistance value of the first resistor R1 may be at least 70 times the resistance value of the second resistor R2, but is not limited thereto. The first resistor R1 has a first end and a second end, wherein the first end of the first resistor R1 is coupled to the third node N3 to receive the intermediate potential VE, and the second end of the first resistor R1 is coupled to a fourth node N4 to output a divided potential VD. The second resistor R2 has a first end and a second end, wherein the first end of the second resistor R2 is coupled to the fourth node N4, and the second end of the second resistor R2 is coupled to the ground potential VSS. In some embodiments, the voltage divider circuit 240 may operate based on the following equation (1):

……………………………………(1)Wherein, “VD” represents the level of the divided voltage VD, “R1” represents the resistance value of the first resistor R1, “R2” represents the resistance value of the second resistor R2, and “VE” represents the level of the intermediate potential VE.

The switching circuit 250 includes a second transistor M2 and a third transistor M3. For example, the second transistor M2 and the third transistor M3 can each be an N-type metal oxide semiconductor field effect transistor. The second transistor M2 has a control terminal (e.g., a gate), a first terminal (e.g., a source), and a second terminal (e.g., a drain). The control terminal of the second transistor M2 is configured to receive a second drive potential VG2. The first terminal of the second transistor M2 is coupled to a fifth node N5 to output a switching potential VW. The second terminal of the second transistor M2 is coupled to the third node N3 to receive the intermediate potential VE. The third transistor M3 has a control terminal (e.g., a gate), a first terminal (e.g., a source), and a second terminal (e.g., a drain). The control terminal of the third transistor M3 is used to receive a third driving potential VG3. The first terminal of the third transistor M3 is coupled to the ground potential VSS. The second terminal of the third transistor M3 is coupled to the fifth node N5.

Transformer 260 includes a main coil 261, a first secondary coil 262, and a second secondary coil 263. Transformer 260 further includes a built-in leakage inductor LR and a magnetizing inductor LM. Leakage inductor LR and magnetizing inductor LM can be inherent components inherent to transformer 260 during its manufacture and are not external, independent components. Leakage inductor LR, main coil 261, and magnetizing inductor LM can all be located on the same side of transformer 260 (e.g., the primary side), while first secondary coil 262 and second secondary coil 263 can both be located on an opposite side of transformer 260 (e.g., the secondary side, which can be isolated from the primary side). The leakage inductor LR has a first terminal and a second terminal, wherein the first terminal of the leakage inductor LR is coupled to the fifth node N5 to receive the switching potential VW, and the second terminal of the leakage inductor LR is coupled to a sixth node N6. The main coil 261 has a first terminal and a second terminal, wherein the first terminal of the main coil 261 is coupled to the sixth node N6, and the second terminal of the main coil 261 is coupled to a seventh node N7. The magnetizing inductor LM has a first terminal and a second terminal, wherein the first terminal of the magnetizing inductor LM is coupled to the sixth node N6, and the second terminal of the magnetizing inductor LM is coupled to the seventh node N7. The resonant capacitor CR has a first terminal and a second terminal, wherein the first terminal of the resonant capacitor CR is coupled to the seventh node N7, and the second terminal of the resonant capacitor CR is coupled to the ground potential VSS. For example, the leakage inductor LR, the magnetizing inductor LM, and the resonant capacitor CR can together form a resonant tank of the power supply 200, wherein a resonant current IR can also flow through this resonant tank. The first sub-coil 262 has a first end and a second end, wherein the first end of the first sub-coil 262 is coupled to an eighth node N8, and the second end of the first sub-coil 262 is coupled to a common node NCM. For example, the common node NCM can provide a common potential, which can be regarded as another ground potential and can be the same as or different from the aforementioned ground potential VSS. The second sub-coil 263 has a first end and a second end, wherein the first end of the second sub-coil 263 is coupled to the common node NCM, and the second end of the second sub-coil 263 is coupled to a ninth node N9.

The adjustable impedance circuit 270 includes a fourth transistor M4, a fifth transistor M5, a second inductor L2, and a second capacitor C2. For example, the fourth transistor M4 and the fifth transistor M5 can each be an N-type metal oxide semiconductor field effect transistor. The fourth transistor M4 has a control terminal (e.g., a gate), a first terminal (e.g., a source), and a second terminal (e.g., a drain). The control terminal of the fourth transistor M4 is configured to receive a control potential VC. The first terminal of the fourth transistor M4 is coupled to a tenth node N10, and the second terminal of the fourth transistor M4 is coupled to the fifth node N5. The second capacitor C2 has a first terminal and a second terminal. The first terminal of the second capacitor C2 is coupled to the tenth node N10, and the second terminal of the second capacitor C2 is coupled to the sixth node N6. The second inductor L2 has a first terminal and a second terminal, wherein the first terminal of the second inductor L2 is coupled to an eleventh node N11, and the second terminal of the second inductor L2 is coupled to the ground potential VSS. The fifth transistor M5 has a control terminal (e.g., a gate), a first terminal (e.g., a source), and a second terminal (e.g., a drain), wherein the control terminal of the fifth transistor M5 is configured to receive the control potential VC. The first terminal of the fifth transistor M5 is coupled to the eleventh node N11, and the second terminal of the fifth transistor M5 is coupled to the seventh node N7.

The second output stage circuit 280 includes a sixth diode D6, a seventh diode D7, and a third capacitor C3. The sixth diode D6 has an anode and a cathode, wherein the anode of the sixth diode D6 is coupled to the eighth node N8, and the cathode of the sixth diode D6 is coupled to the output node NOUT. The seventh diode D7 has an anode and a cathode, wherein the anode of the seventh diode D7 is coupled to the ninth node N9, and the cathode of the seventh diode D7 is coupled to the output node NOUT. The third capacitor C3 has a first terminal and a second terminal, wherein the first terminal of the third capacitor C3 is coupled to the output node NOUT, and the second terminal of the third capacitor C3 is coupled to the common node NCM.

The delay control circuit 290 includes a microcontroller unit (MCU) 292 and a timer 294. The microcontroller 292 can generate the aforementioned first drive potential VG1, second drive potential VG2, and third drive potential VG3. The first drive potential VG1 can be a pulse width modulation (PWM) potential. For example, the first drive potential VG1 can be maintained at a fixed potential when the power supply 200 is initialized, and can provide a periodic time pulse waveform after the power supply 200 enters normal use. In addition, the second drive potential VG2 and the third drive potential VG3 can have complementary logical levels. The timer 294 is coupled to the microcontroller 292 and can be controlled by the microcontroller 292. In some embodiments, the operating principles of the microcontroller 292 and the timer 294 can be described as follows.

FIG3 shows a potential waveform of the rectified potential VR according to an embodiment of the present invention, wherein the horizontal axis represents time (s) and the vertical axis represents potential level (V). As shown in FIG3 , the rectified potential VR is a periodic potential having a cycle time TC. For example, the cycle time TC may be between 30 ms and 40 ms, but is not limited thereto. The microcontroller 292 is coupled to the first node N1. The microcontroller 292 can further monitor the rectified potential VR and obtain the cycle time TC of the rectified potential VR. The microcontroller 292 can then notify the timer 294 of information related to the cycle time TC.

Figure 4 shows a signal waveform diagram of the power supply 200 according to an embodiment of the present invention, wherein the horizontal axis represents time (s) and the vertical axis represents the current value (A) or the potential level (V). Please refer to Figures 2, 3, and 4 together. When the power supply 200 is operating normally, the voltage divider circuit 240 will provide a voltage divider potential VD. If the timer 294 receives the voltage divider potential VD from the voltage divider circuit 240, it can be used as a supply potential (Supply Voltage) of the timer 294, and the timer 294 can start to calculate a delay time TD. In some embodiments, the delay time TD is roughly equivalent to the single cycle time TC of the rectified potential VR. For example, the delay time TD may be between 8 ms and 10 ms, but is not limited thereto.

As shown in FIG. 4 , during the delay time TD (i.e., before a specific time point TS), the timer 294 outputs a control potential VC having a high logic level, thereby causing the resonant current IR to have relatively small fluctuations. At this time, because the fourth transistor M4 and the fifth transistor M5 are both enabled, the capacitance of the second capacitor C2 can be used to offset the inductance of the leakage inductor LR, and the inductance of the second inductor L2 can be used to offset the capacitance of the resonant capacitor CR. In some embodiments, the inductance of the second inductor L2 is approximately equal to the inductance of the leakage inductor LR, and the capacitance of the second capacitor C2 is approximately equal to the capacitance of the resonant capacitor CR, but this is not limited to this embodiment. In other words, the resonant tank of the power supply 200 only uses the magnetizing inductor LM during the delay time TD, which can be considered a slow-start mechanism for the power supply 200. According to actual measurement results, this slow-start mechanism helps prevent the power supply 200 from accidentally damaging internal components due to the initial high resonant energy.

Please refer again to Figure 4. When the delay time TD expires (i.e., after a specified time TS), timer 294 switches control potential VC from a high logic level to a low logic level, causing the resonant current IR to fluctuate significantly. At this point, because the fourth transistor M4 and the fifth transistor M5 are both disabled, the resonant tank of power supply 200 can simultaneously utilize leakage inductor LR, magnetizing inductor LM, and resonant capacitor CR. In other words, after the delay time TD has expired, the resonant tank of power supply 200 can normally provide its resonant energy, without requiring the soft-start mechanism described above.

This invention proposes a novel power supply with a slow-start mechanism. Based on actual measurement results, the output stability of the power supply using this design is significantly improved, making it suitable for use in a variety of devices.

It is worth noting that the potential, current, resistance, inductance, capacitance, and other component parameters mentioned above are not limiting conditions of the present invention. Designers can adjust these settings according to different needs. The power supply of the present invention is not limited to the states shown in Figures 1-4. The present invention may only include any one or more features of any one or more embodiments of Figures 1-4. In other words, not all features shown in the diagrams need to be implemented in the power supply of the present invention at the same time. Although the embodiments of the present invention use metal oxide semiconductor field effect transistors as an example, the present invention is not limited to this. People in this technical field can use other types of transistors, such as junction field effect transistors, or fin field effect transistors, etc., without affecting the effects of the present invention.

In this specification and the scope of the patent application, ordinal numbers, such as "first", "second", "third", etc., have no sequential relationship with each other and are only used to mark and distinguish two different components with the same name.

Although the present invention is disclosed above with reference to preferred embodiments, they are not intended to limit the scope of the present invention. Anyone skilled in the art may make slight modifications and improvements without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention shall be determined by the scope of the attached patent application.

100,200: Power supply 110,210: Bridge rectifier 120,220: Power switch 130,230: First output stage circuit 140,240: Voltage divider circuit 150,250: Switching circuit 160,260: Transformer 161,261: Primary coil 162,262: First secondary coil 163,263: Second secondary coil 170,270: Adjustable impedance circuit 180,280: Second output stage circuit 190,290: Delay control circuit 292: Microcontroller 294: Timer C1: First capacitor C2: Second capacitor C3: Third capacitor CR: Resonance capacitor D1: First diode D2: Second diode D3: Third diode D4: Fourth diode D5: Fifth diode D6: Sixth diode D7: Seventh diode IR: Resonant current L1: First inductor L2: Second inductor LM: Magnetizing inductor LR: Leakage inductor M1: First transistor M2: Second transistor M3: Third transistor M4: Fourth transistor M5: Fifth transistor N1: First node N2: Second node N3: Third node N4: Fourth node N5: Fifth node N6: Sixth node N7: Seventh node N8: Eighth node N9: Ninth node N10: Tenth node N11: Eleventh node NCM: Common node NIN1: First input node NIN2: Second input node NOUT: Output node R1: First resistor R2: Second resistor TC: Cycle time TD: Delay time TS: Specific time point VC: Control voltage VD: Divider voltage VE: Middle voltage VG1: First drive voltage VG2: Second drive voltage VG3: Third drive voltage VIN1: First input voltage VIN2: Second input voltage VOUT: Output voltage VR: Rectified voltage VSS: Ground voltage VW: Switching voltage

Figure 1 is a schematic diagram of a power supply according to an embodiment of the present invention. Figure 2 is a circuit diagram of a power supply according to an embodiment of the present invention. Figure 3 is a potential waveform diagram of a rectified potential according to an embodiment of the present invention. Figure 4 is a signal waveform diagram of a power supply according to an embodiment of the present invention.

100: Power supply

110: Bridge rectifier

120: Power switch

130: First output stage circuit

140: Voltage divider circuit

150: Switching circuit

160: Transformer

161: Main coil

162: First coil

163: Second coil

170: Adjustable Impedance Circuit

180: Second output stage circuit

190: Delay control circuit

CR: Resonant Capacitor

L1: First inductor

LM: Magnetizing Inductor

LR: Leakage Inductor

VC: Control voltage

VD: voltage divider potential

VE: intermediate potential

VG1: First driving potential

VG2: Second driving potential

VG3: Third drive potential

VIN1: First input potential

VIN2: Second input potential

VOUT: output voltage

VR: Rectification potential

VSS: Ground potential

VW: Switching potential

Claims (10)

A power supply with high output stability includes: a bridge rectifier generating a rectified potential based on a first input potential and a second input potential; a first inductor receiving the rectified potential; a power switch selectively coupling the first inductor to a ground potential based on a first drive potential; a first output stage circuit coupled to the first inductor and generating an intermediate potential; a voltage divider circuit generating a divided potential based on the intermediate potential; a switching circuit generating a switching potential based on the intermediate potential, a second drive potential, and a third drive potential; A transformer includes a main coil, a first secondary coil, and a second secondary coil, wherein the transformer has a built-in leakage inductor and a magnetizing inductor, and the main coil receives the switching potential via the leakage inductor; a resonant capacitor coupled to the magnetizing inductor; an adjustable impedance circuit providing a variable impedance value to the leakage inductor and the resonant capacitor based on a control potential; a second output stage circuit coupled to the first secondary coil and the second secondary coil and generating an output potential; and a delay control circuit generating the first drive potential, the second drive potential, and the third drive potential; wherein the delay control circuit further generates the control potential based on the rectified potential and the divided potential. The power supply of claim 1, wherein the bridge rectifier comprises: a first diode having an anode and a cathode, wherein the anode of the first diode is coupled to a first input node to receive the first input potential, and the cathode of the first diode is coupled to a first node to output the rectified potential; a second diode having an anode and a cathode, wherein the anode of the second diode is coupled to a second input node to receive the second input potential, and the cathode of the second diode is coupled to the first node; a third diode having an anode and a cathode, wherein the anode of the third diode is coupled to the ground potential, and the cathode of the third diode is coupled to the first input node; and a fourth diode having an anode and a cathode, wherein the anode of the fourth diode is coupled to the ground potential, and the cathode of the fourth diode is coupled to the second input node; the first inductor having a first terminal and a second terminal, wherein the first terminal of the first inductor is coupled to the first node to receive the rectified potential, and the second terminal of the first inductor is coupled to a second node. The power supply of claim 2, wherein the power switch comprises: a first transistor having a control terminal, a first terminal, and a second terminal, wherein the control terminal of the first transistor is configured to receive the first drive potential, the first terminal of the first transistor is coupled to the ground potential, and the second terminal of the first transistor is coupled to the second node. The power supply of claim 2, wherein the first output stage circuit comprises: a fifth diode having an anode and a cathode, wherein the anode of the fifth diode is coupled to the second node, and the cathode of the fifth diode is coupled to a third node to output the intermediate potential; and a first capacitor having a first terminal and a second terminal, wherein the first terminal of the first capacitor is coupled to the third node, and the second terminal of the first capacitor is coupled to the ground potential. The power supply of claim 4, wherein the voltage divider circuit comprises: a first resistor having a first end and a second end, wherein the first end of the first resistor is coupled to the third node to receive the intermediate potential, and the second end of the first resistor is coupled to a fourth node to output the divided potential; and a second resistor having a first end and a second end, wherein the first end of the second resistor is coupled to the fourth node, and the second end of the second resistor is coupled to the ground potential. The power supply of claim 4, wherein the switching circuit comprises: a second transistor having a control terminal, a first terminal, and a second terminal, wherein the control terminal of the second transistor is configured to receive the second drive potential, the first terminal of the second transistor is coupled to a fifth node to output the switching potential, and the second terminal of the second transistor is coupled to the third node to receive the intermediate potential; and a third transistor having a control terminal, a first terminal, and a second terminal, wherein the control terminal of the third transistor is configured to receive the third drive potential, the first terminal of the third transistor is coupled to the ground potential, and the second terminal of the third transistor is coupled to the fifth node. The power supply as described in claim 6, wherein the leakage inductor has a first end and a second end, the first end of the leakage inductor is coupled to the fifth node to receive the switching potential, the second end of the leakage inductor is coupled to a sixth node, the main coil has a first end and a second end, the first end of the main coil is coupled to the sixth node, the second end of the main coil is coupled to a seventh node, the excitation inductor has a first end and a second end, the first end of the excitation inductor is coupled to the sixth node, the second end of the excitation inductor is coupled To the seventh node, the resonant capacitor has a first end and a second end, the first end of the resonant capacitor is coupled to the seventh node, and the second end of the resonant capacitor is coupled to the ground potential. The first secondary coil has a first end and a second end, the first end of the first secondary coil is coupled to an eighth node, and the second end of the first secondary coil is coupled to a common node. The second secondary coil has a first end and a second end, the first end of the second secondary coil is coupled to the common node, and the second end of the second secondary coil is coupled to a ninth node. The power supply as described in claim 7, wherein the adjustable impedance circuit includes: a fourth transistor having a control terminal, a first terminal, and a second terminal, wherein the control terminal of the fourth transistor is used to receive the control potential, the first terminal of the fourth transistor is coupled to a tenth node, and the second terminal of the fourth transistor is coupled to the fifth node; a second capacitor having a first terminal and a second terminal, wherein the first terminal of the second capacitor is coupled to the tenth node, and the second terminal of the second capacitor is coupled to the sixth node; a second inductor having a first terminal and a second terminal, wherein the first terminal of the second inductor is coupled to an eleventh node, and the second terminal of the second inductor is coupled to the ground potential; and A fifth transistor having a control terminal, a first terminal, and a second terminal, wherein the control terminal of the fifth transistor is used to receive the control potential, the first terminal of the fifth transistor is coupled to the eleventh node, and the second terminal of the fifth transistor is coupled to the seventh node. The power supply of claim 7, wherein the second output stage circuit comprises: a sixth diode having an anode and a cathode, wherein the anode of the sixth diode is coupled to the eighth node, and the cathode of the sixth diode is coupled to an output node to output the output potential; a seventh diode having an anode and a cathode, wherein the anode of the seventh diode is coupled to the ninth node, and the cathode of the seventh diode is coupled to the output node; and a third capacitor having a first terminal and a second terminal, wherein the first terminal of the third capacitor is coupled to the output node, and the second terminal of the third capacitor is coupled to the common node. The power supply of claim 1, wherein the delay control circuit comprises: a microcontroller that generates the first drive potential, the second drive potential, and the third drive potential, wherein the microcontroller further obtains a cycle time of the rectified potential; and a timer controlled by the microcontroller, wherein when the timer receives the divided voltage from the voltage divider circuit, the timer begins to count a delay time equal to the cycle time; wherein, during the delay time, the timer outputs the control potential at a high logic level; wherein, when the delay time expires, the timer switches the control potential from the high logic level to a low logic level.