TWI886000B - Power supply device with high output stability - Google Patents

Abstract

A power supply device with high output stability includes a bridge rectifier, a boost inductor, a power switch element, a first output stage circuit, a switch circuit, a transformer, a resonant capacitor, a sense resistor, a second output stage circuit, and a detection and control circuit. The detection and control circuit can detect a first peak voltage difference and a second peak voltage difference across the sense resistor. Furthermore, the detection and control circuit can control the first output stage circuit according to the first peak voltage difference and the second peak voltage difference.

Description

High output stability power supply

The present invention relates to a power supply, and more particularly to a power supply with high output stability.

Power supplies are indispensable components in the field of laptop computers. However, if the output stability of the power supply is insufficient, it is easy to cause the overall operating performance of the related laptop to decline. In view of this, it is necessary to propose a new solution to overcome the difficulties faced by previous technologies.

In a preferred embodiment, the present invention provides a power supply with high output stability, including: a bridge rectifier, generating a rectified potential according to a first input potential and a second input potential; a boost inductor, receiving the rectified potential; a power switch, selectively coupling the boost inductor to a ground potential according to a first drive potential; a first output stage circuit, coupled to the boost inductor, wherein the first output stage circuit determines whether to generate an intermediate potential according to a control potential; a switching circuit, generating all switching potentials according to the intermediate potential, a second drive potential, and a third drive potential; a transformer, including a main coil, a first secondary coil, and a grounding circuit. , and a second secondary coil, wherein the transformer has a leakage inductor and an exciting inductor built in, and the main coil receives the switching potential via the leakage inductor; a resonant capacitor coupled to the exciting inductor; a sensing resistor coupled to the resonant capacitor; a second output stage circuit coupled to the first secondary coil and the second secondary coil and generating an output potential; and a detection and control circuit detecting a first peak potential difference and a second peak potential difference across the sensing resistor, wherein the detection and control circuit further generates the control potential, the first driving potential, the second driving potential, and the third driving potential according to the first peak potential difference and the second peak potential difference.

In some embodiments, the bridge rectifier includes: a first diode having an anode and a cathode, wherein the anode of the first diode is coupled to a first input node to receive the first input potential, and the cathode of the first diode is coupled to a first node to output the rectified potential; a second diode having an anode and a cathode, wherein the anode of the second diode is coupled to a second input node to receive the second input potential, and the cathode of the second diode is coupled to the first node; a third diode having an anode and a cathode. cathode, wherein the anode of the third diode is coupled to the ground potential, and the cathode of the third diode is coupled to the first input node; and a fourth diode having an anode and a cathode, wherein the anode of the fourth diode is coupled to the ground potential, and the cathode of the fourth diode is coupled to the second input node; wherein the boost inductor has a first end and a second end, the first end of the boost inductor is coupled to the first node to receive the rectified potential, and the second end of the boost inductor is coupled to a second node.

In some embodiments, the power switch includes: a first transistor having a control end, a first end, and a second end, wherein the control end of the first transistor is used to receive the first driving potential, the first end of the first transistor is coupled to the ground potential, and the second end of the first transistor is coupled to the second node.

In some embodiments, the first output stage circuit includes: a fifth diode having an anode and a cathode, wherein the anode of the fifth diode is coupled to the second node, and the cathode of the fifth diode is coupled to a third node; a first capacitor having a first end and a second end, wherein the first end of the first capacitor is coupled to the third node, and the second end of the first capacitor is coupled to the ground potential; and a second transistor having a control end, a first end, and a second end, wherein the control end of the second transistor is used to receive the control potential, the first end of the second transistor is coupled to a fourth node to selectively output the intermediate potential, and the second end of the second transistor is coupled to the third node.

In some embodiments, the switching circuit includes: a third transistor having a control end, a first end, and a second end, wherein the control end of the third transistor is used to receive the second driving potential, the first end of the third transistor is coupled to a fifth node to output the switching potential, and the second end of the third transistor is coupled to the fourth node to receive the intermediate potential; and a fourth transistor having a control end, a first end, and a second end, wherein the control end of the fourth transistor is used to receive the third driving potential, the first end of the fourth transistor is coupled to the ground potential, and the second end of the fourth transistor is coupled to the fifth node.

In some embodiments, the leakage inductor has a first end and a second end, the first end of the leakage inductor is coupled to the fifth node to receive the switching potential, the second end of the leakage inductor is coupled to a sixth node, the main coil has a first end and a second end, the first end of the main coil is coupled to the sixth node, the second end of the main coil is coupled to a seventh node, the excitation inductor has a first end and a second end, the first end of the excitation inductor is coupled to the sixth node, the second end of the excitation inductor is coupled to the seventh node, the resonant capacitor has a first end and a second end, the first end of the resonant capacitor is coupled to the sixth node, and the second end of the resonant capacitor is coupled to the seventh node. One end is coupled to the seventh node, the second end of the resonant capacitor is coupled to an eighth node, the sensing resistor has a first end and a second end, the first end of the sensing resistor is coupled to the eighth node, the second end of the sensing resistor is coupled to the ground potential, the first secondary coil has a first end and a second end, the first end of the first secondary coil is coupled to a ninth node, the second end of the first secondary coil is coupled to a common node, the second secondary coil has a first end and a second end, the first end of the second secondary coil is coupled to the common node, and the second end of the second secondary coil is coupled to a tenth node.

In some embodiments, the second output stage circuit includes: a sixth diode having an anode and a cathode, wherein the anode of the sixth diode is coupled to the ninth node, and the cathode of the sixth diode is coupled to an output node to output the output potential; a seventh diode having an anode and a cathode, wherein the anode of the seventh diode is coupled to the tenth node, and the cathode of the seventh diode is coupled to the output node; and a second capacitor having a first end and a second end, wherein the first end of the second capacitor is coupled to the output node, and the second end of the second capacitor is coupled to the common node.

In some embodiments, the detection and control circuit includes: a first AND gate having a first input terminal, a second input terminal, and an output terminal, wherein the first input terminal of the first AND gate is used to receive the second drive potential, the second input terminal of the first AND gate is used to receive the output potential, and the output terminal of the first AND gate is used to output a first logic potential; and a second AND gate having a first input terminal, a second input terminal, and an output terminal, wherein the first input terminal of the second AND gate is used to receive the third drive potential, the second input terminal of the second AND gate is used to receive the output potential, and the output terminal of the second AND gate is used to output a second logic potential.

In some embodiments, the detection and control circuit further includes: a pulse width modulation integrated circuit that generates the first drive potential; and a microcontroller that generates the second drive potential and the third drive potential; wherein if the first logic potential has a high logic level, the microcontroller will obtain the first peak potential difference across the sensing resistor; wherein if the second logic potential has a high logic level, the microcontroller will obtain the second peak potential difference across the sensing resistor.

In some embodiments, if the first peak potential difference and the second peak potential difference have different absolute values, the microcontroller will notify the pulse width modulation integrated circuit, so that the pulse width modulation integrated circuit further outputs a warning potential and generates the control potential with a low logic level.

In order to make the purpose, features and advantages of the present invention more clearly understood, specific embodiments of the present invention are specifically listed below and described in detail with reference to the accompanying drawings.

Certain terms are used in the specification and patent application to refer to specific components. Those skilled in the art should understand that hardware manufacturers may use different terms to refer to the same component. This specification and patent application do not use differences in names as a way to distinguish components, but use differences in the functions of components as the criterion for distinction. The words "include" and "including" mentioned throughout the specification and patent application are open terms and should be interpreted as "including but not limited to". The word "substantially" means that within an acceptable error range, those skilled in the art can solve the technical problem within a certain error range and achieve the basic technical effect. In addition, the word "coupled" in this specification includes any direct and indirect electrical connection means. Therefore, if a first device is described herein as being coupled to a second device, it means that the first device may be directly electrically connected to the second device, or may be indirectly electrically connected to the second device via other devices or connection means.

FIG. 1 is a schematic diagram showing a power supply 100 according to an embodiment of the present invention. For example, the power supply 100 can be applied to a desktop computer, a laptop computer, or an all-in-one computer. As shown in FIG. 1, the power supply 100 includes: a bridge rectifier 110, a boost inductor LU, a power switch 120, a first output stage circuit 130, a switching circuit 140, a transformer 150, a resonant capacitor CR, a sensing resistor RS, a second output stage circuit 160, and a detection and control circuit 170. It should be noted that, although not shown in FIG. 1, the power supply 100 may further include other components, such as: a voltage regulator or (and) a negative feedback circuit.

The bridge rectifier 110 can generate a rectified potential VR according to a first input potential VIN1 and a second input potential VIN2, wherein an AC voltage with any frequency and any amplitude can be formed between the first input potential VIN1 and the second input potential VIN2. For example, the frequency of the AC voltage can be approximately 50 Hz or 60 Hz, and the RMS value of the AC voltage can be approximately between 90 V and 264 V, but is not limited thereto. The boost inductor LU can receive the rectified potential VR. The power switch 120 can selectively couple the boost inductor LU to a ground potential VSS (e.g., 0 V) according to a first driving potential VG1. For example, if the first driving potential VG1 has a high logic level (i.e., logic "1"), the power switch 120 may couple the boost inductor LU to the ground potential VSS (i.e., the power switch 120 may be approximately a short circuit path); conversely, if the first driving potential VG1 has a low logic level (i.e., logic "0"), the power switch 120 will not couple the boost inductor LU to the ground potential VSS (i.e., the power switch 120 may be approximately an open circuit path).

The first output stage circuit 130 is coupled to the boost inductor LU, wherein the first output stage circuit 130 can determine whether to generate an intermediate potential VE according to a control potential VC. For example, if the control potential VC has a high logic level, the first output stage circuit 130 can normally output the intermediate potential VE; conversely, if the control potential VC has a low logic level, the first output stage circuit 130 can immediately stop outputting the intermediate potential VE. The switching circuit 140 can generate a switching potential VW according to the intermediate potential VE, a second driving potential VG2, and a third driving potential VG3.

The transformer 150 includes a main coil 151, a first secondary coil 152, and a second secondary coil 153. The transformer 150 may further have a built-in leakage inductor LR and a magnetizing inductor LM, wherein the leakage inductor LR, the magnetizing inductor LM, and the main coil 151 may all be located on the same side of the transformer 150, and the first secondary coil 152 and the second secondary coil 153 may all be located on the opposite side of the transformer 150. The main coil 151 may receive a switching potential VW via the leakage inductor LR, and the first secondary coil 152 and the second secondary coil 153 may operate in response to the switching potential VW. The resonant capacitor CR is coupled to the magnetizing inductor LM. For example, the leakage inductor LR, the magnetizing inductor LM, and the resonant capacitor CR can together form a resonant tank of the power supply 100. In addition, the sensing resistor RS is coupled to the resonant capacitor CR. The second output stage circuit 160 is coupled to the first sub-coil 152 and the second sub-coil 153, and can generate an output potential VOUT. For example, the output potential VOUT can be a DC potential, and its potential level can be between 18V and 22V, but it is not limited thereto.

The detection and control circuit 170 can detect a first peak potential difference VD1 and a second peak potential difference VD2 across the sense resistor RS, which can correspond to different operation cycles of the switching circuit 140. For example, the detection and control circuit 170 can compare the absolute value of the first peak potential difference VD1 with the absolute value of the second peak potential difference VD2, but is not limited thereto. Then, the detection and control circuit 170 can further generate the control potential VC, the first driving potential VG1, the second driving potential VG2, and the third driving potential VG3 according to the first peak potential difference VD1 and the second peak potential difference VD2. Since the detection and control circuit 170 can continuously monitor the operating status of the power supply 100, this design can prevent the power supply 100 from accidentally generating unbalanced resonant energy. According to actual measurement results, the power supply 100 of the present invention can greatly improve its own output stability.

The following embodiments will introduce the detailed structure and operation of the power supply 100. It must be understood that these drawings and descriptions are only examples and are not intended to limit the scope of the present invention.

FIG. 2 is a circuit diagram of a power supply 200 according to an embodiment of the present invention. In the embodiment of FIG. 2, the power supply 200 has a first input node NIN1, a second input node NIN2, and an output node NOUT, and includes: a bridge rectifier 210, a boost inductor LU, a power switch 220, a first output stage circuit 230, a switching circuit 240, a transformer 250, a resonant capacitor CR, a sensing resistor RS, a second output stage circuit 260, and a detection and control circuit 270. The first input node NIN1 and the second input node NIN2 of the power supply 200 can respectively receive a first input potential VIN1 and a second input potential VIN2 from an external input power source (not shown), and the output node NOUT of the power supply 200 can be used to output an output potential VOUT to a system end (not shown), such as a laptop computer.

The bridge rectifier 210 includes a first diode D1, a second diode D2, a third diode D3, and a fourth diode D4. The first diode D1 has an anode and a cathode, wherein the anode of the first diode D1 is coupled to the first input node NIN1, and the cathode of the first diode D1 is coupled to a first node N1 to output a rectified potential VR. The second diode D2 has an anode and a cathode, wherein the anode of the second diode D2 is coupled to the second input node NIN2, and the cathode of the second diode D2 is coupled to the first node N1. The third diode D3 has an anode and a cathode, wherein the anode of the third diode D3 is coupled to a ground potential VSS, and the cathode of the third diode D3 is coupled to the first input node NIN1. The fourth diode D4 has an anode and a cathode, wherein the anode of the fourth diode D4 is coupled to the ground potential VSS, and the cathode of the fourth diode D4 is coupled to the second input node NIN2.

The boost inductor LU has a first terminal and a second terminal, wherein the first terminal of the boost inductor LU is coupled to the first node N1 to receive the rectified potential VR, and the second terminal of the boost inductor LU is coupled to a second node N2.

The power switch 220 includes a first transistor M1. For example, the first transistor M1 may be an N-type Metal-Oxide-Semiconductor Field-Effect Transistor (NMOSFET). The first transistor M1 has a control terminal (e.g., a gate), a first terminal (e.g., a source), and a second terminal (e.g., a drain), wherein the control terminal of the first transistor M1 is used to receive a first driving potential VG1, the first terminal of the first transistor M1 is coupled to the ground potential VSS, and the second terminal of the first transistor M1 is coupled to the second node N2.

The first output stage circuit 230 includes a second transistor M2, a fifth diode D5, and a first capacitor C1. For example, the second transistor M2 can be an N-type metal oxide semi-conductor field effect transistor. The fifth diode D5 has an anode and a cathode, wherein the anode of the fifth diode D5 is coupled to the second node N2, and the cathode of the fifth diode D5 is coupled to a third node N3. The first capacitor C1 has a first end and a second end, wherein the first end of the first capacitor C1 is coupled to the third node N3, and the second end of the first capacitor C1 is coupled to the ground potential VSS. The second transistor M2 has a control end (e.g., a gate), a first end (e.g., a source), and a second end (e.g., a drain), wherein the control end of the second transistor M2 is used to receive a control potential VC, the first end of the second transistor M2 is coupled to a fourth node N4 to selectively output an intermediate potential VE, and the second end of the second transistor M2 is coupled to the third node N3.

The switching circuit 240 includes a third transistor M3 and a fourth transistor M4. For example, the third transistor M3 and the fourth transistor M4 can each be an N-type metal oxide semi-conductor field effect transistor. The third transistor M3 has a control end (e.g., a gate), a first end (e.g., a source), and a second end (e.g., a drain), wherein the control end of the third transistor M3 is used to receive a second driving potential VG2, the first end of the third transistor M3 is coupled to a fifth node N5 to output a switching potential VW, and the second end of the third transistor M3 is coupled to the fourth node N4 to receive the intermediate potential VE. The fourth transistor M4 has a control end (e.g., a gate), a first end (e.g., a source), and a second end (e.g., a drain), wherein the control end of the fourth transistor M4 is used to receive a third driving potential VG3, the first end of the fourth transistor M4 is coupled to the ground potential VSS, and the second end of the fourth transistor M4 is coupled to the fifth node N5.

The transformer 250 includes a main coil 251, a first secondary coil 252, and a second secondary coil 253, wherein the transformer 250 further has a built-in leakage inductor LR and an excitation inductor LM. The leakage inductor LR and the excitation inductor LM can be inherent components generated when the transformer 250 is manufactured, and they are not external independent components. The leakage inductor LR, the main coil 251, and the excitation inductor LM can all be located on the same side of the transformer 250 (for example: the primary side), and the first secondary coil 252 and the second secondary coil 253 can both be located on the opposite side of the transformer 250 (for example: the secondary side, which can be isolated from the primary side). The leakage inductor LR has a first end and a second end, wherein the first end of the leakage inductor LR is coupled to the fifth node N5 to receive the switching potential VW, and the second end of the leakage inductor LR is coupled to a sixth node N6. The main coil 251 has a first end and a second end, wherein the first end of the main coil 251 is coupled to the sixth node N6, and the second end of the main coil 251 is coupled to a seventh node N7. The excitation inductor LM has a first end and a second end, wherein the first end of the excitation inductor LM is coupled to the sixth node N6, and the second end of the excitation inductor LM is coupled to the seventh node N7. The resonant capacitor CR has a first end and a second end, wherein the first end of the resonant capacitor CR is coupled to the seventh node N7, and the second end of the resonant capacitor CR is coupled to an eighth node N8. For example, the leakage inductor LR, the excitation inductor LM, and the resonant capacitor CR can together form a resonant tank of the power supply 200. The sensing resistor RS has a first end and a second end, wherein the first end of the sensing resistor RS is coupled to the eighth node N8, and the second end of the sensing resistor RS is coupled to the ground potential VSS. For example, the resistance value of the sensing resistor RS can be less than or equal to 5Ω, and a potential difference ΔV can be across the sensing resistor RS. The first sub-coil 252 has a first end and a second end, wherein the first end of the first sub-coil 252 is coupled to a ninth node N9, and the second end of the first sub-coil 252 is coupled to a common node NCM. For example, the common node NCM can provide a common potential, which can be regarded as another ground potential, and can be the same as or different from the aforementioned ground potential VSS. The second sub-coil 253 has a first end and a second end, wherein the first end of the second sub-coil 253 is coupled to the common node NCM, and the second end of the second sub-coil 253 is coupled to a tenth node N10.

The second output stage circuit 260 includes a sixth diode D6, a seventh diode D7, and a second capacitor C2. The sixth diode D6 has an anode and a cathode, wherein the anode of the sixth diode D6 is coupled to the ninth node N9, and the cathode of the sixth diode D6 is coupled to the output node NOUT. The seventh diode D7 has an anode and a cathode, wherein the anode of the seventh diode D7 is coupled to the tenth node N10, and the cathode of the seventh diode D7 is coupled to the output node NOUT. The second capacitor C2 has a first terminal and a second terminal, wherein the first terminal of the second capacitor C2 is coupled to the output node NOUT, and the second terminal of the second capacitor C2 is coupled to the common node NCM.

The detection and control circuit 270 includes a first AND gate 272 , a second AND gate 274 , a pulse width modulation integrated circuit (PWM IC) 276 , and a microcontroller unit (MCU) 278 .

The first AND gate 272 has a first input terminal, a second input terminal, and an output terminal, wherein the first input terminal of the first AND gate 272 is used to receive the second driving potential VG2, the second input terminal of the first AND gate 272 is used to receive the output potential VOUT, and the output terminal of the first AND gate 272 is used to output a first logic potential VL1. For example, if both the second drive potential VG2 and the output potential VOUT are high logic levels, the first AND gate 272 will be able to output the first logic potential VL1 with a high logic level; conversely, if either the second drive potential VG2 or the output potential VOUT is a low logic level, the first AND gate 272 will be able to output the first logic potential VL1 with a low logic level.

The second AND gate 274 has a first input terminal, a second input terminal, and an output terminal, wherein the first input terminal of the second AND gate 274 is used to receive the third driving potential VG3, the second input terminal of the second AND gate 274 is used to receive the output potential VOUT, and the output terminal of the second AND gate 274 is used to output a second logic potential VL2. For example, if both the third driving potential VG3 and the output potential VOUT are high logic levels, the second AND gate 274 will be able to output the second logic potential VL2 with a high logic level; conversely, if either the third driving potential VG3 or the output potential VOUT is a low logic level, the second AND gate 274 will be able to output the second logic potential VL2 with a low logic level.

The pulse width modulation integrated circuit 276 can generate a first driving potential VG1. The microcontroller 278 is coupled to the pulse width modulation integrated circuit 276, wherein the microcontroller 278 can generate a second driving potential VG2 and a third driving potential VG3. For example, the second driving potential VG2 and the third driving potential VG3 can have complementary logic levels.

The microcontroller 278 is coupled to the first terminal and the second terminal of the sensing resistor RS and can be controlled by the first AND gate 272 and the second AND gate 274. In detail, the microcontroller 278 can further monitor the potential difference ΔV according to the first logic potential VL1 and the second logic potential VL2.

In some embodiments, if the first logic potential VL1 has a high logic level, the microcontroller 278 will obtain a first peak potential difference VD1 across the sensing resistor RS. For example, during the period when the first logic potential VL1 has a high logic level, the first peak potential difference VD1 may be equal to the highest value of the potential difference ΔV, but is not limited thereto.

In some embodiments, if the second logic potential VL2 has a high logic level, the microcontroller 278 will obtain a second peak potential difference VD2 across the sensing resistor RS. For example, during the period when the second logic potential VL2 has a high logic level, the second peak potential difference VD2 may be equal to the lowest value of the potential difference ΔV described above, but is not limited thereto. Then, the microcontroller 278 may also compare the absolute value of the first peak potential difference VD1 with the absolute value of the second peak potential difference VD2, and the detailed operation method may be described in the following embodiment.

FIG. 3 is a potential waveform diagram of the power supply 200 according to an embodiment of the present invention operating in a balanced mode, wherein the horizontal axis represents time (s) and the vertical axis represents each potential level (V). In the embodiment of FIG. 3, if the first peak potential difference VD1 and the second peak potential difference VD2 have equal absolute values ( ), the microcontroller 278 will determine that the power supply 200 has provided balanced resonant energy (i.e., balanced mode). At this time, the microcontroller 278 will also notify the pulse width modulation integrated circuit 276 so that the pulse width modulation integrated circuit 276 can generate a control potential VC with a high logic level.

FIG. 4 is a potential waveform diagram of the power supply 200 according to an embodiment of the present invention operating in an unbalanced mode, wherein the horizontal axis represents time (s) and the vertical axis represents each potential level (V). In the embodiment of FIG. 4, if the first peak potential difference VD1 and the second peak potential difference VD2 have different absolute values ( ), the microcontroller 278 will determine that the power supply 200 is providing unbalanced resonant energy (i.e., unbalanced mode). At this time, the microcontroller 278 will also notify the pulse width modulation integrated circuit 276, so that the pulse width modulation integrated circuit 276 further outputs a warning potential VA and can generate a control potential VC with a low logic level.

FIG. 5 is a schematic diagram showing a system end 290 according to an embodiment of the present invention. The system end 290 includes a main circuit board 292 and an embedded controller (EC) 294. The output potential VOUT of the power supply 200 can provide power to the main circuit board 292. In addition, when the warning potential VA is received, the embedded controller 294 will detect the unbalance problem of the power supply 200. Therefore, the system end 290 can be fully prepared for the abnormal voltage oscillation that is about to occur in the power supply 200 based on the detection and notification of the embedded controller 294.

FIG. 6 is a potential waveform diagram showing the power supply 200 according to an embodiment of the present invention switching from a balanced mode to an unbalanced mode, wherein the horizontal axis represents time (s) and the vertical axis represents each potential level (V). As shown in FIG. 6 , before a specific time point TS, the power supply 200 is operated in a balanced mode. Then, after the specific time point TS, the microcontroller 278 can switch the control potential VC from a high logic level to a low logic level, thereby completely shutting down the power supply 200. It must be noted that the design method proposed by the present invention will effectively prevent the power supply 200 from providing an unstable output potential VOUT.

The present invention proposes a novel power supply. According to actual measurement results, the output stability of the power supply using the above design can be greatly improved, so it is very suitable for application in various types of devices.

It is worth noting that the potential, current, resistance, inductance, capacitance, and other component parameters described above are not limiting conditions of the present invention. Designers can adjust these settings according to different needs. The power supply of the present invention is not limited to the states shown in Figures 1-6. The present invention may only include any one or more features of any one or more embodiments of Figures 1-6. In other words, not all of the features shown in the diagrams need to be implemented in the power supply of the present invention at the same time. Although the embodiments of the present invention use metal oxide semi-conductor field effect transistors as an example, the present invention is not limited to this. People in the technical field can use other types of transistors, such as junction field effect transistors, or fin field effect transistors, etc., without affecting the effects of the present invention.

Ordinal numbers in this specification and the scope of the patent application, such as "first", "second", "third", etc., have no sequential relationship with each other, and are only used to mark and distinguish two different components with the same name.

Although the present invention is disclosed as above with the preferred embodiments, it is not intended to limit the scope of the present invention. Anyone skilled in the art can make some changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the scope defined by the attached patent application.

100,200: Power supply 110,210: Bridge rectifier 120,220: Power switch 130,230: First output stage circuit 140,240: Switching circuit 150,250: Transformer 151,251: Main coil 152,252: First secondary coil 153,253: Second secondary coil 160,260: Second output stage circuit 170,270: Detection and control circuit 272: First gate 274: Second gate 276: Pulse width modulation integrated circuit 278: Microcontroller 290: System side 292: Main circuit board 294: Embedded controller C1: First capacitor C2: Second capacitor CR: Resonance capacitor D1: First diode D2: Second diode D3: Third diode D4: Fourth diode D5: Fifth diode D6: Sixth diode D7: Seventh diode LM: Excitation inductor LR: Leakage inductor LU: Boost inductor M1: First transistor M2: Second transistor M3: Third transistor M4: Fourth transistor N1: First node N2: Second node N3: Third node N4: Fourth node N5: Fifth node N6: Sixth node N7: Seventh node N8: Eighth node N9: Ninth node N10: Tenth node NCM: Common node NIN1: First input node NIN2: Second input node NOUT: Output node RS: Sense resistor TS: Specific time point VA: Warning potential VC: Control potential VD1: First peak potential difference VD2: Second peak potential difference VE: Middle potential VG1: First drive potential VG2: Second drive potential VG3: Third drive potential VIN1: First input potential VIN2: Second input potential VL1: First logic potential VL2: Second logic potential VOUT: Output potential VR: Rectification potential VSS: Ground potential VW: Switching potential ΔV: Potential difference

FIG. 1 is a schematic diagram showing a power supply according to an embodiment of the present invention. FIG. 2 is a circuit diagram showing a power supply according to an embodiment of the present invention. FIG. 3 is a potential waveform diagram showing a power supply according to an embodiment of the present invention operating in a balanced mode. FIG. 4 is a potential waveform diagram showing a power supply according to an embodiment of the present invention operating in an unbalanced mode. FIG. 5 is a schematic diagram showing a system end according to an embodiment of the present invention. FIG. 6 is a potential waveform diagram showing a power supply according to an embodiment of the present invention switching from a balanced mode to an unbalanced mode.

100: Power supply

110: Bridge rectifier

120: Power switch

130: First output stage circuit

140: Switching circuit

150: Transformer

151: Main coil

152: First coil

153: Second coil

160: Second output stage circuit

170: Detection and control circuit

CR: Resonance capacitor

LM: Magnetizing inductor

LR: Leakage Inductor

LU: Boost Inductor

RS: Sensing resistor

VC: control potential

VD1: first peak potential difference

VD2: Second peak potential difference

VE: intermediate potential

VG1: first driving potential

VG2: Second driving potential

VG3: The third driving potential

VIN1: first input potential

VIN2: Second input potential

VOUT: output voltage

VR: Rectification potential

VSS: ground potential

VW: Switching potential

Claims (10)

A power supply with high output stability, comprising: A bridge rectifier, generating a rectified potential according to a first input potential and a second input potential; A boost inductor, receiving the rectified potential; A power switch, selectively coupling the boost inductor to a ground potential according to a first drive potential; A first output stage circuit, coupled to the boost inductor, wherein the first output stage circuit determines whether to generate an intermediate potential according to a control potential; A switching circuit, generating all switching potentials according to the intermediate potential, a second drive potential, and a third drive potential; A transformer includes a main coil, a first secondary coil, and a second secondary coil, wherein the transformer has a built-in leakage inductor and an excitation inductor, and the main coil receives the switching potential through the leakage inductor; a resonant capacitor coupled to the excitation inductor; a sensing resistor coupled to the resonant capacitor; a second output stage circuit coupled to the first secondary coil and the second secondary coil and generating an output potential; and a detection and control circuit detecting a first peak potential difference and a second peak potential difference across the sensing resistor, wherein the detection and control circuit further generates the control potential, the first drive potential, the second drive potential, and the third drive potential according to the first peak potential difference and the second peak potential difference. A power supply as described in claim 1, wherein the bridge rectifier comprises: a first diode having an anode and a cathode, wherein the anode of the first diode is coupled to a first input node to receive the first input potential, and the cathode of the first diode is coupled to a first node to output the rectified potential; a second diode having an anode and a cathode, wherein the anode of the second diode is coupled to a second input node to receive the second input potential, and the cathode of the second diode is coupled to the first node; A third diode having an anode and a cathode, wherein the anode of the third diode is coupled to the ground potential, and the cathode of the third diode is coupled to the first input node; and A fourth diode having an anode and a cathode, wherein the anode of the fourth diode is coupled to the ground potential, and the cathode of the fourth diode is coupled to the second input node; wherein the boost inductor has a first end and a second end, the first end of the boost inductor is coupled to the first node to receive the rectified potential, and the second end of the boost inductor is coupled to a second node. A power supply as described in claim 2, wherein the power switch comprises: A first transistor having a control end, a first end, and a second end, wherein the control end of the first transistor is used to receive the first driving potential, the first end of the first transistor is coupled to the ground potential, and the second end of the first transistor is coupled to the second node. A power supply as described in claim 2, wherein the first output stage circuit comprises: a fifth diode having an anode and a cathode, wherein the anode of the fifth diode is coupled to the second node, and the cathode of the fifth diode is coupled to a third node; a first capacitor having a first end and a second end, wherein the first end of the first capacitor is coupled to the third node, and the second end of the first capacitor is coupled to the ground potential; and a second transistor having a control end, a first end, and a second end, wherein the control end of the second transistor is used to receive the control potential, the first end of the second transistor is coupled to a fourth node to selectively output the intermediate potential, and the second end of the second transistor is coupled to the third node. A power supply as described in claim 4, wherein the switching circuit comprises: a third transistor having a control terminal, a first terminal, and a second terminal, wherein the control terminal of the third transistor is used to receive the second driving potential, the first terminal of the third transistor is coupled to a fifth node to output the switching potential, and the second terminal of the third transistor is coupled to the fourth node to receive the intermediate potential; and a fourth transistor having a control terminal, a first terminal, and a second terminal, wherein the control terminal of the fourth transistor is used to receive the third driving potential, the first terminal of the fourth transistor is coupled to the ground potential, and the second terminal of the fourth transistor is coupled to the fifth node. A power supply as described in claim 5, wherein the leakage inductor has a first end and a second end, the first end of the leakage inductor is coupled to the fifth node to receive the switching potential, the second end of the leakage inductor is coupled to a sixth node, the main coil has a first end and a second end, the first end of the main coil is coupled to the sixth node, the second end of the main coil is coupled to a seventh node, the excitation inductor has a first end and a second end, the first end of the excitation inductor is coupled to the sixth node, the second end of the excitation inductor is coupled to the seventh node, the resonant capacitor has a first end and a second end, the resonant capacitor The first end of the capacitor is coupled to the seventh node, the second end of the resonant capacitor is coupled to an eighth node, the sensing resistor has a first end and a second end, the first end of the sensing resistor is coupled to the eighth node, the second end of the sensing resistor is coupled to the ground potential, the first sub-coil has a first end and a second end, the first end of the first sub-coil is coupled to a ninth node, the second end of the first sub-coil is coupled to a common node, the second sub-coil has a first end and a second end, the first end of the second sub-coil is coupled to the common node, and the second end of the second sub-coil is coupled to a tenth node. A power supply as described in claim 6, wherein the second output stage circuit comprises: a sixth diode having an anode and a cathode, wherein the anode of the sixth diode is coupled to the ninth node, and the cathode of the sixth diode is coupled to an output node to output the output potential; a seventh diode having an anode and a cathode, wherein the anode of the seventh diode is coupled to the tenth node, and the cathode of the seventh diode is coupled to the output node; and a second capacitor having a first end and a second end, wherein the first end of the second capacitor is coupled to the output node, and the second end of the second capacitor is coupled to the common node. A power supply as described in claim 1, wherein the detection and control circuit comprises: a first AND gate having a first input terminal, a second input terminal, and an output terminal, wherein the first input terminal of the first AND gate is used to receive the second drive potential, the second input terminal of the first AND gate is used to receive the output potential, and the output terminal of the first AND gate is used to output a first logic potential; and a second AND gate having a first input terminal, a second input terminal, and an output terminal, wherein the first input terminal of the second AND gate is used to receive the third drive potential, the second input terminal of the second AND gate is used to receive the output potential, and the output terminal of the second AND gate is used to output a second logic potential. A power supply as described in claim 8, wherein the detection and control circuit further comprises: a pulse width modulation integrated circuit, generating the first drive potential; and a microcontroller, generating the second drive potential and the third drive potential; wherein if the first logic potential has a high logic level, the microcontroller will obtain the first peak potential difference across the sensing resistor; wherein if the second logic potential has a high logic level, the microcontroller will obtain the second peak potential difference across the sensing resistor. A power supply as described in claim 9, wherein if the first peak potential difference and the second peak potential difference have different absolute values, the microcontroller will notify the pulse width modulation integrated circuit, so that the pulse width modulation integrated circuit further outputs a warning potential and generates the control potential with a low logic level.

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