TWI885653B - Power supply device supporting power delivery - Google Patents

Abstract

A power supply device supporting PD (Power Delivery) includes a bridge rectifier, a transformer, a power switch element, an output stage circuit, a PD IC (Integrated Circuit), a light generation circuit, and a detection and control circuit. If the PD IC receives an indication voltage, the PD IC can notify the detection and control circuit, such that the detection and control circuit can perform a discharge operation on the output stage circuit and control the light generation circuit to provide an indication light.

Description

Power supply supporting power transmission

The present invention relates to a power supply, and in particular to a power supply supporting power delivery (PD).

The power supply is an indispensable component in the field of laptop computers. However, when the power supply connector is unplugged, a momentary high-voltage arc is often generated, which will cause safety problems. In view of this, it is necessary to propose a new solution to overcome the difficulties faced by previous technologies.

In a preferred embodiment, the present invention provides a power supply supporting power transmission, comprising: a bridge rectifier, generating a rectified potential according to a first input potential and a second input potential; a transformer, comprising a main coil and a secondary coil, wherein the main coil is used to receive the rectified potential, and the secondary coil is used to generate an induced potential; a power switch, selectively coupling the main coil to a ground potential according to a clock potential; an output stage circuit, The sense potential and a first control potential are used to generate an output potential; a power transmission integrated circuit; a light generating circuit; and a detection and control circuit, which generates the clock potential and the first control potential; wherein if the power transmission integrated circuit receives an indication potential, the power transmission integrated circuit notifies the detection and control circuit, so that the detection and control circuit will perform a discharge operation on the output stage circuit and control the light generating circuit to provide an indication light.

In some embodiments, the bridge rectifier includes: a first diode having an anode and a cathode, wherein the anode of the first diode is coupled to a first input node to receive the first input potential, and the cathode of the first diode is coupled to a first node to output the rectified potential; a second diode having an anode and a cathode, wherein the anode of the second diode is coupled to a second input node to receive the second input potential , and the cathode of the second diode is coupled to the first node; a third diode having an anode and a cathode, wherein the anode of the third diode is coupled to the ground potential, and the cathode of the third diode is coupled to the first input node; and a fourth diode having an anode and a cathode, wherein the anode of the fourth diode is coupled to the ground potential, and the cathode of the fourth diode is coupled to the second input node.

In some embodiments, the transformer further has a built-in excitation inductor, the main coil has a first end and a second end, the first end of the main coil is coupled to the first node to receive the rectified potential, the second end of the main coil is coupled to a second node, the excitation inductor has a first end and a second end, the first end of the excitation inductor is coupled to the first node, the second end of the excitation inductor is coupled to the second node, the secondary coil has a first end and a second end, the first end of the secondary coil is coupled to a third node to output the induced potential, and the second end of the secondary coil is coupled to a common node.

In some embodiments, the power switch includes: a first transistor having a control terminal, a first terminal, and a second terminal, wherein the control terminal of the first transistor is used to receive the clock potential, the first terminal of the first transistor is coupled to the ground potential, and the second terminal of the first transistor is coupled to the second node.

In some embodiments, the output stage circuit includes: a fifth diode having an anode and a cathode, wherein the anode of the fifth diode is coupled to the third node to receive the induced potential, and the cathode of the fifth diode is coupled to a fourth node; a first capacitor having a first end and a second end, wherein the first end of the first capacitor is coupled to the fourth node, and the second end of the first capacitor is coupled to the common node; a second transistor having a control end, a first transistor having a second end, and a second transistor having a second end. a first terminal, and a second terminal, wherein the control terminal of the second transistor is coupled to a first control node to receive the first control potential, the first terminal of the second transistor is coupled to an output node to selectively output the output potential, and the second terminal of the second transistor is coupled to the fourth node; and a second capacitor having a first terminal and a second terminal, wherein the first terminal of the second capacitor is coupled to the output node, and the second terminal of the second capacitor is coupled to the common node.

In some embodiments, the detection and control circuit includes: a microcontroller, generating the clock potential and a reference potential; wherein the power transmission integrated circuit has a communication pin and a CC (Configuration Channel) pin, and if the communication pin receives the indication potential, the power transmission integrated circuit transmits a notification potential to the microcontroller; wherein the microcontroller further generates the first control potential, a second control potential, and a third control potential according to the notification potential and a logic potential.

In some embodiments, the light generating circuit includes: a third transistor having a control terminal, a first terminal, and a second terminal, wherein the control terminal of the third transistor is used to receive the third control potential, the first terminal of the third transistor is coupled to a fifth node, and the second terminal of the third transistor is used to receive the second control potential; a light emitting diode module coupled between the fifth node and a sixth node, wherein the light emitting diode module selectively generates the indicator light; and a first resistor having a first terminal and a second terminal, wherein the first terminal of the first resistor is coupled to the sixth node, and the second terminal of the first resistor is coupled to the common node.

In some embodiments, the detection and control circuit further includes: a fourth transistor having a control terminal, a first terminal, and a second terminal, wherein the control terminal of the fourth transistor is used to receive the second control potential, the first terminal of the fourth transistor is coupled to a seventh node, and the second terminal of the fourth transistor is coupled to the output node; and a second resistor having a first terminal and a second terminal, wherein the first terminal of the second resistor is coupled to the seventh node, and the second terminal of the second resistor is coupled to the common node.

In some embodiments, the detection and control circuit further includes: a fifth transistor having a control terminal, a first terminal, and a second terminal, wherein the control terminal of the fifth transistor is used to receive the second control potential, the first terminal of the fifth transistor is coupled to the common node, and the second terminal of the fifth transistor is coupled to the first control node; and a sixth transistor having a control terminal, a first terminal, and a second terminal, wherein the control terminal of the sixth transistor is used to receive the second control potential, the first terminal of the sixth transistor is coupled to the common node, and the second terminal of the sixth transistor is coupled to the CC pin.

In some embodiments, the detection and control circuit further includes: a comparator having a positive input terminal, a negative input terminal, and an output terminal, wherein the positive input terminal of the comparator is used to receive the reference potential, the negative input terminal of the comparator is coupled to the seventh node, and the output terminal of the comparator is used to output a comparison potential; and an AND gate having a first input terminal, a second input terminal, and an output terminal, wherein the first input terminal of the AND gate is used to receive the second control potential, the second input terminal of the AND gate is used to receive the comparison potential, and the output terminal of the AND gate is used to output the logic potential.

100,200: Power supply

110,210: Bridge rectifier

120,220: Transformer

121,221: Main loop

122,222: Secondary coil

130,230: Power switch

140,240: Output stage circuit

150,250,296: Power transmission integrated circuit

160,260: Light generating circuit

170,270: Detection and control circuit

251: Communication pins of power transmission integrated circuit

252: CC pin of power transmission integrated circuit

265: LED module

272:Microcontroller

274: Comparator

276: And the gate

290: System side

292: Main circuit board

294:Embedded Controller

C1: First capacitor

C2: Second capacitor

D1: First diode

D2: Second diode

D3: The third diode

D4: The fourth second pole

D5: The fifth diode

LM: Magnetizing inductor

LT: indicator light

M1: first transistor

M2: Second transistor

M3: The third transistor

M4: The fourth transistor

M5: The fifth transistor

M6: The sixth transistor

N1: First node

N2: Second node

N3: The third node

N4: The fourth node

N5: Fifth Node

N6: Node 6

N7: Seventh Node

NC1: First control node

NC2: Second control node

NC3: Third control node

NCM: Common Node

NIN1: first input node

NIN2: Second input node

NOUT: output node

R1: First resistor

R2: Second resistor

T1: First time point

T2: Second time point

VA: pulse potential

VB: Comparative potential

VC1: first control potential

VC2: Second control potential

VC3: The third control potential

VCC:CC potential

VF: reference potential

VIN1: first input potential

VIN2: Second input potential

VL: logic potential

VN: Notification voltage

VOUT: output voltage

VR: Rectification potential

VS: Induction potential

VSS: ground potential

VT: Indicator potential

Figure 1 is a schematic diagram showing a power supply according to an embodiment of the present invention.

Figure 2 shows a circuit diagram of a power supply according to an embodiment of the present invention.

Figure 3 is a schematic diagram showing a system end according to an embodiment of the present invention.

Figure 4 shows the signal waveform of the power supply according to an embodiment of the present invention.

In order to make the purpose, features and advantages of the present invention more clearly understood, the following specifically lists the specific embodiments of the present invention and describes them in detail with the accompanying drawings.

Certain terms are used in the specification and patent application to refer to specific components. Those skilled in the art should understand that hardware manufacturers may use different terms to refer to the same component. This specification and patent application do not use differences in names as a way to distinguish components, but use differences in the functions of components as the criterion for distinction. The words "include" and "including" mentioned throughout the specification and patent application are open terms and should be interpreted as "including but not limited to". The word "substantially" means that within an acceptable error range, those skilled in the art can solve the technical problem within a certain error range and achieve the basic technical effect. In addition, the word "coupled" in this specification includes any direct and indirect electrical connection means. Therefore, if the text describes a first device coupled to a second device, it means that the first device can be directly electrically connected to the second device, or indirectly electrically connected to the second device via other devices or connection means.

FIG. 1 is a schematic diagram showing a power supply 100 according to an embodiment of the present invention. For example, the power supply 100 can be applied to a desktop computer, a laptop computer, or an all-in-one computer. As shown in FIG. 1, the power supply 100 includes: a bridge rectifier 110, a transformer 120, a power switch 130, an output stage circuit 140, a power delivery integrated circuit (PD IC) 150, a light generation circuit 160, and a detection and control circuit 170. It should be noted that, although not shown in FIG. 1, the power supply 100 may further include other components, such as: a voltage regulator or (and) a negative feedback circuit.

The bridge rectifier 110 can generate a rectified potential VR according to a first input potential VIN1 and a second input potential VIN2, wherein an AC voltage with any frequency and any amplitude can be formed between the first input potential VIN1 and the second input potential VIN2. For example, the frequency of the AC voltage can be about 50 Hz or 60 Hz, and the root mean square (RMS) value of the AC voltage can be between 90 V and 264 V, but is not limited thereto. The transformer 120 includes a main coil 121 and a secondary coil 122, wherein the main coil 121 can be located on one side of the transformer 120, and the secondary coil 122 can be located on the other side of the transformer 120. The main coil 121 can be used to receive the rectified potential VR, and in response, the secondary coil 122 can be used to generate an induced potential VS. The power switch 130 can selectively couple the main coil 121 to a ground potential VSS (eg, 0V) according to a clock potential VA. For example, if the clock potential VA is a high logic level (i.e., logic "1"), the power switch 130 can couple the main coil 121 to the ground potential VSS (i.e., the power switch 130 can be similar to a short circuit path); conversely, if the clock potential VA is a low logic level (i.e., logic "0"), the power switch 130 will not couple the main coil 121 to the ground potential VSS (i.e., the power switch 130 can be similar to a break path). The output stage circuit 140 can generate an output potential VOUT according to the sensed potential VS and a first control potential VC1. For example, the output potential VOUT can be a DC potential, and its potential level can be between 18V and 22V, but is not limited thereto. The detection and control circuit 170 can generate a clock potential VA and a first control potential VC1. If the power transmission integrated circuit 150 receives an indication potential VT, the power transmission integrated circuit 150 can notify the detection and control circuit 170. For example, the indication potential VT can be sent by a system terminal (not shown), which can be regarded as a pull-out instruction and can be used to indicate that the system terminal will no longer be coupled to the power supply 100. In response to the notification of the power transmission integrated circuit 150, the detection and control circuit 170 can perform a discharge operation on the output stage circuit 140 and control the light generation circuit 160 to provide an indication light LT. Under this design, the power supply 100 of the present invention can support the function of power transmission, wherein the user can confirm whether the output voltage VOUT has been successfully discharged by observing the indicator light LT, thereby improving the overall safety and convenience of use. According to actual measurement results, the power supply 100 can greatly reduce the probability of accidentally causing a high-voltage arc.

The following embodiments will introduce the detailed structure and operation of the power supply 100. It must be understood that these figures and descriptions are only examples and are not intended to limit the scope of the present invention.

FIG. 2 is a circuit diagram of a power supply 200 according to an embodiment of the present invention. In the embodiment of FIG. 2, the power supply 200 has a first input node NIN1, a second input node NIN2, and an output node NOUT, and includes a bridge rectifier 210, a transformer 220, a power switch 230, an output stage circuit 240, a power transmission integrated circuit 250, a light generating circuit 260, and a detection and control circuit 270. The first input node NIN1 and the second input node NIN2 of the power supply 200 can receive a first input potential VIN1 and a second input potential VIN2 from an external input power source (not shown), respectively. The output node NOUT of the power supply 200 can be used to output an output potential VOUT to a system end (not shown), such as a notebook computer.

The bridge rectifier 210 includes a first diode D1, a second diode D2, a third diode D3, and a fourth diode D4. The first diode D1 has an anode and a cathode, wherein the anode of the first diode D1 is coupled to the first input node NIN1, and the cathode of the first diode D1 is coupled to a first node N1 to output a rectified potential VR. The second diode D2 has an anode and a cathode, wherein the anode of the second diode D2 is coupled to the second input node NIN2, and the cathode of the second diode D2 is coupled to the first node N1. The third diode D3 has an anode and a cathode, wherein the anode of the third diode D3 is coupled to a ground potential VSS, and the cathode of the third diode D3 is coupled to the first input node NIN1. The fourth diode D4 has an anode and a cathode, wherein the anode of the fourth diode D4 is coupled to the ground potential VSS, and the cathode of the fourth diode D4 is coupled to the second input node NIN2.

The transformer 220 includes a main coil 221 and a secondary coil 222, wherein the transformer 220 may further have a built-in excitation inductor LM. The excitation inductor LM may be an inherent component that is produced when the transformer 220 is manufactured, and it is not an external independent component. The main coil 221 and the excitation inductor LM may be located on the same side of the transformer 220 (e.g., the primary side), and the secondary coil 222 may be located on the other side of the transformer 220 (e.g., the secondary side, which may be isolated from the primary side). In detail, the main coil 221 has a first end and a second end, wherein the first end of the main coil 221 is coupled to the first node N1 to receive the rectified potential VR, and the second end of the main coil 221 is coupled to a second node N2. The excitation inductor LM has a first end and a second end, wherein the first end of the excitation inductor LM is coupled to the first node N1, and the second end of the excitation inductor LM is coupled to the second node N2. The secondary coil 222 has a first end and a second end, wherein the first end of the secondary coil 222 is coupled to a third node N3 to output an induced potential VS, and the second end of the secondary coil 222 is coupled to a common node NCM. For example, the common node NCM can provide a common potential, which can be regarded as another ground potential, and can be the same as or different from the aforementioned ground potential VSS.

The power switch 230 includes a first transistor M1. For example, the first transistor M1 may be an N-type metal-oxide-semiconductor field-effect transistor (NMOSFET). The first transistor M1 has a control terminal (e.g., a gate), a first terminal (e.g., a source), and a second terminal (e.g., a drain), wherein the control terminal of the first transistor M1 is used to receive a clock potential VA, the first terminal of the first transistor M1 is coupled to the ground potential VSS, and the second terminal of the first transistor M1 is coupled to the second node N2.

The output stage circuit 240 includes a second transistor M2, a fifth diode D5, a first capacitor C1, and a second capacitor C2. For example, the second transistor M2 can be an N-type metal oxide semi-conductor field effect transistor. The fifth diode D5 has an anode and a cathode, wherein the anode of the fifth diode D5 is coupled to the third node N3 to receive the induced potential VS, and the cathode of the fifth diode D5 is coupled to a fourth node N4. The first capacitor C1 has a first end and a second end, wherein the first end of the first capacitor C1 is coupled to the fourth node N4, and the second end of the first capacitor C1 is coupled to the common node NCM. The second transistor M2 has a control terminal (e.g., a gate), a first terminal (e.g., a source), and a second terminal (e.g., a drain), wherein the control terminal of the second transistor M2 is coupled to a first control node NC1 to receive a first control potential VC1, the first terminal of the second transistor M2 is coupled to the output node NOUT, and the second terminal of the second transistor M2 is coupled to the fourth node N4. The second capacitor C2 has a first terminal and a second terminal, wherein the first terminal of the second capacitor C2 is coupled to the output node NOUT, and the second terminal of the second capacitor C2 is coupled to the common node NCM. In some embodiments, the output stage circuit 240 can be used to selectively output the aforementioned output potential VOUT. For example, if the first control potential VC1 is a high logic level, the second transistor M2 will be enabled, and the output stage circuit 240 will be able to normally output the aforementioned output potential VOUT; conversely, if the first control potential VC1 is a low logic level, the second transistor M2 will be disabled, and the output stage circuit 240 will stop outputting the aforementioned output potential VOUT.

The detection and control circuit 270 includes at least a microcontroller unit (MCU) 272, which can be used to generate a clock potential VA and a reference potential VF. For example, the clock potential VA can be a pulse width modulation (PWM) potential, and the reference potential VF can be a DC potential.

The power transmission integrated circuit 250 has a communication pin 251 and a configuration channel pin 252 (hereinafter referred to as "CC pin"). If the communication pin 251 receives an indication potential VT, the power transmission integrated circuit 250 can transmit a notification potential VN to the microcontroller 272. In some embodiments, the power supply 200 can support the USB (Universal Serial Bus) Type-C specification. For example, when the power supply 200 is coupled to a system terminal, the power transmission integrated circuit 250 can output a fixed current to the CC pin 252, and can then receive a CC potential VCC from the system terminal through the CC pin 252. In some embodiments, the power transmission integrated circuit 250 can estimate the operating state of the system end and the instantaneous level of the output potential VOUT by analyzing the CC potential VCC, but is not limited thereto.

In addition, the microcontroller 272 can also generate a first control potential VC1, a second control potential VC2, and a third control potential VC3 according to the notification potential VN and a logic potential VL. For example, the microcontroller 272 can output the first control potential VC1 to the first control node NC1, the second control potential VC2 to the second control node NC2, and the third control potential VC3 to the third control node NC3.

The light generating circuit 260 includes a light emitting diode (LED) module 265, a third transistor M3, and a first resistor R1. For example, the third transistor M3 may be an N-type metal oxide semi-conductor field effect transistor. The third transistor M3 has a control terminal (e.g., a gate), a first terminal (e.g., a source), and a second terminal (e.g., a drain), wherein the control terminal of the third transistor M3 is coupled to the third control node NC3 to receive the third control potential VC3, the first terminal of the third transistor M3 is coupled to a fifth node N5, and the second terminal of the third transistor M3 is coupled to the second control node NC2 to receive the second control potential VC2. The light emitting diode module 265 may include a plurality of light emitting diodes coupled in series with each other. The LED module 265 is coupled between the fifth node N5 and a sixth node N6, wherein the LED module 265 can selectively generate an indicator light LT. The first resistor R1 has a first end and a second end, wherein the first end of the first resistor R1 is coupled to the sixth node N6, and the second end of the first resistor R1 is coupled to the common node NCM.

In addition, the detection and control circuit 270 may further include a comparator 274, an AND gate 276, a fourth transistor M4, a fifth transistor M5, a sixth transistor M6, and a second resistor R2. For example, the fourth transistor M4, the fifth transistor M5, and the sixth transistor M6 may each be an N-type metal oxide semi-conductor field effect transistor.

The fourth transistor M4 has a control terminal (e.g., a gate), a first terminal (e.g., a source), and a second terminal (e.g., a drain), wherein the control terminal of the fourth transistor M4 is coupled to the second control node NC2 to receive the second control potential VC2, the first terminal of the fourth transistor M4 is coupled to a seventh node N7, and the second terminal of the fourth transistor M4 is coupled to the output node NOUT. The second resistor R2 has a first terminal and a second terminal, wherein the first terminal of the second resistor R2 is coupled to the seventh node N7, and the second terminal of the second resistor R2 is coupled to the common node NCM. In some embodiments, the combination of the fourth transistor M4 and the second resistor R2 can be regarded as a discharge circuit of the detection and control circuit 270, which can be used to perform a discharge operation.

The fifth transistor M5 has a control end (e.g., a gate), a first end (e.g., a source), and a second end (e.g., a drain), wherein the control end of the fifth transistor M5 is coupled to the second control node NC2 to receive the second control potential VC2, the first end of the fifth transistor M5 is coupled to the common node NCM, and the second end of the fifth transistor M5 is coupled to the first control node NC1. The sixth transistor M6 has a control terminal (e.g., a gate), a first terminal (e.g., a source), and a second terminal (e.g., a drain), wherein the control terminal of the sixth transistor M6 is coupled to the second control node NC2 to receive the second control potential VC2, the first terminal of the sixth transistor M6 is coupled to the common node NCM, and the second terminal of the sixth transistor M6 is coupled to the CC pin 252 of the power transmission integrated circuit 250.

The comparator 274 has a positive input terminal, a negative input terminal, and an output terminal, wherein the positive input terminal of the comparator 274 is used to receive the reference potential VF, the negative input terminal of the comparator 274 is coupled to the seventh node N7, and the output terminal of the comparator 274 is used to output a comparison potential VB. For example, if the reference potential VF is higher than or equal to the potential at the seventh node N7, the comparator 274 will output a comparison potential VB with a high logic level; conversely, if the reference potential VF is lower than the potential at the seventh node N7, the comparator 274 will output a comparison potential VB with a low logic level.

The AND gate 276 has a first input terminal, a second input terminal, and an output terminal, wherein the first input terminal of the AND gate 276 is coupled to the second control node NC2 to receive the second control potential VC2, the second input terminal of the AND gate 276 is used to receive the comparison potential VB, and the output terminal of the AND gate 276 is used to output the logic potential VL to the microcontroller 272. For example, only when the second control potential VC2 and the comparison potential VB are both high logic levels, the AND gate 276 will output the logic potential VL with a high logic level; otherwise, the AND gate 276 will output the logic potential VL with a low logic level.

FIG. 3 is a schematic diagram showing a system end 290 according to an embodiment of the present invention. It must be understood that the system end 290 is an external device and is not part of the power supply 200. In the embodiment of FIG. 3, the system end 290 includes a main circuit board 292, an embedded controller (EC) 294, and a power transmission integrated circuit 296, wherein the embedded controller 294 and the power transmission integrated circuit 296 can be arranged on the main circuit board 292. The main circuit board 292 can be powered by the output potential VOUT of the power supply 200. The embedded controller 294 is coupled to the communication pin 251 of the power transmission integrated circuit 250 of the power supply 200. If the power supply 200 is to be unplugged (i.e., the power supply 200 will no longer be coupled to the system terminal 290), the embedded controller 294 will transmit an indication potential VT to the communication pin 251 of the power transmission integrated circuit 250 of the power supply 200. In addition, the power transmission integrated circuit 296 is coupled to the CC pin 252 of the power transmission integrated circuit 250 of the power supply 200.

FIG. 4 shows a signal waveform diagram of the power supply 200 according to an embodiment of the present invention, wherein the horizontal axis represents time (s) and the vertical axis represents the potential level (V). Initially, the power supply 200 is coupled to the system terminal 290. Please refer to FIGS. 2, 3, and 4 together to understand the operating principle of the present invention.

At a first time point T1, the power transmission integrated circuit 250 of the power supply 200 receives an indication potential VT from the system terminal 290, which indicates that the power supply 200 is about to be unplugged. At this time, the power transmission integrated circuit 250 stops transmitting any CC potential VCC to the system terminal 290, and transmits a notification potential VN to the microcontroller 272. In response to the notification potential VN, the microcontroller 272 can output a second control potential VC2 with a high logic level to enable the fourth transistor M4, the fifth transistor M5, and the sixth transistor M6 at the same time.

In detail, the output potential VOUT at the output node NOUT can be discharged through the enabled fourth transistor M4 and the second resistor R2. Therefore, the output potential VOUT will decrease rapidly. The enabled fifth transistor M5 will pull down the first control potential VC1 at the first control node NC1, so that the second transistor M2 will be disabled. In addition, the enabled sixth transistor M6 can ensure that no signal can be transmitted on the CC pin 252 of the power transmission integrated circuit 250.

Then, at a second time point T2, the output potential VOUT has become lower than the reference potential VF, wherein the potential at the seventh node N7 may be substantially equal to the output potential VOUT. At this time, the comparator 274 outputs the comparison potential VB with a high logic level, so that the AND gate 276 will also output the logic potential VL with a high logic level. In response to the aforementioned logic potential VL, the microcontroller 272 will output the third control potential VC3 with a high logic level, so as to enable the third transistor M3 and the LED module 265. Since the LED module 265 provides an indicator light LT, the user can safely unplug the power supply 200 based on the indicator light LT. It must be noted that, under the premise that the output voltage VOUT has been successfully discharged, the power supply 200 will not easily generate any high-voltage arc accidentally, thereby greatly improving its overall safety of use.

The present invention proposes a novel power supply that can support the function of power transmission. According to actual measurement results, the power supply using the above design can effectively reduce the probability of accidental high-voltage arc occurrence, so it is very suitable for application in various types of devices.

It is worth noting that the potential, current, resistance, inductance, capacitance, and other component parameters described above are not limiting conditions of the present invention. Designers can adjust these settings according to different needs. The power supply of the present invention is not limited to the states shown in Figures 1-4. The present invention can include any one or more features of any one or more embodiments of Figures 1-4. In other words, not all the features shown in the diagrams must be implemented in the power supply of the present invention at the same time. Although the embodiments of the present invention use metal oxide semi-conductor field effect transistors as an example, the present invention is not limited to this. People in the art can use other types of transistors, such as junction field effect transistors, fin field effect transistors, etc., without affecting the effect of the present invention.

In this specification and the scope of the patent application, ordinal numbers, such as "first", "second", "third", etc., have no sequential relationship with each other and are only used to mark and distinguish two different components with the same name.

Although the present invention is disclosed as above with the preferred embodiment, it is not intended to limit the scope of the present invention. Anyone familiar with this technology can make some changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the scope defined in the attached patent application.

100: Power supply

110: Bridge rectifier

120: Transformer

121: Main coil

122: Secondary coil

130: Power switch

140: Output stage circuit

150: Power transmission integrated circuit

160: Light generating circuit

170: Detection and control circuit

LT: indicator light

VA: pulse potential

VC1: first control potential

VIN1: first input potential

VIN2: Second input potential

VOUT: output voltage

VR: Rectification potential

VS: Induction potential

VSS: ground potential

VT: Indicator potential

Claims (9)

A power supply supporting power transmission, comprising: a bridge rectifier, generating a rectified potential according to a first input potential and a second input potential; a transformer, comprising a main coil and a secondary coil, wherein the main coil is used to receive the rectified potential, and the secondary coil is used to generate an induced potential; a power switch, selectively coupling the main coil to a ground potential according to a clock potential; an output stage circuit, generating an output potential according to the induced potential and a first control potential; a power transmission integrated circuit; a light generating circuit; and a detection and control circuit, generating the clock potential and the first control potential; If the power transmission integrated circuit receives an indication potential, the power transmission integrated circuit notifies the detection and control circuit so that the detection and control circuit performs a discharge operation on the output stage circuit and controls the light generation circuit to provide an indication light; The indication potential comes from a system end and is regarded as a pull-out instruction; The detection and control circuit includes: A microcontroller that generates the clock potential and a reference potential; The power transmission integrated circuit has a communication pin and a CC (Configuration Channel) pin, and if the communication pin receives the indication potential, the power transmission integrated circuit transmits a notification potential to the microcontroller; The microcontroller further generates the first control potential, a second control potential, and a third control potential according to the notification potential and a logic potential. A power supply as described in claim 1, wherein the bridge rectifier comprises: a first diode having an anode and a cathode, wherein the anode of the first diode is coupled to a first input node to receive the first input potential, and the cathode of the first diode is coupled to a first node to output the rectified potential; a second diode having an anode and a cathode, wherein the anode of the second diode is coupled to a second input node to receive the second input potential, and the cathode of the second diode is coupled to the first node; A third diode having an anode and a cathode, wherein the anode of the third diode is coupled to the ground potential, and the cathode of the third diode is coupled to the first input node; and A fourth diode having an anode and a cathode, wherein the anode of the fourth diode is coupled to the ground potential, and the cathode of the fourth diode is coupled to the second input node. A power supply as described in claim 2, wherein the transformer further has a built-in excitation inductor, the main coil having a first end and a second end, the first end of the main coil being coupled to the first node to receive the rectified potential, the second end of the main coil being coupled to a second node, the excitation inductor having a first end and a second end, the first end of the excitation inductor being coupled to the first node, the second end of the excitation inductor being coupled to the second node, the secondary coil having a first end and a second end, the first end of the secondary coil being coupled to a third node to output the induced potential, and the second end of the secondary coil being coupled to a common node. A power supply as described in claim 3, wherein the power switch comprises: A first transistor having a control end, a first end, and a second end, wherein the control end of the first transistor is used to receive the clock potential, the first end of the first transistor is coupled to the ground potential, and the second end of the first transistor is coupled to the second node. A power supply as described in claim 4, wherein the output stage circuit comprises: a fifth diode having an anode and a cathode, wherein the anode of the fifth diode is coupled to the third node to receive the induced potential, and the cathode of the fifth diode is coupled to a fourth node; a first capacitor having a first end and a second end, wherein the first end of the first capacitor is coupled to the fourth node, and the second end of the first capacitor is coupled to the common node; A second transistor having a control terminal, a first terminal, and a second terminal, wherein the control terminal of the second transistor is coupled to a first control node to receive the first control potential, the first terminal of the second transistor is coupled to an output node to selectively output the output potential, and the second terminal of the second transistor is coupled to the fourth node; and A second capacitor having a first terminal and a second terminal, wherein the first terminal of the second capacitor is coupled to the output node, and the second terminal of the second capacitor is coupled to the common node. A power supply as described in claim 5, wherein the light generating circuit comprises: a third transistor having a control terminal, a first terminal, and a second terminal, wherein the control terminal of the third transistor is used to receive the third control potential, the first terminal of the third transistor is coupled to a fifth node, and the second terminal of the third transistor is used to receive the second control potential; a light-emitting diode module coupled between the fifth node and a sixth node, wherein the light-emitting diode module selectively generates the indicator light; and a first resistor having a first terminal and a second terminal, wherein the first terminal of the first resistor is coupled to the sixth node, and the second terminal of the first resistor is coupled to the common node. A power supply as described in claim 6, wherein the detection and control circuit further comprises: a fourth transistor having a control terminal, a first terminal, and a second terminal, wherein the control terminal of the fourth transistor is used to receive the second control potential, the first terminal of the fourth transistor is coupled to a seventh node, and the second terminal of the fourth transistor is coupled to the output node; and a second resistor having a first terminal and a second terminal, wherein the first terminal of the second resistor is coupled to the seventh node, and the second terminal of the second resistor is coupled to the common node. A power supply as described in claim 7, wherein the detection and control circuit further comprises: a fifth transistor having a control terminal, a first terminal, and a second terminal, wherein the control terminal of the fifth transistor is used to receive the second control potential, the first terminal of the fifth transistor is coupled to the common node, and the second terminal of the fifth transistor is coupled to the first control node; and a sixth transistor having a control terminal, a first terminal, and a second terminal, wherein the control terminal of the sixth transistor is used to receive the second control potential, the first terminal of the sixth transistor is coupled to the common node, and the second terminal of the sixth transistor is coupled to the CC pin. A power supply as described in claim 7, wherein the detection and control circuit further comprises: a comparator having a positive input terminal, a negative input terminal, and an output terminal, wherein the positive input terminal of the comparator is used to receive the reference potential, the negative input terminal of the comparator is coupled to the seventh node, and the output terminal of the comparator is used to output a comparison potential; and an AND gate having a first input terminal, a second input terminal, and an output terminal, wherein the first input terminal of the AND gate is used to receive the second control potential, the second input terminal of the AND gate is used to receive the comparison potential, and the output terminal of the AND gate is used to output the logic potential.

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