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TWI333265B - Window manufacture method of semiconductor package type printed circuit board - Google Patents

Window manufacture method of semiconductor package type printed circuit board Download PDF

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Publication number
TWI333265B
TWI333265B TW095135043A TW95135043A TWI333265B TW I333265 B TWI333265 B TW I333265B TW 095135043 A TW095135043 A TW 095135043A TW 95135043 A TW95135043 A TW 95135043A TW I333265 B TWI333265 B TW I333265B
Authority
TW
Taiwan
Prior art keywords
circuit board
printed circuit
mask
finger
semiconductor package
Prior art date
Application number
TW095135043A
Other languages
English (en)
Other versions
TW200816407A (en
Inventor
Chang-Bo Jung
Choon-Hwan Oh
Original Assignee
Simm Tech Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Simm Tech Co Ltd filed Critical Simm Tech Co Ltd
Publication of TW200816407A publication Critical patent/TW200816407A/zh
Application granted granted Critical
Publication of TWI333265B publication Critical patent/TWI333265B/zh

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/22—Secondary treatment of printed circuits
    • H05K3/24—Reinforcing the conductive pattern
    • H05K3/241—Reinforcing the conductive pattern characterised by the electroplating method; means therefor, e.g. baths or apparatus
    • H05K3/242—Reinforcing the conductive pattern characterised by the electroplating method; means therefor, e.g. baths or apparatus characterised by using temporary conductors on the printed circuit for electrically connecting areas which are to be electroplated
    • H10W70/60—
    • H10W70/05—
    • H10W70/68—
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/01—Dielectrics
    • H05K2201/0137—Materials
    • H05K2201/0166—Polymeric layer used for special processing, e.g. resist for etching insulating material or photoresist used as a mask during plasma etching
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0011—Working of insulating substrates or insulating layers
    • H05K3/0044—Mechanical working of the substrate, e.g. drilling or punching
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/06—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
    • H05K3/061—Etching masks
    • H05K3/064—Photoresists
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/22—Secondary treatment of printed circuits
    • H05K3/28—Applying non-metallic protective coatings
    • H10W42/20—

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing Of Printed Wiring (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Electroplating Methods And Accessories (AREA)
  • Wire Bonding (AREA)

Description

1333265 九、發明說明： 【發明所屬之技術領域】 針對半導體封裝用印刷電路板之製造方法，本發明涉及一 種半導體封裝用印刷電路板之窗口加工方法，通過在單面、雙 • 面、多層(Multi Layer)產品上下整體敷銅之基板上，通過顯影、 • 蝕刻及剝離形成電路，在除上述形成之電路之指狀焊片與焊盤 之外之部分形成絕緣層，通過鍍金用導線，在上述指狀焊片與 焊盤上鍍金形成鍍金/鍍鎳層，為去除在上述鍍金用導線及槽口 • 加工發生之金屬毛刺，在上述指狀焊片部分進行遮蓋後，進行 布線及剝離，從而能夠消除上述指狀焊片之金屬毛刺造成之電 氣乾擾，提高可靠性。 【先前技術】 圖一涉及以往半導體封裝用印刷電路板之製造方法。如上 述圖一所示，以往方法包括如下幾個步驟：顯影步驟，在敷銅 基板兩面壓附乾膜，除將形成指狀焊片之部分外，其餘部分均 暴露於外部。蝕刻步驟，去除在上述顯影步驟中暴露於外部之 鲁部分之銅’形成指狀焊片。退膜步驟，在上述银刻步驟中形成 指狀焊片後，去除上述壓附之乾膜。阻焊塗布步驟，使除通過 上述退膜步驟所形成之指狀焊片與焊盤之外之所有區域絕緣。 " 鍍金/鍍鎳步驟，在上雜㈣布步财暴露之指狀焊片與焊般 進行電鍍，形成鍍金/鍍鎳層。布線步驟，在上述鍵金/鍵^ 驟中進行鍍金後，加工形成印刷電路板之外形及槽口。 對於通過如上方法製造之半導體封裝件⑸
Chip)或 FBGA(Fine Pitch Ball Grid Array，猜細傾斜球狀網 列）板而言，引線接合區域排列於封裝件之中央在引線指狀产
片進行鍍金所需之鍍金線排列於中央。但县 曰T 一< 如圖二所示，在 6 1333265 上述“狀4片⑽上未塗布其它物質之情況下利用布線方法加 工槽口(3〇)時，上述指狀焊片（20)之鍍金線(1〇)被推動，發生金 屬毛郝G) ’上述金屬毛刺⑽)可能會接近或接觸與半導體芯片 導電連接<焊線’如果與鄰近之指狀焊片接觸 : 干擾，狀短路，導致印觀路板出現不良。 【發明内容】 …本發月正疋為解決上述問題而提出’其目的在;^提供一種 半導封裝用印刷電路板之窗口加工方法，在半導體封裝所使 #用之印刷電路板之製造步驟中，為防止在鐘金/鍵鎳後進行布線 加時41金，，泉向推向上述布線之加工方向之現象，在上述鍵 金/鍍鎳後’姻支持遮罩加工部位的鍍金線，防止發生金屬毛 刺。 【圖式簡單說明】 圖一顯π以往半物封裝用印刷電路板之製造方法之流 程圖。 圖一顯不以往半導體封裝用印刷電路板之製造方法中之 ^ 布線步驟之附圖。 圖-顯不本發明之半導體封裝用印刷電路板之窗 口加工 方法之流程圖。 圖四顯示本發明之半導體封裝用印刷電路板之窗口加工 方法中之遮罩塗布步驟之附圖。 圖玉顯*本發明之轉體封裝用印刷電路板之窗口加工 方法中之遮罩剝離步驟之附圖。 【實施方式】 本發明之半導體封裳用印刷電路板之製造方法可以減少因 去除印刷電路板之引線指狀焊片之鐘金導線及加工與半導體芯 7 1333265 以上說月本發明之有益實 請專所 = 況下’、具有本㈣㈣-賴者料断多種變更實施清 综上所述’本㈣㈣錄德加工方法中存=槽口加 刺之問題’在上述槽口加工部位排列之鍍金線 7止在上述槽口處發生分離，消除因布線加 以成^推祕象，可使上述金屬毛起之電氣干擾最小化， 可以顯著降低印刷電路板之不良率。 【主要元件符號說明】 10 鍍金線 20 指狀烊片 30 槽口 (窗口） 40 金屬毛刺 100 指狀焊片 110 鍍金線 120 遮罩 130 槽口 (窗口） 9

Claims (1)

  1. 申請專利範圍： 1. 一 種半導體封裝用印刷電路板之窗口加工方法，料不至於 生金屬毛刺之半導體封裝用印刷電路板之製造方法’其特 徵包括如下幾個步驟：顯影步驟，在敷銅基板兩_附， 除將形成指狀烊片之部分外，使其他部分均暴露於外部；蚀 1步驟，去除在上述㈣步驟暴露於外部之部分之銅形成 和狀焊片，退膜步驟’在上述㈣步驟形成指狀烊片後去 除上述壓附之乾膜；崎塗布步驟，使除通過上述退膜步驟 形成之指料片與雜之外之區域絕緣；鍍金/鍍錄步驟， 在上述阻焊塗布步财暴露之指料片與㈣上進行電鍵， 形成鍍金/鍍鎳層；遮罩塗布步驟，在上述鍍金/鍍鎳步驟進 行鍍金後，利闕罩遮紐金線；布線步驟，以在上述遮罩 塗布步驟巾被遮蓋之鍍錄射心、，加工軸印刷電路板之 外形及槽Π;遮罩_步驟，在上述布線步财加工槽口後， 去除鍍金線上塗布之遮罩。 2. 根據巾請柄範_丨項所述之料_裝用㈣電路板之 齒口加工方法’其特徵為，在用於上述布線步驟之遮罩塗布 步驟中’利用曝光或顯像，在塗布遮罩物質後形成遮罩區域。 3. 根據申請糊範_ 1項所述之半導體封裝用印刷電路板之 窗口加工方法，其特徵為’在上述遮罩塗布步驟中，遮罩塗 布物質使用固態或液態之物質。
TW095135043A 2005-04-12 2006-09-22 Window manufacture method of semiconductor package type printed circuit board TWI333265B (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR1020050030136A KR100648916B1 (ko) 2005-04-12 2005-04-12 반도체 패키지용 인쇄회로기판의 윈도우 가공방법
PCT/KR2006/001354 WO2006109997A1 (en) 2005-04-12 2006-04-12 Window manufacture method of semiconductor package type printed circuit board

Publications (2)

Publication Number Publication Date
TW200816407A TW200816407A (en) 2008-04-01
TWI333265B true TWI333265B (en) 2010-11-11

Family

ID=37087238

Family Applications (1)

Application Number Title Priority Date Filing Date
TW095135043A TWI333265B (en) 2005-04-12 2006-09-22 Window manufacture method of semiconductor package type printed circuit board

Country Status (5)

Country Link
JP (1) JP4701248B2 (zh)
KR (1) KR100648916B1 (zh)
CN (1) CN100514612C (zh)
TW (1) TWI333265B (zh)
WO (2) WO2006109967A2 (zh)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100891334B1 (ko) 2007-05-25 2009-03-31 삼성전자주식회사 회로기판, 이를 구비하는 반도체 패키지, 회로기판의제조방법 및 반도체 패키지 제조방법
TWI334320B (en) 2007-07-16 2010-12-01 Nanya Technology Corp Fabricating method of gold finger of circuit board
CN101488486B (zh) * 2008-01-15 2010-06-02 力成科技股份有限公司 可开槽式线路基板
KR100941982B1 (ko) * 2008-04-07 2010-02-11 삼성전기주식회사 보드온칩 패키지 기판 제조방법
CN102480844B (zh) * 2010-11-23 2014-05-07 深南电路有限公司 一种防渗镀的pcb镀金板制造工艺
CN108513433A (zh) * 2018-04-24 2018-09-07 苏州维信电子有限公司 一种隔锡的柔性线路板pad及其制造方法
CN114121791A (zh) * 2021-11-25 2022-03-01 日月光半导体(上海)有限公司 集成电路装置及其制造方法

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05136327A (ja) 1991-11-12 1993-06-01 Toshiba Corp 半導体パツケージ
US5281851A (en) 1992-10-02 1994-01-25 Hewlett-Packard Company Integrated circuit packaging with reinforced leads
JP3415089B2 (ja) * 1999-03-01 2003-06-09 住友金属鉱山株式会社 プリント配線板の製造方法
JP2001110838A (ja) * 1999-10-07 2001-04-20 Hitachi Chem Co Ltd 半導体装置、それに用いる半導体支持基板、及び半導体装置の製造方法
JP2002299790A (ja) * 2001-03-30 2002-10-11 Ibiden Co Ltd ルータ加工方法およびルータ加工された基板
KR20020085635A (ko) * 2001-05-09 2002-11-16 주식회사 심텍 캐슬형 인쇄회로기판의 외곽 라우팅 방법
US7173322B2 (en) * 2002-03-13 2007-02-06 Mitsui Mining & Smelting Co., Ltd. COF flexible printed wiring board and method of producing the wiring board
KR100617585B1 (ko) * 2004-01-28 2006-09-01 주식회사 뉴프렉스 연성 인쇄회로기판의 제조방법

Also Published As

Publication number Publication date
KR100648916B1 (ko) 2006-11-27
KR20060108045A (ko) 2006-10-17
WO2006109997A1 (en) 2006-10-19
CN1989612A (zh) 2007-06-27
JP4701248B2 (ja) 2011-06-15
CN100514612C (zh) 2009-07-15
JP2008519426A (ja) 2008-06-05
WO2006109967A2 (en) 2006-10-19
TW200816407A (en) 2008-04-01

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