TWI244705B - Light-emitting diode chip package body and packaging method thereof - Google Patents

Abstract

An LED chip package body includes an LED chip having a pad-installed surface, a plurality of pads installed on the pad-installed surface and a rear surface formed on an opposite side of the pad-installed surface. A light-reflecting coating is disposed on the pad-installed surface and has a plurality of exposed holes for exposure of the corresponding pads. A first insulative layer is formed on the light-reflecting coating and has a plurality of through holes communicating with the corresponding exposed holes. A second insulative layer is disposed on the rear surface and has a central through hole for exposure of a central portion of the rear surface. A lens is received in the central through hole. Each of a plurality of external connected conductive bodies is electrically connected to the corresponding pad and projects out of the corresponding through hole in the first insulative layer.

Description

V. Description of the invention (1) [Technical field to which the invention belongs] The present invention relates to a light-emitting diode y and a light-emitting diode chip package and :: ground, [previous technology] a method of coating. LED chip. The soldering system of the chip is as follows: the wire on the wire is connected with the connection on the packaging substrate it and / or the lead frame = two-general conductor. Such a structure is electrically connected on the packaging time history. However, it is broken so that it is known that the LED chip is jealous, and the metal wire system is easy to be lifted. w It is said that the yield and yield of the film coating body cannot be effective. In addition, with the progress of the wafer process, the smaller the led, the more the size of the surface of the pad on the wafer becomes smaller. Difficulties in dealing with Γ: Therefore, it is difficult to print with the invention. There is yttrium ^ The inventor of this case then used this industry to conduct a few inspections, and in the spirit of excellence, he has passed the "light-emitting diode chip package and its two violations. The purpose of the present invention is to In order to provide a body and its mounting method. The problem described above is a feature of a light-emitting diode chip package nt: a kind of light-emitting diode chip package r is provided, and the light-emitting diode chip package: A 2 sealed system chip, the light-emitting diode wafer 1 # I " 3 As the previous one, the wafer has a 烊 pad mounting surface, several mounted on 1244705, 5. Description of the invention (2) 4 solder pad mounting Surface rear surface; a light-emitting diode wafer layer of a light-emitting diode wafer, the surface is insulated and has a middle insulating layer for setting a root lifter, and the rear surface photodiode of the pad is formed on The hair holes and several pieces are exposed, and the corresponding solder layers on the pads, reflective coatings, and pad installation tables are formed in the central perforation that exposes the light-emitting light-transmitting element; the center of the light penetrates through the light-emitting book. Another feature of the invention is, the hair- ot; a pole mounting surface and a pad on the opposite side of the light and a pad of the light-emitting diode, in the light-transmitting hole; and one of several conductive convex diode wafers corresponding to a type of hair-pad The coating has element system blocks after a number of exposed hole polar body wafers, and each of the welding light diode surface is provided with a surface for the table; one light body wafer is inscribed on the monument light light diode and the light diode is used for exposing the light transmitting element. The conductive bumps are provided on the corresponding solder pads according to the present invention. The light-emitting diode package wafer has an upper pad, a reflective coating, and a rear surface; a solder wafer on the wafer with the reflective coating. The corresponding soldering system of the solder bump is provided on the conductive bump. Another characteristic light diode crystal body includes: a solder pad and an insulation protection against the light; an insulating female surface. The mounting pad insulation layer of the mounting surface pad is provided on the mounting pad of the mounting pad, and the coating layer is provided on a guide. The central and central exposure holes are arranged on a guide through the rear surface of the light-emitting sheet. Wafer light The two poles and several mounting surfaces are provided with a part of the insulating insulating layer »in a through hole; the diode is opposite to the hair and the central part of the surface on the surface of the insulating surface is exposed. On the opposite side, the protective layer is formed for exposing the central light-transmitting element and several wafers: a light-emitting diode wafer encapsulation sealing body includes: an insulating substrate

1244705 V. Description of the invention (3) The insulating substrate has a mounting area with a _ wafer mounting surface, a plurality of at least one wafer is mounted through the wafer mounting surface, and a wafer mounting surface passes through a corresponding insulating layer of the substrate. A wafer mounting area has a back surface of the wafer, and a track from the crystal; a portion is exposed to at least the hole; at least the wafer is provided with a solder pad and a layer, and the light solder pad is provided with a diode crystal. A conductive layer of a conductive pad is mounted on the wafer, the guide is lifted according to the system after the empty wafer between the insulating bases, the absolute one is issued in the convex system of the insulation installation table and the welding reflection surface sheet, and The surface thermal layer system board is mounted on the surface, the edge substrate wafer, the surface of the at least photodiode edge substrate, a plurality of pad mounting surface coatings are provided and corresponding solder pads are provided. The area of the light-emitting diode of the conductive rail and the heat-conducting material corresponding to the upper part of the insulating substrate is installed at least on the surface of the chip and the surface of the substrate. The hole extends to the edge layer is formed at the center of the mounting area of the chip mounting surface. At least one light emitting wafer is installed in the cracked area. The mounting surface of the pad is installed on the opposite rear surface of the surface. The surface is opposite to the meniscus, and the insulating base and the open area of the diode region of the configuration area are provided with a reflective wire-coated polarized wafer. The at least one exposure pad exposes at least one of the pads; A plurality of conductive protrusions, at least one of the light emitting diode wafers to at least one wafer mounting area; a thermally conductive implant forming body wafer and the conductive convex light diode traces are electrically connected via the I and other through holes, and A light transmitting element formed on the at least one hair. Yet another feature is that a light emitting diode chip package has at least one wafer. The light emitting diode chip package includes: an insulating base mounting area, the at least one

Page 71244705 V. Description of the invention (4) The opposite side of the wafer mounting area and the conductive track edge substrate are formed with an opening for exposure; at least one body wafer is disposed thereon and has a The pad mounting 11 and the cicada have a wafer mounting, a number of wafers mounted on the pad, and the thermally conductive layer system; a base having at least one edge substrate, and the at least one space corresponding to the thickness of the conductive layer. A small surface; a wafer formed on the gold conductive bumps is mounted on the wafer according to the system k; the thickness of the wafer portion of the oxygen convex body is set on the absolute reflection layer if and is on the surface According to the present invention, the light-emitting sheet penetrates the surface of the wafer through a plate insulation layer, the surface of each wafer is mounted on the surface of the at least / light-emitting diode insulating substrate, a plurality of pad mounting surfaces, a heat-conductive material, and a light-emitting diode are formed In the interspace h, there is another feature that is transparent on top of each insulating material layer to ensure the corresponding conductivity of the at least one insulating substrate, and the diode chip body. The chip has a surface mount corresponding to a base wafer of the base area, and the relative installation is defined by the bulk crystal. The surface protection layer sends the track to the package-soldering, welding to the surface of the wafer and the back of the wafer. Holes to extend the board mounting surface of the board insulation layer system, the at least one less wafer is mounted on the rear surface of the pad mounting; an edge of each through-hole injection sheet and each of the conductive openings A material layer, the insulating material layer near the substrate has a through hole of a concave mounting table to the back formed on the surface and the central area of the light emitting area is formed on the surface of the heat conductive layer formed on the inner wall of the convex body An upper layer; a metal reflection on one; and a plurality of solid conductive bumps, one of the photodiode wafers is electrically connected to at least one wafer mounting area. The light-emitting diode crystal includes: a mounting surface, a chip package, a plurality of mounting surfaces, a plurality of surface areas, and a total of 5 domains and materials. The appearance of each body is as follows:

$ 8 页 Α 、 Description of the invention (5) ------ 5 female solder pads on the surface, and a surface opposite to the mounting surface of the solder pad i: pole carving: ί line t ϊ, the The anti-light line coating is provided on the light emitting pole: said: * dry pad women's surface and has-for exposing the: the first pole the next day-the corresponding pad exposure hole of the pad 丨A light-transmitting element, the light-transmitting 7L piece is disposed on the rear surface of the light-emitting diode wafer; each of the conductive bumps is disposed on a corresponding pad of the light-emitting diode wafer. . The seal of a button is a kind of light-emitting diode wafer followed by a light-emitting diode: The packaging method includes the following steps: providing a surface and a number of ^ = pieces, the light-emitting diode wafer has a Pad installation table installation ίΐΓί Welding pads on the pad mounting surface, and a γ 2 ί t face with 5 pads of the pad electrode; a light reflecting coating is provided on the light-emitting layer to expose the hair 'a: ^ f : Top 'The light-reflective coating has several pad exposure holes that are made of pads that absolutely correspond to the surface. 1 The insulating layer has a rear surface on the back of the polar wafer, and the middle part of the surface part. Perforation; two-way inside the central perforation of the rear surface of the light-emitting diode wafer; and: placing a light transmitting element on the central bump of the surface insulation layer. ; Μ χ—Each pad of a polar wafer is provided with a conductive package according to yet another aspect of the present invention. The package is provided with a light-emitting diode wafer package and a photodiode wafer. The method includes the following steps. · Provide a number of mountings 'the π diode 具有 $ diode wafer has a welding pad mounting surface, two pads on the surface of two female surfaces opposite to each other, and a mounting pad with the pads,' on the light emitting diode 1247705 is provided on the rear surface of the wafer. 5. Description of the invention (6) 1-a light reflecting coating; an insulating protection layer is formed on the light reflecting coating, and is formed on the pad mounting surface of the light emitting diode wafer An insulation layer 'The insulation layer has a central perforation for exposing the central portion of the pad mounting surface of the light emitting diode wafer and several pad exposure holes for exposing the corresponding pad; A light-transmitting element is arranged in the central perforation, and a conductive bump is provided on each bonding pad of the light-emitting diode wafer, and a packaging method is provided for an insulating substrate with a soldering pad, and Yet another feature, a The optical system is provided. The insulating substrate sheet mounting area has a pair of back surfaces, several conductive traces from the wafer, and a surface for exposing the provided at least one sheet mounting table. The wafer mounting surface passes through the substrate. The substrate is insulated from the wafer, and the mounting surface of the wafer body is opposite to the mounting surface. A conductive packaging method for exposing the exposure holes of the mounting plate includes the following steps: at least one wafer mounting sheet is packaged. The wafer mounting surface and the corresponding through hole extend through the wafer substrate insulation, and the center of the mounting area is' the at least one less wafer mounting pad is mounted to extend from the mounting surface to the edge layer area of the mounting area. On the surface of the light-emitting two-packed area, at least two light-reflecting light-emitting two light-emitting and one crystal surface holes are formed on the surface, and the domain crystals on the back are formed with openings; A pair of wafers with a photodiode light reflector is placed on the pad, and the wafer coating of the weld body should be welded. Through the installation table, the insulation forms at least one light-emitting two insulating base surface, the pad-mounted pad has several pads, and at least one of the pads has a surface on the back surface of the welding; on the convex body, the surface; One light less than one at least one

Page 10 1244705

V. Description of the invention (7) The electroconvex system is electrically connected to the wafer material of the at least one wafer mounting area of the mounting surface edge substrate via the corresponding conductive track; by using the 〆 thermally conductive diode crystal I 蛊 二 ^ A space formed between the insulating substrate, the at least one light-emitting body, and the conductive protrusions such as the at least two factories is implanted to form a heat-conducting layer. A light-transmitting element is provided on the surface of the solid-state diode chip. According to another feature of the present day and month ' s package # 古 再, a light-emitting diode chip package is provided in ml. The packaging method includes the following steps : Domain, ^ The insulating substrate has at least one wafer mounting area. The crystal An: 2 :: Anxiang area has-a wafer mounting surface,-a back surface opposite the north & clothing surface, a number of through the wafer The mounting surface and 21 ^, holes, and a plurality of conductive tracks from the wafer mounting surface to the back surface through corresponding through holes; a substrate insulation is formed on the wafer mounting surface of the at least mounting area of the insulating substrate Layer, the base f, and the rim layer are formed with an opening for exposing the two central regions of the at least one wafer mounting region; providing at least one light emitting diode wafer, the at least one light emitting diode wafer system is provided The at least one 2F mounting area on the insulating substrate has a pad mounting surface, a number of pads, a pad mounted on the padding surface, and a rear surface opposite to the pad mounting surface. ; Forming a thermally conductive layer by injecting a thermally conductive material through the through holes into two spaces formed between a light emitting diode wafer and the conductive protrusions; within the boundaries of each opening An insulating material layer is formed in the space between the wall surface and the corresponding f T electric convex body, and the insulating material layer has a portion closer to the wafer than a portion closer to the substrate insulating layer 1244705 ⑻

Description of the invention ^ thick f ^, so that each insulating material layer has a recessed upper surface; a metal reflective layer is formed on the surface of the insulating material layer; a transparent protective layer is formed on the gold shot layer; and 〆 conductive bumps are formed on each of the pads of the at least one light emitting diode ^ = f, and the conductive bumps are corresponding to the conductive pads on the wafer mounting surface of the at least one wafer mounting area of the X and B substrate The traces are electrically connected. According to still another feature of the present invention, a light-emitting diode chip packaging method is provided. The packaging method includes the following steps: lifting a light-emitting diode wafer, the light-emitting diode wafer having a Pad mounting surface Several pads mounted on the pad mounting surface and a rear surface opposite to the pad mounting surface; a light reflecting coating is placed on the pad surface of the light emitting diode wafer. Layer, the light reflecting coating has a pad exposure hole for exposing a corresponding pad of the light emitting diode wafer; a light transmitting element is provided on the rear surface of the light emitting diode wafer; and the light emitting A conductive bump is disposed on each pad of the diode wafer. [Embodiment] Before the present invention is described in detail, it should be noted that throughout the specification, similar elements are denoted by the same reference numerals. On the other hand, in order to clearly disclose the features of the present invention, the drawings and It is not drawn according to the actual size of the element and not to the true scale. The first diagram is a schematic cross-sectional view of a LEXD chip package showing a first preferred embodiment of the present invention in the form of manufacturing steps. As shown in the first figure, a light emitting diode (LED) chip 10 is first provided. The LED chip 10 is a wafer which has not yet been removed from a wafer.

Page 12 1244705 V. Description of the invention (9) The diced wafer, that is, the packaging method of the light-emitting diode chip package I of the present invention is a wafer-level packaging method. Of course, the wafer may be a wafer that has been cut from a wafer. The LED chip 10 has a pad mounting surface 100 on which a plurality of pads 102 are mounted, and a rear surface ^ 01 opposite to the pad mounting surface 100. In this embodiment, two pads 102 are mounted on the pad mounting surface 100. It should be understood, however, that the number of pads 102 is not limited to two, and the system end depends on the application. —The light-reflective coating layer 11 is provided on the pad mounting surface 10 Q of the LED chip 10. The light-reflective coating 11 is formed of any suitable material and has a plurality of pad exposure holes for exposing corresponding pads. 0 2 Please refer to each of these convex photoresist material coatings 11 Then the second pad 101 on the surface of the LED insulation layer 1 3 is read in the middle and middle part. The second pad 1 0 2 1 2 is made of an image. In terms of the formation of photoresistive convex bodies, after the photoresist is applied, the central part of the central shape is shown on the surface. The material on the light is formed with convex bodies such as polyimide. Forming a layer for exposure is made of 1 0 1 ink on the rear surface of the photoresist material. The surface is insulated as a convex body 12 for the exposure hole 1330 line reflective coating 1 1. The polyimide and the formation are formed on the surface insulation by firstly forming a convex body forming layer (images, development, etc.). In this embodiment, the LED layer 13 formed on the LED layer is exposed through exposure. After the formation after 10, in the embodiment, it is similarly not shown in the light reflection). During the formation of layer 1 3, the surface of the wafer 10 and the surface of the developing surface 1 0 1

1244705 V. Description of the invention (10) Next, referring to the third figure, a first metal layer 14 is formed on each of the pads 10 of the LED chip 10, so that the pad 1 〇 The surface of 2 and the protrusions 12 on the pads 102 are covered by the first metal layer 14. In this embodiment, the first metal layers 14 are formed of aluminum. However, it should be understood that the first metal layer 4 can also be formed of any other suitable metal material. Then, a second metal layer 15 ′ is formed on each of the first metal layers 14. Therefore, each convex body 12 and its corresponding first and second metal layers 14 and 15 are formed together. Conductive bump. In this embodiment, each of the second metal layers 15 is composed of a nickel layer 150 and a gold layer 151. * Finally, a light-transmitting element 6 is disposed in the through hole 130. & of the rear surface insulating layer 丨 3. In this embodiment, the light-transmitting element 16 is formed using polyimide as a material and has a rounded top portion. However, the permeable element 16 may also be provided from any suitable material and any suitable method. For example, the light-transmitting element 16 can be made of a suitable material, and then placed in the surface. ~ Τ 天 牙 孔 = It should be noted that the light-transmitting element 6 series can be used as needed. 埭 ::? The polarizing agent is such that the L-line ray emitted from the light-transmitting element 16 is sufficient. s color. The first requirement is the solution. The solution is that in this embodiment, the convex body 12 formed of gold-like metal can also be exempted from the series of "..." and 15 series. Or, as on the tenth day: in

料 formation. However, please 夂 ㈣ + 所 所 _ ° 豕 The convex makeup 12 is made of the first resisting material 1244705 V. The description of the invention (11) 'Before forming the convex body 12 with a photoresist material, put it on each pad 1 2 The upper system forms a boundary metal layer 28. It should be noted that the conductive bumps disclosed in the present invention are not limited to the types and formation methods described herein. As long as it is suitable for electrical connection with an external circuit, various conductive bumps and their forming methods can be applied to the present invention. For example, the conductive bumps disclosed in the Republic of China Patent Application No. 8 9 1 0 0 5 78 No. 03 and No. 92 1 1 2 1 6 5 An 1 and their formation methods can also be applied to the above The externally described LED chip package has the following advantages: 1. The overall size of the LED chip package is approximately the same as that of the LED chip, so it is called " 〇6〇3 ";, 0804, and "0402", etc., LED chip package size tabloids 2 · Free% wiring processing shortens the entire package time, yield and yield. 'The fifth picture of double consumption rise is clearly invented. — — A schematic cross-sectional view of a body chip package. &Amp; The light emitting diode of the Bayesian embodiment is shown in FIG. 5, the package body of this preferred embodiment and the one of the preferred embodiment. Only the flat top part 17 which is different from the light-transmitting element body and the sun-chip package is formed by grinding. The first and second figures are for showing the second part of the present invention. Schematic cross-sectional view of the light-emitting diode of the ochre κ embodiment This place is only for further enlarging the second light transmitting element 18 which is different from the preferred embodiment. These two light-transmitting elements 17 and 18 may be doped with different

1244705 V. Description of the invention (12) The polarizing agent with the same wavelength as the soul so that the light emitted from the second light-transmitting element 18 may have a color blended by two colors. 7 to 9 are schematic cross-sectional views showing a light emitting diode chip package according to a fourth preferred embodiment of the present invention.

And f, as shown in the seventh figure, a light-emitting diode (LED) wafer 10 is firstly lifted. L ^ LED wafer 10 has a pad surface with a plurality of solder pads. 02 A back table opposite the pad mounting surface, 1 + 01. In this embodiment, two solder pads 102 are mounted on the solder pad = clothing surface 100. However, it should be understood that the number of pads 102 is not as small as two, and the end depends on the application. The light-reflective coating 11 is provided on the rear surface 101 of the LED wafer 10. An insulating protective layer 19 made of a photoresist f material is formed on the reflective coating 11. In this embodiment, the insulating protective layer 19 is made of a photosensitive ink.夂 On the other hand, a surface insulation layer 20 made of a photoresist material is formed on the pad mounting surface 100i of the LED chip 10. In this embodiment, the surface insulating layer 20 is made of a photosensitive ink. : As shown in the eighth figure, after the pad mounting surface 1 0 〇i formed on the LEd wafer 10, the surface insulation layer 2 0 is exposed through exposure and development, etc. To form—a central perforation 200 for exposing the central portion of the pad mounting surface 100 of the LED sheet 10 and a plurality of convex bodies 12 formed on a corresponding pad 102. Next, as shown in the ninth figure, each of the LED chips 10 is 1244705.

V. Description of the invention (13) A first metal layer is formed on the stem 1 102, so that the surface of the pad 〇2 and the protrusion 12 on the pad 102 are formed by the first metal layer. 14 cover. In this embodiment, the first metal layers 4 are formed of aluminum. However, it should be understood that the first metal layers 4 may also be formed of any other suitable metal material. iW k, a second metal layer 15 is formed on each of the first metal layers 丨 4, so each convex body 丨 2 and its corresponding first and second metal layers and 15 are almost electrically conductive. Bump. Each second metal layer is composed of a nickel layer 150 and a gold layer 151. Finally, a light transmitting element 17 is disposed in the central through hole 200 of the surface insulating layer 20. In this embodiment, the light-transmitting element 17 is made of polyimide. However, the light-transmitting element 7 can also be formed of any suitable material and any combination method. Twelfth to eighteenth drawings are schematic cross-sectional views showing a light emitting diode chip package according to a fifth preferred embodiment of the present invention in the form of manufacturing steps. Please refer to the twelfth and thirteenth figures. At least one light emitting diode (LED) wafer 110 is first provided. The LED chip 100 has a welding electrode mounting surface 100 provided with a plurality of wafers 102 and a rear surface 10 1 opposite to the welding surface f 0 1 0. Similar to the above embodiments, two pads 102 are mounted on the pad mounting surface 100. However, it should be understood that the number of welding pads 102 is not limited to two, and the system end depends on wide use. & A light reflecting coating 11 is provided on the pad mounting surface 100 of the LED chip 100. The light-reflective coating 11 has several

1244705

The pad exposure hole 1 j of the pad 10 2 is then formed in the embodiment. The photoresist material is used to form a layer. In each case, the shape of the convex body 1 2 and the convex body 12 form a convex ridge 102. A convex is formed on the LED for exposure and the LED belongs to the layer 14. The convex body 1 on the first layer is composed of the first layer 14 and the first layer 14 may also be composed of a first gold and a first metal and then a metal layer and then a layer 1 5, because the layers 1 4 and 1 5 _ nickel layer 150 are A polyimide-based system is formed by first forming layers in the body (development and other processing in the figure to reach each of the wafers 10 and a metal layer 14 covering the pads 102). However, any other suitable It is formed on each of the first metal layers 14, and each of the convex bodies I2 and the corresponding one forms a conductive bump. Each is composed of a gold layer 151. The light like the net is not shown). Pad 1 0 2 surface and at. In this embodiment, it should be understood that the metal material is formed with a photoresist material-based radiation coating layer 1 1, and then the solder pad 10 is formed on the convex system. In this embodiment, the first layer is formed. First and second metal layers of a second metal The second metal layer 15 is provided by an insulating substrate 2 as shown in Figs. 14 and 15 of the present invention. The insulating substrate 21 includes a plurality of wafer mounting areas 21 (). Each of the crystal 1 mounting areas 210 has a wafer mounting surface 21j, a back surface 2 1 2 opposite to the wafer mounting surface 2 1 1, a plurality of through holes 213 penetrating the wafer mounting surface 211 and the back surface 212, and a number of A conductive track 2 14 extending from the wafer mounting surface 2 11 to the back surface 2 1 2 through a corresponding through hole 2 1 3. In the preferred embodiment, the number of bevel holes 2 1 3 in each wafer mounting area 21 is equal to the number of corresponding pads 102 in the LED chip 1 ◦. Μ

m ii p. 18 1 1244705 V. Description of the invention (15) ”In the example of the present example, the substrate 5 1 and the edge substrate 21 is a ceramic substrate, however,-the base surface 2 1 of the winding edge can also be the reason A substrate made of other insulating materials, such as a 'glass substrate.' Then, as shown in FIG. 16, a substrate insulating layer 22 is formed on the wafer mounting surface 211 of the entire insulating substrate 21. In this embodiment, 5 The substrate and the edge layer 22 are made of a photoresist material and processed through exposure and development to form a plurality of openings 22 for exposing the central area of the corresponding wafer mounting area 210. Then, in A reflective coating layer 23 is formed on the inner wall surface that defines each of the openings 22. Next, referring to FIG. 17, a plurality of \ ED wafers i (j series prepared as described above are placed in the corresponding The conductive bumps in the wafer mounting area 21 and on the pads 10 of the wafer 10 are electrically connected to the corresponding conductive tracks 214 on the wafer mounting surface 211 via a conductor 24. ♦ Then, as shown in the eighteenth figure, a thermally conductive material The through-hole 213 is injected into the space formed between the insulating substrate 21, the corresponding LED chip 10, and the opposed conductor 24 to form a thermally conductive layer 26. The thermally conductive material may be a metal-insulated thermally-conductive material or a non-metal-insulated thermally-conductive material. On the other hand, a light-transmitting element 25 is formed on each LED chip 10. The air-permeable element 25 is formed of the same material and in the same manner as the preferred embodiment described above. Finally, the insulating substrate 2 1 is cut into several individual light-emitting diode packages as needed. For example, each light-emitting diode package may include a chip mounting area 210 or may include nine matrix methods ^

Page 12 1244705

Rows of wafer mounting areas 2 10. It should be noted that the light-transmitting element 25 can be injected with a polarizing dye back J or a light-emitting agent so that the light emitted from the light-transmitting element 25 can have a desirable color. Nineteenth to Second Twenty Figures are schematic side views showing the light emitting diode chip package of the first and / or preferred embodiments of the present invention in the form of manufacturing steps. In this embodiment, at least one light emitting diode (LED) is first prepared as described in the fifth preferred embodiment, and therefore, a detailed description thereof is omitted here. Then, as shown in FIG. 19, an insulating substrate 21 is provided. In this embodiment, the difference between the insulating substrate 21 and the insulating substrate of the fifth embodiment is only that each of the wafer mounting areas 210 of the insulating substrate 2 of the preferred embodiment has a relatively large area. . Then, as shown in the twentieth figure, A is the same as the fifth preferred embodiment. A substrate insulating layer 22 is formed on the wafer mounting surface 211 of the entire insulating substrate 2 丨. In this embodiment, the substrate insulating layer 22 is made of a photoresist material and is formed with a plurality of openings 2 2 for exposing the central area of the corresponding wafer mounting area 2 1 0 through processes such as exposure and development. 〇. Next, as shown in FIG. 21, a plurality of LED wafers 10 prepared in advance are placed in the corresponding wafer mounting area 2 j 〇 and conductive on the pad 10 of the wafer 10 The bump is electrically connected to a corresponding conductive track 2 1 4 on the wafer mounting surface 2 1 1 via a conductive body 2 4. Then, a thermally conductive material is injected through the through holes 213 and formed in the insulating substrate 21, the corresponding LED chip 10, and the corresponding conductive body.

Page 20 Ϊ244705 V. Description of the invention (17) The heat conductive layer 26 is formed in the space formed. The insulating and thermally conductive material or non-metallic insulating and thermally conductive material can be made of metal after forming the thermally conductive layer 26 in the space between the second / wall surface and the corresponding conductive body 24: shape :::: 20 of: Layer 29. Each insulating material layer 29 is close to the film n. There is an insulating material in the portion near the substrate insulating layer 22. The insulating material layer 29 has a depression than the edge material layer 29. The degree is small ... Flail protection: The light-emitting layer 30 and a transparent protective layer 31 are connected in this order. The layer 30 formed on the mother insulating material layer 29 is like a reflective mirror surface. It can be completely reversed. Reflected. < The light emitted by the Japanese film -like it Γ the edge substrate 21 is as described in the fifth preferred embodiment == to be cut into several individual light emitting diode packages. < Figures 1 to 17 are diagrams for showing an example of a conductive bump which can be applied to the present invention in a manufacturing step manner. First, as shown in FIG. 22, a conductive contact like a conductive metal ball is formed on each of the bonding pads 102 of the die 10. In this embodiment, the conductive contact 32 is made of gold. The ball (gold ball). However, the conductive contact γ% may be made of any suitable metal material. Then, as shown in the twenty-third figure, on the pad mounting surface 10 of the wafer 10 Upper system formation—a first insulating layer 33 made of a photosensitive material. The 0% marginal layer 33 is formed with a plurality of openings exposing the corresponding conductive contacts 32. Then, refer to twenty-fourth and twenty-five As shown in the figure

Page 21 1244705 V. Description of the invention (18) A second insulating layer 34 made of a photosensitive material is formed on the edge layer 33. The first insulating layer 34 is formed with a plurality of corresponding through-holes 34o that are open-connected to the first insulating layer 33 and are larger than the corresponding openings 330. Next, the openings 33, 0 and the through-holes 340 are filled with solder paste. After that, after the ^ treatment, the open holes 33o and the through holes 34〇 ^ which are connected to each other are formed to be electrically connected to the corresponding conductive contacts 32 and the ends are convex, and the conduction outside the through holes 3 4 0 is conductive. Solder joint 3 5. The air is shown in the twenty-sixth figure. After grinding, the end of the conductive protrusion protruding outside the through hole 340 is ground. ",, 35 Finally, the second insulating layer 34 is removed, so that each diagnostic welding point 35 and the corresponding conductive contact 32 function as conductive bumps as described above, as in the twenty-seventh It is shown in the figure. The twenty-eighth to thirty-second pictures of the guide of the hall 4 are schematic cross-sectional views showing examples of the conductive bumps applicable to the present invention by the manufacturing steps. The '忒 air-conducting contact 3 2 It is a gold ball (g〇jd ba ii). However, the electrical contacts can also be made of any suitable metal material; and then 'formed on the pad mounting surface of the wafer 1 〇 〇〇 photosensitive material The first-insulating layer 33 is formed. The first-insulating layer 33 is formed by a plurality of openings 330 that expose the ends of the corresponding conductive contacts 32. There are then 'Λ 凊 Refer to the figures 29 and 30 It is shown that a second insulating layer formed of a photosensitive material is formed on the first to third layers 33. The first edge layer 34 is formed with a plurality of openings U corresponding to the first insulating layer 33. Please refer to the twenty-eighth figure, a conductive metal ball-like guide is formed on each furnace 102 of the wafer 〇. 2. The contact 3 in the present large Γ 'induced

Page 22 1244705 V. Description of the invention (19)

Si two pairs? Open f33 ... through hole 340. Next, the openings 330 'and the through-holes 34o communicating with each other are filled with a solder paste. The reason is that the solder paste holes 34 are formed at the two connecting holes ′, ′, and ′, which are connected to each other. External conductive welding ::. 2 The electric milk is connected and the end is protruding from the port. As shown in the twenty-first month of the month, the convex 1 is applied to the pass, and the outer end is smoothed: " Ιέ35 Denshi II 35 The spot 34 is removed, so that each of these conductive stems,..., Accounts for 35 of the corresponding conductive contacts 32 as a whole, as shown in the thirty-second figure. (Action 4 The fourteenth figure of the convex as described above is a schematic cross-sectional view showing the light emitting diode chip package of the present invention in a manufacturing step manner. In the twelfth to thirteenth drawings, special, ㈣, 被 制 #. Then, as in the thirty-sixth figure, the internal system 36 is injected with the image: Shiwu 36 is provided. The light transmitting element is like A liquid dye or a fluorescent domain gas or a polarizing dye is formed on the transmissive element 36 ″ / two, the total reflection ^ metal layer 37 is formed on the lower surface of A y β, $ & _ and the half reflection metal layer 38 The system is formed on the upper surface of the forming member 36. Next, as in the back of the first wafer, the surface is provided with a transparent layer between the coffee layer (not shown) 7 = 2 layer 37 Viscous material. The far-transmitting element 36 is set on the LED chip 1101244475. Description of the invention (20) The edge material i outline: Idea: f ,: The light-transmitting element 36 can also be made of other transparent insulation, = Materials are formed, for example, when transparent epoxy resin or poly is formed of other transparent insulating materials: 〃 2 j particles are doped in the transparent In the edge material, the package is described as "1", "light-emitting diode chip package and its purpose," by borrowing the structure and device disclosed in the soil to achieve the expected invention. And it has not been seen in publications or publicly used before the application, which meets the requirements of novelty and progress of profit-seeking. Only, non-descriptive = uncovered drawings and descriptions are only examples of the present invention, and its description, 1 Example: Everyone who is familiar with this skill should be familiar with the characteristics of the Ming, and other equivalent changes or repairs… ~ within the scope of the patent application in the following case.

• H Page 24 1247705 Brief description of the drawings The first to fourth diagrams are schematic cross-sectional views showing the light emitting diode chip package of the first preferred embodiment of the present invention in steps; the fifth diagram is a A schematic cross-sectional view of a light-emitting diode chip package showing a second preferred embodiment of the present invention; a sixth cross-sectional view is a schematic cross-sectional view of a light-emitting diode chip package showing a third preferred embodiment of the present invention; 7 to 9 are schematic cross-sectional views showing a light emitting diode chip package according to a fourth preferred embodiment of the present invention in a stepwise manner;

The tenth is a cross-sectional view showing the structure of another conductive bump used in the present invention, and the eleventh is a schematic view showing the structure of another conductive bump used in the present invention Sectional views; Figures 12 to 18 are schematic sectional views showing the fifth preferred embodiment of the present invention (the light emitting diode chip package in steps); Figures 19 to 21 are steps A schematic cross-sectional view of a light-emitting diode chip package according to a sixth preferred embodiment of the present invention is shown in a manner; FIGS. 22 to 27 are steps for showing another kind of conductivity used in the present invention. Schematic cross-sectional view of the structure of the bump;

Twenty, eighth to thirty-second diagrams are schematic cross-sectional views showing the structure of another conductive bump used in the present invention in steps; and thirty-third to thirty-four diagrams are in steps The mode shows a schematic cross-sectional view of a light emitting diode chip package according to a seventh preferred embodiment of the present invention. [Representative symbols for the main components of the figure] 10 LED chip 100 Pad mounting surface

Page 1212705

Brief description of the drawings 101 Back surface 102 Solder pad 11 Light reflecting coating 110 Solder pad exposure hole 12 Convex body 13 Surface insulation layer 130 Central perforation 14 First metal layer 15 Second metal layer 150 Nickel layer 151 Gold layer 16 Light transmission Element 28 Bound metal layer 17 Light-transmitting element 18 Light-transmitting contact 19 Insulating protective layer 20 Insulating layer 200 Central perforation 21 Insulating substrate 210 Wafer mounting area 211 Wafer mounting surface 212 Back surface 213 Through hole 214 Conductive track 22 Substrate insulation layer 220 Open Hole 23 Reflective coating 24 Electrical conductor 26 Thermally conductive layer 25 Light-transmitting element 29 Insulating material layer 30 Metal reflective layer 31 Transparent # Protective layer 32 Conductive contact 33 First insulating layer 330 Opening itf 34 Second insulating layer 340 Through hole 35 Conductive solder joints 36 Light transmitting elements 37 Totally reflective metal layer 38 Semi-reflective metal layer

Claims (1)

1244705 6. Scope of patent application 1 · A light emitting diode chip package, comprising: a light emitting diode chip, the light emitting diode chip having a welding pad mounting surface, and a plurality of solders mounted on the pad mounting surface A pad, and a rear surface opposite to the mounting surface of the pad; a light-reflective coating, which is disposed on the surface of the pad pad 1 of the light-emitting polar wafer and has a plurality of surfaces for exposing the pad A pad exposure hole corresponding to a solder pad of the light emitting diode wafer; a surface insulation layer is formed on the rear surface of the light emitting diode wafer and has a light emitting diode wafer for exposing the light emitting diode wafer. The central perforation of the central part of the surface afterwards; VC a light-transmitting element disposed in the central perforation of the surface insulating layer; and a plurality of conductive bumps, each of which is disposed in the light-emitting diode On one of the polar body wafers. 2. The package according to item i of the claim range, wherein the light-transmitting element has an arc-shaped top portion. 3. The package according to item 1 of the scope of patent application, wherein the light transmitting element has a flat top portion. * 4. The package described in item 3 of the application scope of gas benefits / further includes a second light-transmitting element disposed on the top portion of the light-transmitting element, the light-transmitting elements are doped with different wavelengths Polarizer. 5. The package described in item 1 of the t! 凊 patent scope, wherein each conductive bump includes: Page 27 1244705 VI. Protrusions made of non-conductive material in the scope of patent application; One is formed on one of the corresponding pads of the light-emitting diode wafer to cover the surface of the corresponding pad and is flat on the corresponding pad. A first metal layer and a second metal layer of the convex body are formed on a corresponding first metal layer. 6. The package according to item 5 of the scope of patent application, wherein every two metal layers are composed of a recording layer and a gold layer. 7. The package according to item [1] of the application scope, further comprising a plurality of interface metal layers formed on a corresponding solder pad. 7 8 · The package as described in item 7 of the scope of the patent application, in 1, the bumps include: ， females ¥ electricity one formed on the junction gold corresponding to one of the light-emitting diode wafer by non-climbing electricity A convex body formed of a material; "a first metal formed on a corresponding boundary of one of the light-emitting diode wafers to cover the surface of the corresponding boundary metal layer and the convex body on the corresponding boundary i metal layer And the second metal layer on top of the third metal layer corresponding to qa. • The package described in Item 8 of the 17th patent scope, where the metal layer is composed of a The recording layer is composed of a gold layer. 10. The package body described in item 1 of the scope of patent application, in which Xi Sheng. The first electric bump is formed of gold. Ba Ning This special guide lj. If you apply for a profit scope The package according to item i, the electric bumps include: T female V one formed on a corresponding pad of one of the light-emitting diode wafers 12447705 6. Patent application scope conductive contacts; and one formed on one corresponding Conductive solder joints on the conductive contacts 12. 12. A light emitting diode chip package including : A light emitting diode wafer having a pad mounting surface, a plurality of pads mounted on the pad mounting surface, and a rear surface opposite to the pad mounting surface; Light-reflective coating 'The light-reflective coating is disposed on the rear surface of the light-emitting diode wafer; an insulating protective layer formed on the light-reflective coating; an insulating layer, the insulation The layer system is formed on the surface of the light-emitting diode wafer and has a central perforation for exposing the light-emitting diode wafer to the central part of the surface of the pad women's clothing and several pads for exposing the corresponding pads. Exposure hole; "in the central perforation;" and the light element 'the light transmitting element is provided in the insulating layer of a number of conductive bumps, prepare a light-emitting diode chip-corresponding: 塾 on the block ^ Place the three light-emitting packages as described in / Λ 专 / = circle 12: its towel, the top part of the light-transmitting x ten tan. The seal n as described in the item 13 of the patent // further includes a setting member that is doped = the light transmissive element Φ 1 on the top part, and other light transmitting elements Φ 1 have polarizers of different wavelengths. • The package according to item 12 of the application scope, wherein each 1244705 Six 'Scope of Patent Application' ~ Electric bumps include: a bump formed of a non-conductive material formed on a corresponding pad of one of the light-emitting diode wafers; a corresponding bump formed on one of the light-emitting diode wafers The pad on the pad may cover the fl, the surface of the corresponding pad and the first metal layer of the convex body on the corresponding pad; and a second metal layer formed on a corresponding first metal layer. 16 · The package according to item 15 of the scope of patent application, wherein each first metal layer is composed of a nickel layer and a gold layer. 1 7 · The package as described in item 12 of the scope of patent application, further comprising a plurality of boundary metal layers formed on a corresponding solder pad.口 18. The package as described in item 17 of the patent claim, wherein the electrical bumps include: a V, one percent formed on a corresponding boundary metal layer, formed of a non-conductive material one on one The corresponding boundary metal layer 俾 may cover the surface of the boundary metal layer and on the corresponding boundary metal Ύ of the first metal layer d and the convex body, 丨 / from a corresponding I π this / On the yf, each of them, each of these guides, each guide 19 • The metal layer of the package as described in item 18 of the scope of patent application, each consisting of a nickel layer and a gold layer. 2 0 · The package as described in item 12 of the scope of patent application. The electrical bumps are formed of #gold. 2 1 · Feng Jun body as described in item 12 of the scope of patent application 1244705 -----, Patent application scope The electric bump includes: a conductive contact formed on the light emitting diode and a conductive solder joint formed on a corresponding conductive contact. A light-emitting diode chip package including a central core and an insulating substrate having at least one wafer mounting Γ / 美 夕 a wafer mounting area having a wafer mounting surface, 〆F / 7? Order female day μ h口 口 / I i If I 片 女 # The opposite back surface, several through holes penetrating through the back surface of the wafer mounting surface, and several conductive tracks extending from the wafer mounting surface to the back surface through corresponding penetrations; board I. A substrate insulating layer formed on the wafer mounting surface of the insulating base having a wafer mounting area and a forming force · An open body for exposing a central area of the at least one wafer mounting area To a light-emitting diode wafer, the at least one light-emitting diode is placed on the at least one wafer mounting area of the insulating substrate and a rail is attached to a pad mounting surface, and several pads are mounted on the pad mounting surface. A pad, and a rear surface opposite to the mounting surface of the pad; a light reflecting coating, the light reflecting coating is disposed on the at least one light emitting diode wafer. Luan Pei has a plurality of pads exposed on the surface and having a plurality of corresponding pads for exposing the at least one light-emitting diode wafer, a plurality of conductive protrusions, each of which is disposed on the at least one light-emitting One of the diode pads corresponds to the pad and is connected to the insulating substrate. Page 31 1244705 VI. Scope of patent application The corresponding conductive track on the wafer mounting surface of the at least one wafer mounting area is electrically connected; ^, a thermally conductive layer, which is made by passing a thermally conductive material through these A through hole is formed by injecting a space formed between the insulating substrate, the at least one light emitting diode wafer and the conductive protrusions; and a light transmitting element formed on a rear surface of the at least one light emitting diode wafer. 2 3 · The package according to item 22 of the scope of patent application, further comprising a reflective coating formed on an inner wall surface defining each opening. 24. The package according to item 22 of the scope of application, which further includes a plurality of conductors, and each conductive convex system is electrically connected to the corresponding circuit track via the corresponding conductors of 〆. μ 1 Among them, the heat conduction among them, the heat conduction 2 5 · The package body layer as described in Item 22 of the scope of patent application is formed of a metal, an insulating heat conduction material. 26. The package layer according to item 22 of the application scope is formed of a non-metallic insulating and thermally conductive material. 27. The package according to item 22 of the scope of patent application, wherein the element is doped with a dye powder. ^ 28. The package as described in Application No. 22 of the Patent Scope, wherein the electrical bumps include: a 幵 > a protrusion formed of a non-conductive material on a 烊 pad corresponding to one of the light emitting diode wafers F is formed on a pad corresponding to one of the light-emitting diode wafers, and should be used by a shi shi zhi yu zhi xi zhi and a prostitute who scrutinizes the track of the turtle μ μ 胄. # ..V; " 八 口 么 口 又 / 々 一 々 π 肌 日 日 门 ~~ ^ 汗 堂 '' can cover the surface of the corresponding pad and the protrusion on the corresponding pad The second metal layer on page 32 of 1447705 6. The first metal layer in the scope of patent application; and each of them includes several ones, each of which is 2 9 · Packaging as described in item 28 of the scope of patent application The bulk metal layer is composed of a nickel layer and a gold layer. 30. The package as described in item 28 of the scope of patent application, a boundary metal layer formed on a corresponding pad. 3 1 · The electrical bump of the package as described in item 30 of the application scope includes: a non-conducting bump formed on a corresponding boundary metal layer; The surface of the corrosive metal layer and the metal storm layer on a corresponding boundary metal layer and all 1 ^ how the metal layer and the convex body on the metal layer are formed on a corresponding boundary. Corresponding to the second 32. The package as described in item 31 of the scope of patent application, wherein 々f: the two metal layer gas is composed of a nickel layer and a gold layer. Female-No. 33. The package as described in item 28 of the scope of application, the i-electric bump is formed of gold.宁, Ning, the temple guide 34. The electric bump as described in item 28 of the scope of patent application includes: 'wherein' each guide is formed on the light-emitting diode wafer—conducting conductive contacts; and < correspondingly 35 · a conductive light-emitting diode chip package formed on a corresponding conductive contact on the pad, including: ",,. Page 33 1247005 ^ an insulating substrate having at least one wafer mounting and the wafer mounting surface = f: wide area wafer mounting table ... with through holes on the back side, and: ... several holes penetrating the wafer mounting surface To extend to the back side :; f the mounting surface of the wafer via a corresponding conductive track; the substrate insulation layer of the board is formed on the insulating base-for exposing the substrate t The wafer of the domain is mounted on the surface and is a shaped hole; the open-body wafer in the central area of a wafer mounting area is disposed on the bulk crystal 4 'the at least one light-emitting diode and has- The at least one wafer mounting area is soldered together, and the back surface opposite to the surface of the lambda-coating layer is opposite to the soldering surface mounted on the material mounting surface; the through-hole injection is formed at the edge free of zeta heat / borrowing A thermally conductive material is formed through the space between the conductive protrusions, the heat-dissipating plate, and the at least one light-emitting diode wafer 1: and is formed between only the electric convex bodies. The inner wall of an opening The corresponding part of the conductive wafer has two inner insulating material layers. The insulating material layer is prepared in a thickness close to the thickness of the insulating material layer, which is smaller than the thickness of the portion near the insulating layer of the substrate. The material layer has a recessed upper surface;-a metal reflective layer formed on the surface of the Kl material layer; a transparent protective layer on the light-reflective conductive reflective layers; and a diode wafer ^ 'each conductive convex system is disposed on The at least one I 9 -corresponding pad is connected to the insulating substrate Page 34 1244705 6. Scope of patent application The corresponding conductive tracks on the wafer mounting surface of the at least one wafer mounting area are electrically connected. 36. The package according to item 35 of the scope of patent application, further comprising a plurality of conductive bodies, and each conductive convex system is electrically connected to the corresponding circuit track through a corresponding conductive body. 37. The package of claim 35, wherein the thermally conductive layer is formed of a metal insulating and thermally conductive material. 3 8. The package as described in claim 35, wherein the thermally conductive layer is formed of a non-metallic insulating and thermally conductive material. 39. The package according to item 35 of the scope of patent application, wherein each conductive bump comprises: a bump formed of a non-conductive material formed on a corresponding pad of one of the light-emitting diode wafers. A first metal pad formed on a corresponding pad of the light-emitting diode wafer to cover the surface of the corresponding pad and the convex body on the corresponding pad; and a first formed on a corresponding first pad A second metal layer on a metal layer. 40. The package according to item 39 of the scope of the patent application, wherein each second metal layer is composed of a recording layer and a gold layer. 4 1. The package according to item 35 of the application, further comprising a plurality of interface metal layers each formed on a corresponding solder pad. 4 2. The package according to item 41 of the scope of patent application, wherein each conductive bump comprises: a non-conductive material formed on a corresponding boundary metal layer Page 35 1247075 VI. Application for patent scope, \ Convex body formed;-formed on a corresponding boundary metal layer; can cover the surface of the corresponding boundary metal layer and the surface of the corresponding boundary metal layer; A first metal layer of the convex body; and a second metal layer formed on a corresponding first metal layer. 4 3. The package according to item 42 of the scope of patent application, wherein each second metal layer is composed of a nickel layer and a gold layer. 4 4. The package as described in claim 35, wherein the conductive bumps are formed of gold. 4 5. The package according to item 35 of the scope of patent application, wherein each conductive bump includes: a conductive contact formed on a pad corresponding to one of the light-emitting diode chips; and A conductive solder joint on a corresponding conductive contact. 4 6. A light emitting diode chip package comprising: a light emitting diode chip having a pad mounting surface, a plurality of pads mounted on the pad mounting surface, and A rear surface opposite to the mounting surface of the cymbal pad; t a light reflecting coating, which is disposed on the pad mounting surface of the light emitting diode wafer and has a light emitting diode for exposing the light emitting diode The pad exposure holes corresponding to the corresponding solder pads of the body wafer; a light-transmitting element is provided on the rear surface of the light-emitting diode wafer; and a plurality of conductive bumps, each of which is Set on the glow Page 36 —The corresponding solder pad ° 4 7 · The package as described in item 46 of the patent application scope, further comprising a total reflection metal disposed between the rear surface of the light emitting diode wafer and the lower surface of the far-transmissive element Floor. 48. The package as described in item 47 of the patent application of Shenyan, further comprising a semi-reflective metal layer disposed on the upper surface of the light-transmitting element. The light-transmitting, light-transmitting, light-transmitting, light-transmitting, light-transmitting 49. The package according to item 46 of the scope of patent application, wherein the element is formed of a glass material and is really a hollow light-transmitting element. Infused with blunt gas skull. 50. The sealed body according to item 46 of the scope of the patent application, wherein the element is formed of a glass material and is really a hollow light-transmitting element. The inside of the element is injected with a liquid dye or a fluorescent agent. 5-1 · The seal body according to item 46 of the scope of patent application, wherein the extraordinary piece is formed of a transparent insulating material mixed with polarizing dye particles. 52. The package according to item 46 of the application, wherein each of the electrical bumps includes: a convex body formed of a non-conductive material formed on a pad corresponding to one of the light-emitting diode wafers; : A first metal layer covering a surface of the corresponding pad and a convex body on the corresponding pad on a corresponding pad of the light-emitting diode wafer; and a formed on a corresponding A second metal layer on the first metal layer. 5-3. The cracked body as described in item 52 of the application, wherein each first metal layer is composed of a nickel layer and a gold layer. Page 37 1244705 6. Scope of patent application 5 4. The package according to item 46 of the scope of patent application, further includes a plurality of interface metal layers each formed on a corresponding pad. 5 5. The package according to item 54 of the scope of patent application, wherein each conductive bump includes: a bump formed of a non-conductive material formed on a corresponding boundary metal layer; and a bump formed on A corresponding first metal layer covering a surface of the corresponding boundary metal layer and a convex body on the corresponding boundary metal layer; and a corresponding first metal layer formed on the corresponding boundary metal layer; On the second metal layer. 56. The package according to claim 55, wherein each of the second metal layers is composed of a nickel layer and a gold layer. 57. The package of claim 46, wherein the conductive bumps are formed of gold. 5 8. The package according to item 46 of the scope of application · patent, wherein each conductive bump includes: a conductive contact formed on a pad corresponding to one of the light-emitting diode chips, and t-formed A conductive solder joint on a corresponding conductive contact. 5 9. —Packaging method for a 'first diode chip package', including the following steps: Provide a light emitting diode chip, the light emitting diode chip has a pad mounting surface, and several are mounted on the solder A solder pad on the pad mounting surface, and a rear surface opposite to the solder and pad mounting surface; Page 38, 1244705 6. The scope of the patent application is to set a light reflecting coating on the pad mounting surface of the light emitting diode wafer. The light reflecting coating has several corresponding weldings for exposing the light emitting diode wafer. A pad exposure hole of the pad; forming a surface insulation layer on the rear surface of the light emitting diode wafer, the surface insulation layer having a central perforation for exposing a central portion of the rear surface of the light emitting diode wafer; A light-transmitting element is disposed in a central perforation of the surface insulation layer and a conductive block is disposed on each pad of the light-emitting diode wafer. 60. The packaging method according to item 59 of the scope of patent application, wherein in the step of placing the light-transmitting element, the light-transmitting element has an arc-shaped negative and negative portion. \ 6 1. The packaging method according to item 59 of the scope of patent application, wherein in the step of setting the light-transmitting element, the light-transmitting element has a flat top portion. 62. The package Fang Heng described in item 59 of the application scope, further includes the step of setting a second light transmitting element on the top part of the light transmitting element 'the light transmitting elements are doped There are different wavelengths of polarizers. 6 3 · The packaging method as described in item 59 of the scope of patent application, wherein the step of setting the conductive bumps includes the following steps: Non-conductive material is used on each pad of the light-emitting diode wafer. Forming a convex body; forming a cover on each bonding pad of the light emitting diode wafer Page 44 1244705 ------- Patent Application Scope The surface of the pad-and the first metal layer of the convex body on the pad; and 64 is formed on a first metal layer-a second metal layer. : —Shen # The encapsulation method described in item 63 of the patent scope, wherein, in the step of forming two metal layers, each second metal layer is composed of a nickel layer and a gold layer, and nr is included in each Among them, the step of forming a boundary metal layer on the solder joint with the package method θ as described in Item 59 of the patent application scope. 6. The packaging method as described in item 65 of the scope of patent application, wherein the step of setting a V electric bump includes the following steps: Lightning on each boundary metal layer of the light emitting diode wafer A non-conductive material is used to form a convex body; alternatively, a surface of a 4 a junction metal layer and a convex body on the junction metal layer are formed on each of the 1¾ light-emitting diode wafers. A first metal layer; and forming a second metal layer on each of the first metal layers. The packaging method according to item 66 of the scope of patent application, wherein in the step of forming the first to rhenium layers, each first metal layer is composed of one layer and a rhenium layer. "68. The encapsulation method as described in item 59 of the scope of patent application, wherein in the step of providing conductive bumps, the conductive bumps are formed of gold. 69 ·, such as the application of the 59th scope of the application In the packaging method, the step of setting the conductive bump I includes the following steps: setting a conductive contact on a female pad of the light-emitting diode wafer; Page 40 1247705, the scope of patent application __ Insulation layer formation: light: formed on the line reflection coating-the first-insulating layer, the first hole; there are several open layer systems that expose at least part of the corresponding conductive contacts A second insulating layer is formed on the image forming layer, and the second insulating layer should have a large f-insulating layer corresponding to the corresponding opening and communicate with the openings and through holes communicating with each other than the pair of solder paste filling;孔 的 锡膏 错 # ^ Back / Processing fills these openings and holes that communicate with each other. Extending through the 哕 i hole: f-a conductive solder joint that is electrically connected to the corresponding conductive contact and has an end protruding outside the d through-hole; the conductive solder joint is protruded outside the through-hole by sound grinding Grind and remove the second insulating layer. Method 'contains the following 70' packaging steps of a light emitting diode chip package: providing a light emitting diode chip 'The light emitting diode chip has a pad mounting surface, and several are mounted on the pad A solder pad on the mounting surface, and a rear surface opposite to the mounting surface of the solder pad; ^ A light reflecting coating is provided on the rear surface of the light emitting diode wafer; an insulating protection layer is formed on the light reflecting coating; an insulating layer is formed on the pad mounting surface of the light emitting diode wafer, the The insulating layer has a central perforation for exposing the central portion of the pad mounting surface of the light-emitting diode wafer and several for exposing the corresponding solder Page 41 1244705 VI. Patent application pads Pad exposure holes; a light-transmitting element is provided in the central perforation of the insulating layer; and a conductive bump is provided on each pad of the light-emitting diode wafer. 7 1. The packaging method according to item 70 of the scope of patent application, wherein in the step of setting the light-transmitting element, the light-transmitting element has a flat top portion. 7 2. The packaging method according to item 71 of the scope of patent application, wherein the step of providing a light-transmitting element further includes a step of placing a second light-transmitting element on a top portion of the light-transmitting element, These light-transmitting elements are doped with polarizers of different wavelengths. 7 3. The packaging method according to item 70 of the scope of patent application, wherein the step of setting the conductive bumps includes the following steps: forming a non-conductive material on each pad of the conventional light emitting diode wafer A convex body; forming a first metal layer on each bonding pad of the light emitting diode wafer covering the surface of the bonding pad and the convex body on the bonding pad; and f forming a first metal layer on each first metal layer Two metal layers. 7 4. The packaging method according to item 73 of the application, wherein in the step of forming the second metal layer, each second metal layer is composed of a nickel layer and a gold layer. 75. The packaging method as described in item 70 of the scope of patent application, further comprising the step of forming a boundary metal layer on each of the bonding pads of the light emitting diode carrier wafer. 76. The packaging method described in item 75 of the scope of patent application, wherein Page 12 1244705 The step of placing the conductive bumps includes the following steps: forming a convex body with a non-conductive material on the mother interface metal layer; forming a surface covering the interface metal layer on each interface metal layer and The _ metal layer of the bump on the metal layer; and A second metal layer is formed on each first metal layer. 77. The sealing method according to item 76 of the scope of patent application, wherein in the step of forming the second metal layer, each / second metal layer is composed of a brocade layer and a gold layer. 〃 78. The packaging method according to item 70 of the scope of patent application, wherein the conductive bumps are formed of gold. '79 · — A packaging method for a 1-diode wafer package, including the following steps: providing an insulating substrate having at least one wafer mounting area, the at least one wafer mounting area having a wafer mounting surface, a A back surface opposite to the mounting surface of the wafer, a plurality of through holes penetrating the wafer mounting surface and the back surface, and a plurality of conductive tracks extending from the wafer mounting surface to the back surface through corresponding through holes; A substrate insulating layer is formed on a wafer mounting surface of the at least one wafer mounting region, and the substrate insulating layer is formed with an opening for exposing a central region of the at least one wafer mounting region; providing at least one light emitting diode wafer, the The at least one light emitting diode wafer is disposed on the at least one wafer mounting area of the insulating substrate and has a pad mounting surface, a plurality of pads mounted on the pad mounting surface, and a pad mounting. Opposite surface Page 43 1247005 Six 'patent application scope ^ On the pad mounting surface of the at least one light-emitting diode wafer C: light-reflecting coating, the light-reflecting coating has several light-emitting coatings, one light-emitting diode The exposed holes of the corresponding pads of the polar wafer; save the J < 31 on each of the pads of the light-emitting diode wafers: the conductive bump system and the at least one piece of connecting wafer of the insulating substrate Corresponding conductors on the mounting surface, electrical trajectories, electrical ground, substrates, and materials are injected into the insulation space through the through holes to form a thermally conductive ^ 忐 diode wafer and the conductive protrusions. Light transmitting element. ° Hai to /-A light emitting diode wafer is provided with an 80 on the surface. For example, if the patent application bell m defines each-"the hole within the 79th item / method, the method is not included in the 8! · Such as The scope of the patent application is ^ face ^ reflective coating step. Several conductors in the method of facing / J9 described in the Guangfengxiang method further include forming a via-corresponding guide? 2 steps of road track • 'each •, electric convex system 8 2. If you apply for a' patent scope body ', corresponding to the electricity of f, the track is electrically connected. In the step of forming the heat-conducting layer, Λ; 9 items of household weight method, wherein, is formed. The thermal conduction system is formed of a metal insulating thermally conductive material. 3. As described in the 79th step of the patent application process for forming the thermal conduction layer, the second method is described. Far thermal conductivity is formed by non-metallic insulating and thermally conductive materials. 84. The encapsulation method described in item 7 or 9 of the patent application park, where 1244705 6 'Application for patent scope 〇 In the step of placing a light-transmitting element, the light-transmitting element is 85. As described in item 79 of the scope of application for patent, the skin is strong and mixed with dye powder. The step of placing the conductive bumps includes the following steps. In the method, a bump is formed on each of the light-emitting diode wafers; a non-conductive material is provided on the light-emitting diodes. The surface of each 烊 ^ pad of the wafer and the first of the convex body on the pad—formed to cover the first metal layer of the mother—formed second, and 8 6 The encapsulation party described in item '2. In the step of two metal layers, each second metal layer is composed of one and one gold layer. Tian solder layer only: The packaging method described in item 79 of the application scope further includes the step of forming a boundary metal layer on each pad. 8 8 The packaging method as described in item 87 of the scope of patent application, wherein the step of setting the conductive bumps includes the following steps: forming a convex body with a non-conductive material on the stupid boundary metal layer; Forming on each boundary metal layer a first metal layer covering the surface of the boundary metal layer and a convex body on the boundary metal layer; and forming a second metal layer on each first metal layer Metal layer. 89. The packaging method according to item 88 of the scope of patent application, wherein, in the step of forming the second metal: Λ layer, each / first mongolian layer is composed of a nickel layer and a gold layer. 90. The sealing method described in item 79 of the scope of patent application, wherein in the step of setting the conductive bumps, the conductive bumps are formed of gold. 1244705 VI. Application for Patent Scope 91. For the method of encapsulating conductive bumps in the scope of application, the encapsulation method described in item 9 above, wherein the following two steps are included in the light-emitting package: point; | day A conductive contact is provided on the mother pad of the Japanese film ~ Home: Formed on the reflective coating of the light line-the-insulation exhibition, sign hole; at least-part of the open layer system corresponding to the * electrical contact is formed The marginal layer's second insulation should correspond to the corresponding openings of the insulation layer of the opening body, and the openings and through holes communicating with each other than the pair = tin stomach filling are connected to each other; Solder paste system is formed-the openings which communicate with the corresponding conductive contacts are extended to the external conductive solder joints; the alum is connected and the ends are convex. The protruding parts of the conductive solder joints are ground by grinding. Flat; and A removes the σ-Hyper-Insulation layer at the outer end of the through-hole. Μ · —Painting of a light-emitting diode chip package, the steps are as follows: F includes providing an insulating substrate having at least one mounting area, and the at least one wafer mounting area having one wafer—one side, one side, A back surface opposite to the mounting surface of the wafer, a plurality of through holes penetrating through the mounting surface and the back surface, and a plurality of conductive tracks extending from the wafer mounting holes to the back surface; And A by Page 46! 244705 A substrate-insulating wafer is formed on the surface of the at least one wafer of the insulating substrate for exposing the at least one wafer mounting area; == yes-providing at least one light-emitting diode wafer, and a second opening; = Polar body wafer system, the one or two light-emitting solder-mounting surfaces provided on the insulating substrate, a plurality of solder pads mounted on the; and a rear surface opposite to the solder-pad mounting surface. The surface is borrowed by '' by passing a thermally conductive material through the through holes / '^ ^ ^-^ # ^, a „Λ t Λ f. ^ Jk Tl / JL > Two to form a thermally conductive layer; j J forms an insulating material layer in the inner wall surface defining each opening and the corresponding conductive convex body: the insulating material layer is close to the part of the second sheet Has a thickness smaller than that of the portion near the insulating layer of the substrate so that each insulating material layer has a recessed upper surface; a metal reflective layer is formed on the surface of the insulating material layer; A transparent protective layer is formed on the five-metal reflective layer; and a conductive bump is formed on each pad of the at least one light-emitting diode wafer, and the conductive bumps are connected to the insulating substrate. Corresponding conductive tracks on the wafer mounting surface of a wafer mounting area are electrically connected. 9 3 · According to the application, the encapsulation method described in item 92 of the patent scope further includes the step of forming a conductive body on each conductive track < each conductive convex system passes a corresponding conductive body to correspond to the corresponding Circuit traces are electrically connected. 9 4 · The encapsulation method described in item 92 of the scope of patent application, wherein Page 47 1244705 VI. Scope of patent application ----- In the step of forming a thermally conductive layer, the continuous conductive layer is formed by the entire eyebrow. Τ3. The shape of the insulating and thermally conductive material 95. The encapsulation method according to item 92 of the scope of application for a patent, wherein in the step of forming a thermally conductive layer, the thermally conductive layer is formed by incomplete contact. ^ F belongs to the shape of an insulating and thermally conductive material 9 6. The packaging method as described in Item 92 of the scope of patent application, wherein the step of air-conducting conductive bumps includes the following steps: ° f, at 17 A convex body is formed on the female pad of the polar body wafer by a non-conductive lightning trap; the material is formed on each pad of the light-emitting diode wafer. The table of the Shun pad and the first part of the convex body on the pad is formed. A metal layer; and a metal plate "to form a second metal layer on each of the first metal layers. 9 7 · The packaging method as described in item (2) of the Shen Qing patent scope, wherein the step of forming the second metal layer In each, the second metal layer is composed of a gold layer, a screw layer and a 'K are included in every 98. The packaging method described in item 92 of the scope of patent application, 4 steps of forming a boundary metal on the pad In which, the step of forming a conductive bump as described in the package method described in item 98 of the scope of patent application includes the following steps: A convex body is formed with a non-conductive material on the% -bound metal layer. ; Forming a boundary metal layer on each boundary metal layer; A first metal layer on the surface and a convex body on the boundary metal layer; and a second metal layer is formed on each of the first metal layers. 1 0 0 · As described in item 99 of the patent application Encapsulation method, in which Page 48 1244705 -------- The second metal layer is each composed of a nickel layer and a packaging method as described above, in which the current bump is formed of gold. The encapsulation method described above, wherein in the step of setting a patent application scope to form a second metal layer, each / gold layer is constituted. 101. In the step of applying the conductive bumps set in item 92 of the scope of patent application, the conductive bumps are formed of gold 102. The encapsulation party described in item 92 of the scope of patent application. ^ The step of placing conductive bumps includes the following steps: a conductive contact is provided on each pad of the light-emitting diode wafer; a first insulating layer is formed on the light-reflective coating layer, and the first system The edge edge layer is formed with a plurality of openings L that expose at least a part of the corresponding conductive contact; a second insulating layer is formed on the first insulating layer, and the second insulating layer is formed into a plurality of first insulating layers. Corresponding openings communicate through and are larger than the corresponding openings; f Solder paste fills the openings and through-holes that communicate with each other; fills these consecutive gates a 4 and s by reflow soldering. The tin deficiency of the hole forms a corresponding lead, the opening of which is connected to the conductive solder joint μm extending outside the through hole, and the end is convex, and the lead pinch portion is ground by grinding; and I, The end of the dimple protruding outside the through hole removes the second insulating layer. 1 〇3 · — Seeding and Photodiode Wafer Encapsulation Steps: A method for packaging a t-body, including the following: Provide a light-emitting diode m branch chip, the light-emitting diode wafer has 苐 Page 49 1244705 6. Scope of patent application Formed by transparent insulating material of agent particles. 1 0 9. The packaging method as described in item 103 of the scope of patent application, wherein the step of setting the conductive bumps includes the following steps: non-conductive on each pad of the light-emitting diode wafer A material forms a convex body; a first metal layer covering the surface of the bonding pad and a convex body on the bonding pad is formed on each of the pads of the light-emitting diode wafer; and each of the first metal layers is formed A second metal layer. 1 10. The packaging method according to item 109 of the scope of patent application, wherein in the step of forming the second metal layer, each second metal layer is composed of a nickel layer and a gold layer. m. The packaging method as described in item 103 of the scope of patent application, further comprising a step of forming a boundary metal layer on each pad. 1 1 2. The packaging method as described in item 11 of the scope of the patent application, wherein the step of setting the conductive bump < block by the person includes the following steps: A conductive material forms a convex body; forming a first metal layer covering each surface of the boundary metal layer and the convex body on the boundary metal layer on each boundary metal layer; and each first metal layer A second metal layer is formed on the metal layer. I 1 3. The packaging method according to item 11 of the scope of patent application, wherein in the step of forming the second metal layer, each second metal layer is composed of a recording layer and a gold layer. II 4. The packaging method as described in item 103 of the scope of patent application, wherein in the step of providing conductive blocks, the conductive bumps are formed of gold. Page 51