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TW200601470A - Chip package and process for the same - Google Patents

Chip package and process for the same

Info

Publication number
TW200601470A
TW200601470A TW093128389A TW93128389A TW200601470A TW 200601470 A TW200601470 A TW 200601470A TW 093128389 A TW093128389 A TW 093128389A TW 93128389 A TW93128389 A TW 93128389A TW 200601470 A TW200601470 A TW 200601470A
Authority
TW
Taiwan
Prior art keywords
trace
connection area
electric element
metal line
thick metal
Prior art date
Application number
TW093128389A
Other languages
Chinese (zh)
Other versions
TWI301647B (en
Inventor
Mou-Shiung Lin
Original Assignee
Megic Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Megic Corp filed Critical Megic Corp
Priority to US11/157,186 priority Critical patent/US8067837B2/en
Priority to US11/183,648 priority patent/US8198729B2/en
Publication of TW200601470A publication Critical patent/TW200601470A/en
Application granted granted Critical
Publication of TWI301647B publication Critical patent/TWI301647B/en
Priority to US13/271,004 priority patent/US8742582B2/en

Links

Classifications

    • H10W74/15—

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Wire Bonding (AREA)

Abstract

The present invention discloses a chip package and a process for the same. In the invention, a semiconductor chip includes a thick metal line that can directly contact a trace of another electric element with a large connection area or that can connect one with a large connection area by a conductive layer composed of polymer and multiple metal particles. Consequently, the resistance between the thick metal line and the trace of the electric element can be diminished. The thick metal line of the semiconductor chip and the trace of the electric element connecting to each other with a large connection area can transmit signals with lower noise or can provide a stable power voltage and a ground voltage.
TW093128389A 2004-06-18 2004-09-20 Chip package and process for the same TWI301647B (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
US11/157,186 US8067837B2 (en) 2004-09-20 2005-06-17 Metallization structure over passivation layer for IC chip
US11/183,648 US8198729B2 (en) 2004-07-16 2005-07-18 Connection between a semiconductor chip and a circuit component with a large contact area
US13/271,004 US8742582B2 (en) 2004-09-20 2011-10-11 Solder interconnect on IC chip

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US58074704P 2004-06-18 2004-06-18
US58859504P 2004-07-16 2004-07-16

Publications (2)

Publication Number Publication Date
TW200601470A true TW200601470A (en) 2006-01-01
TWI301647B TWI301647B (en) 2008-10-01

Family

ID=44801241

Family Applications (3)

Application Number Title Priority Date Filing Date
TW096126071A TWI304239B (en) 2004-06-18 2004-09-20 Semiconductor chip, chip package and chip package process
TW093128389A TWI301647B (en) 2004-06-18 2004-09-20 Chip package and process for the same
TW093131516A TWI320956B (en) 2004-06-18 2004-10-18 Semiconductor chip, chip package and chip package process

Family Applications Before (1)

Application Number Title Priority Date Filing Date
TW096126071A TWI304239B (en) 2004-06-18 2004-09-20 Semiconductor chip, chip package and chip package process

Family Applications After (1)

Application Number Title Priority Date Filing Date
TW093131516A TWI320956B (en) 2004-06-18 2004-10-18 Semiconductor chip, chip package and chip package process

Country Status (1)

Country Link
TW (3) TWI304239B (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI381500B (en) * 2009-01-16 2013-01-01 欣興電子股份有限公司 Package substrate embedded with semiconductor wafer and preparation method thereof
US8969191B2 (en) * 2013-07-16 2015-03-03 Taiwan Semiconductor Manufacturing Co., Ltd. Mechanisms for forming package structure

Also Published As

Publication number Publication date
TW200601471A (en) 2006-01-01
TWI320956B (en) 2010-02-21
TWI301647B (en) 2008-10-01
TW200814211A (en) 2008-03-16
TWI304239B (en) 2008-12-11

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Legal Events

Date Code Title Description
MK4A Expiration of patent term of an invention patent