RU2008116450A - FUNCTIONAL STRUCTURE OF THE PARALLEL ADDITOR OF THE TRINITION CALCULATION SYSTEM f (+ 1,0, -1) IN THE POSITIONALLY SIGNED ITS IMPLEMENTATION f (+/-) (OPTIONS) - Google Patents
FUNCTIONAL STRUCTURE OF THE PARALLEL ADDITOR OF THE TRINITION CALCULATION SYSTEM f (+ 1,0, -1) IN THE POSITIONALLY SIGNED ITS IMPLEMENTATION f (+/-) (OPTIONS) Download PDFInfo
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Abstract
1. Функциональная структура параллельного сумматора троичной системы счисления f(+1,0,-1) в позиционно-знаковой ее реализации f(+/-), в которой условно «i» разряд выполнен в виде двух эквивалентных по структуре логических функций положительного и условно отрицательного каналов суммирования аргументов слагаемых ±[ni] и ±[mi] позиционно-знаковой системы счисления f(+/-), в которой положительный канал суммирования «i» разряда включает входную логическую функцию f1(&)-И-Ð�Е, в которой две функциональные входные связи являются входными связями для приема положительных входных аргументов +ni и +mi, а функциональная выходная связь, которая соответствует положительному аргументу второй промежуточной суммы +S2 i, функционально связана с третьей функциональной связью логической функции f2(&)-И, положительный канал включает логическую функцию f2(})-ИЛИ, функциональная выходная связь которой является второй функциональной входной связью логической функции f4(&)-И, выходная связь которой является первой входной связью выходной логической функции f4(})-ИЛИ, посредством которой формируют положительный аргумент результирующей суммы +S2 i, положительный канал также включает логические функции f3(})-ИЛИ и логические функции f1(&)-И, f3(&)-И, f5(&)-И, f6(&)-И, отличающаяся тем, что в условно «i» разряд положительного канала суммирования введены логические функции f1(}&)-ИЛИ-Ð�Е, f2(}&)-ИЛИ-Ð�Е и логическая функция f1(})-ИЛИ, функциональные входные связи которой являются входными связями приема положительных аргументов +ni и +mi, а функциональная выходная связь, которая соответствует положительному аргументу первой промежуточной суммы +S1 i, является функциональной выход1. The functional structure of the parallel adder of the ternary number system f (+ 1,0, -1) in its position-sign implementation f (+/-), in which the conditionally “i” digit is made in the form of two logical functions of positive and of the conditionally negative channel for summing the arguments of the terms ± [ni] and ± [mi] of the position-sign number system f (+/-), in which the positive channel for summing the “i” category includes the input logical function f1 (&) - И-Р� Р •, in which two functional input links are input links for when the positive input arguments + ni and + mi, and the functional output link, which corresponds to the positive argument of the second intermediate sum + S2 i, is functionally connected with the third functional link of the logical function f2 (&) - Р˜, the positive channel includes the logical function f2 (} ) -OR, the functional output link of which is the second functional input link of the logical function f4 (&) - Р˜, the output link of which is the first input link of the output logical function f4 (}) - OR, through which the positive the argument of the resulting sum + S2 i, the positive channel also includes the logical functions f3 (}) - OR and the logical functions f1 (&) - Рl, f3 (&) - Рl, f5 (&) - Рl, f6 (& ) -Р˜, characterized in that in the conditionally “i” bit of the positive summation channel the logical functions f1 (} &) - РлÐ ›Ð˜-РлÐ •, f2 (} &) - ИЛ Ð are introduced ˜-lp • and the logical function f1 (}) is OR, whose functional input connections are input connections of receiving positive arguments + ni and + mi, and the functional output connection, which corresponds to the positive argument of the first intermediate sum + S1 i, is functional output
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| RU2008116450/09A RU2380741C1 (en) | 2008-04-29 | 2008-04-29 | FUNCTIONAL STRUCTURE OF CONDITIONALLY "i" POSITION OF PARALLEL ADDER FOR TERNARY NUMBER SYSTEM f(+1,0,-1) IN ITS POSITION-SIGN FORMAT f(+/-) |
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| RU2429522C1 (en) * | 2010-05-25 | 2011-09-20 | Лев Петрович Петренко | FUNCTIONAL STRUCTURE OF ADDER fi(Σ) OF ARBITRARY "i" BIT FOR LOGIC-DYNAMIC PROCESS OF SUMMATION OF POSITIONAL ARGUMENTS OF TERMS [ni]f(2n) and [mi]f(2n) USING ARITHMETIC AXIOMS OF TERNARY NUMBER SYSTEM f(+1,0,-1) (VERSIONS OF RUSSIAN LOGIC) |
| RU2439659C1 (en) * | 2010-06-01 | 2012-01-10 | Лев Петрович Петренко | METHOD OF LOGIC-DYNAMIC PROCESS OF SUMMATION OF POSITIONAL ARGUMENTS OF ANALOGUE SIGNALS [ni]f(2n) AND [mi]f(2n) WITH APPLICATION OF ARITHMETIC AXIOMS OF TERNARY NUMBER SYSTEM f(+1,0,-1) AND GENERATION OF RESULTING SUM OF ANALOGUE SIGNALS [Sj]f(2n) IN POSITIONAL FORMAT (RUSSIAN LOGIC) |
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| SU1727120A1 (en) * | 1989-12-22 | 1992-04-15 | Курский Политехнический Институт | Device for parallel addition of binary signed numbers |
| RU2069009C1 (en) * | 1993-12-07 | 1996-11-10 | Научно-исследовательский институт многопроцессорных вычислительных систем при Таганрогском радиотехническом институте им.В.Д.Калмыкова | Adding device |
| UA23363U (en) * | 2006-11-28 | 2007-05-25 | Admiral Makarov Shipbuilding N | Parallel adder |
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