JP2010040588A - Silicon wafer - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a silicon wafer that is made free from a Grown-in defect, has high gettering effect, prevents BMD from being deposited in a device active region, and is improved in thermal strength of the device active region. <P>SOLUTION: The silicon wafer has a high-oxygen-concentration region where a solid solution oxygen concentration is ≥0.7×10<SP>18</SP>atoms/cm<SP>3</SP>in a no-defect region (DZ layer) 12 including at least the device active region of the silicon wafer 10, and contains interstitial silicon 14 in the no-defect region 12 in a supersaturation state. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a silicon wafer used for manufacturing a semiconductor device.

  With the recent high integration of semiconductor devices, quality requirements for silicon wafers used as substrates have become severe. In particular, there is a strong demand for eliminating a grown-in defect in a device active region of a silicon wafer and providing a high gettering effect.

In response to these requirements, including a region below the lowest interstitial silicon concentration capable of forming interstitial dislocations belonging to a perfect region where there are no interstitial silicon type point defect aggregates and no vacancy type point defect aggregates, A silicon single crystal ingot having an oxygen concentration of 0.97 × 10 ^{18 to} 1.4 × 10 ¹⁸ atoms / cm ³ is pulled up, and the silicon wafer cut out from the ingot is mixed with a silane compound and dinitrogen monoxide. A technique of holding at 700 to 900 ° C. for 30 to 120 minutes in an atmosphere is known (for example, Patent Document 1).

  In addition to these requirements, for the purpose of obtaining a silicon substrate that ensures the mechanical strength of the substrate, it is heated to a temperature of 1100 ° C. or higher and lower than the temperature T indicated by the specific relational expression for at least 10 minutes or longer. A technique is known in which solid solution oxygen in the surface layer is diffused outward by performing the heat treatment (for example, Patent Document 2).

Further, in recent years, as a technique for easily producing a silicon wafer with the above requirements and with high productivity, a technique for subjecting a silicon wafer to rapid heating / cooling heat treatment (RTP: Rapid Thermal Process) is known. (For example, Patent Document 3).
JP 2002-134513 A Japanese Patent Application Laid-Open No. 5-291997 JP 2003-224130 A

  However, the techniques described in Patent Documents 1 to 3 are intended to eliminate a grown-in defect in the device active region and to obtain a high gettering effect, and take into account the precipitation of BMD in the device active region. is not. Normally, this BMD is effective when it is deposited in a bulk region other than the device active region because it has a gettering effect on heavy metals or the like. It becomes a factor to reduce the yield. In addition, a silicon wafer having a high oxygen concentration has a problem that the BMD precipitation density in the bulk region increases, while the BMD precipitation density also increases in the device active region.

  Further, the heat treatment of the silicon wafer in the techniques described in Patent Documents 1 to 3 is an effective means for eliminating a grown-in defect in the device active region and obtaining a high gettering effect. Therefore, slip dislocation may occur at least with respect to the silicon wafer. For this reason, in order to prevent occurrence of slip dislocation, it is effective to improve the thermal strength of the silicon wafer.

  In order to improve the thermal strength, a technique for increasing the concentration of dissolved oxygen in the silicon wafer is well known. However, as the concentration of dissolved oxygen increases, as described above, precipitation of BMD also occurs in the device active region. There is a problem that the density becomes high.

  The present invention has been made in view of the above-described circumstances, has no defect of grown-in defects, has a high gettering effect, and can prevent precipitation of BMD in the device active region. An object of the present invention is to provide a silicon wafer capable of improving the thermal strength of the device active region.

The silicon wafer according to the present invention has a high oxygen concentration region having a solid solution oxygen concentration of 0.7 × 10 ¹⁸ atoms / cm ³ or more in a defect-free region including at least a device active region of the silicon wafer, and The defect-free region contains interstitial silicon in a supersaturated state.

  It is preferable that the solid solution oxygen concentration in the defect-free region is higher than the solid solution oxygen concentration in the bulk region inside the silicon wafer deeper than the defect-free region.

  It is preferable that the concentration of dissolved oxygen gradually decreases from the high oxygen concentration region toward the surface of the silicon wafer.

  The present invention is capable of eliminating a Grown-in defect, providing a high gettering effect, preventing precipitation of BMD in the device active region, and further improving the thermal strength of the device active region. A silicon wafer is provided.

  Hereinafter, an embodiment of the present invention will be described with reference to FIG. FIG. 1 is a cross-sectional view schematically showing a silicon wafer according to this embodiment. In addition, the solid solution oxygen concentration in this specification is a value obtained from a conversion factor based on the 1970-1979 edition Old ASTM standard.

  As shown in FIG. 1, the silicon wafer according to the present embodiment includes a defect-free region (a region in which no BMD or a grown-in defect (including a transfer cluster) exists) including at least a device active region of the silicon wafer 10: ; Hereinafter referred to as a DZ layer) 12 contains interstitial silicon (Interstitial-Si: “i-Si” in the figure) 13 in a supersaturated state.

The fact that interstitial silicon is contained in a supersaturated state here means a two-stage heat treatment (heat treatment at 800 ° C. for 4 hours in an oxygen 100% atmosphere, and further in the same atmosphere (oxygen 100%) After performing heat treatment at 1000 ° C. for 16 hours, Sato etching is performed, the silicon wafer surface is observed with a microscope, and the etch pit density in the region from the surface to a depth of 5 μm is measured. It means 10 pieces / cm ² or less.

  The depth of the DZ layer 12 is formed from the surface 11 of the wafer to the same degree or deeper than the device active region. The depth of the DZ layer 12 is, for example, 5 μm.

The DZ layer 12 includes a high oxygen concentration region having a solid solution oxygen concentration of 0.7 × 10 ¹⁸ atoms / cm ³ or more.

As described above, the silicon wafer according to the present invention contains interstitial silicon in a supersaturated state in the DZ layer 12 and has a high oxygen concentration of 0.7 × 10 ¹⁸ atoms / cm ³ or more. Since it has a concentration region, it is possible to eliminate a Grown-in defect, to obtain a high gettering effect, to prevent precipitation of BMD in the device active region, and to further prevent thermal activation of the device active region. Strength can be improved.

Even interstitial silicon is contained in a supersaturated state in DZ layer 12, when the solid solution oxygen concentration is less than 0.7 × ¹⁰ 18 atoms / cm ^3, the heat in the device active region of the silicon wafer The mechanical strength cannot be improved.

In addition, even if the solid solution oxygen concentration is 0.7 × 10 ¹⁸ atoms / cm ³ or more, if the interstitial silicon is not contained in the DZ layer 12 in a supersaturated state, the solid solution oxygen is not dissolved in the DZ layer 12. Since dissolved oxygen is deposited as BMD (Balk Micro Defect), it is not preferable.

  On the other hand, in the bulk region 15 inside the silicon wafer deeper than the DZ layer 12 of the silicon wafer 10, an aggregate of supersaturated hole type point defects called COP (Crystal Originating Particle) and LSTD (Laser Scattering Tomography Defect). Or oxygen precipitates may remain.

  Next, the manufacturing method of the silicon wafer concerning embodiment of this invention is demonstrated.

To produce a silicon wafer according to the present embodiment described above, first, at the time of growth of a silicon single crystal ingot by the Czochralski method, the solution oxygen concentration is 0.7 × 10 18 ^atoms / cm ³ or near 0 .7 × 10 ¹⁸ atoms / cm ³ is adjusted so as to be ³ or more.

  Specifically, the polycrystalline silicon filled in the quartz crucible in the furnace is heated to form a silicon melt, and the seed crystal is brought into contact with the silicon melt from above the liquid surface while rotating the seed crystal and the quartz crucible. A silicon single crystal ingot is manufactured by pulling up and expanding to a desired diameter to grow a straight body portion. The concentration of the dissolved oxygen at this time can be adjusted by adjusting the rotation speed of the quartz crucible or the pressure in the furnace.

  Next, the manufactured silicon single crystal ingot is processed into a silicon wafer by a known method.

  That is, after slicing the silicon single crystal ingot into a wafer shape with an inner peripheral blade or a wire saw, a silicon wafer is manufactured through processing steps such as chamfering, lapping, etching, and polishing of the outer peripheral portion. Note that the processing steps described here are exemplary, and the present invention is not limited to this processing step.

  Next, rapid heating / cooling heat treatment (RTP) is performed on the manufactured silicon wafer at a temperature of 1300 ° C. to 1380 ° C. in an oxidizing gas atmosphere having an oxygen gas partial pressure of 20% to 100%. Perform Rapid Thermal Process).

In this way, a rapid heating / cooling heat treatment is performed on the silicon wafer having a solid solution oxygen concentration in the vicinity of 0.7 × 10 ¹⁸ atoms / cm ³ or 0.7 × 10 ¹⁸ atoms / cm ³ or more under the above conditions. Thus, interstitial silicon can be contained in a supersaturated state in the defect-free region.

  The rapid heating / cooling heat treatment is performed by, for example, a temperature process as shown in FIG. 3 using an RTP apparatus as shown in FIG. FIG. 2 is a cross-sectional view showing an outline of an example of an RTP apparatus used for manufacturing a silicon wafer according to the present invention, and FIG.

  As shown in FIG. 2, the RTP apparatus 10 used for manufacturing the silicon wafer of the present invention is separated from the reaction tube 20 provided with the atmospheric gas inlet 20a and the atmospheric gas outlet 20b, and at the upper part of the reaction tube 20. A plurality of lamps 30 arranged and a wafer support portion 40 that supports the wafer W in the reaction space 25 in the reaction tube 20 are provided. The wafer support unit 40 includes an annular susceptor 40a that directly supports the wafer W, and a stage 40b that supports the susceptor 40a.

  The reaction tube 20 is made of, for example, quartz. The lamp 30 is composed of, for example, a halogen lamp. The susceptor 40a is made of silicon, for example. The stage 40b is made of, for example, quartz.

  When performing rapid heating / rapid cooling heat treatment (RTP) on the silicon wafer W using the RTP apparatus 10 shown in FIG. 2, the silicon wafer W is reacted from a wafer inlet (not shown) provided in the reaction tube 20. Introduced into the space 25, the silicon wafer W is supported on the susceptor 40a of the wafer support portion 40, and then an atmospheric gas to be described later is introduced from the atmospheric gas inlet 20a. This is done by lamp irradiation. The temperature control in the reaction space 25 in the RTP apparatus 10 is performed by adjusting the average temperature in the wafer surface in the radial direction near the lower portion of the wafer W by a plurality of radiation thermometers 50 embedded in the stage 40b of the wafer support 40. Based on the measured temperature, the plurality of halogen lamps 30 are controlled (individual ON-OFF control of each lamp, emission intensity control of emitted light, etc.).

For example, as shown in FIG. 3A, the temperature process in the rapid heating / cooling heat treatment is performed by raising the temperature up to the maximum holding temperature T ₁ at a rate of 10 ° C./sec or more in an oxidizing gas atmosphere such as oxygen. Then, after holding at the maximum holding temperature T ₁ for a desired time (for example, ₁ sec to 60 sec), the temperature is lowered at a rate of 10 ° C./sec or more (FIG. 3A), or first a non-oxidizing gas atmosphere such as argon after raising the temperature at the rate of up to a maximum holding temperature T _1, in a holding at a maximum holding temperature T _1, after holding further desired time it is switched to an oxidizing gas atmosphere such as oxygen gas, if the temperature is decreased by the rate (in FIG. 3 (b)) and the temperature was raised to maximum retention temperature T ₂ in a non-oxidizing gas atmosphere such as argon Introduction thereafter once cooled to a maximum holding temperature T _{3 (<T 2),} the middle, oxygen gas, etc. Oxidation of After switching to a gas atmosphere, again, if the temperature is raised to a maximum holding temperature T _{1 (<T 2) (FIG.} 3 (c)) or the like can be used.

  Next, the mechanism by which the DZ layer is formed and the interstitial silicon is supersaturated by the rapid heating / cooling heat treatment will be described.

  FIG. 4 is a conceptual diagram for explaining a mechanism in which the DZ layer is formed and the interstitial silicon is supersaturated by the rapid heating / cooling heat treatment.

  In the rapid heating / cooling heat treatment, if the oxygen partial pressure is 20% or higher and the oxygen concentration is high, when the rapid heating is performed by the rapid heating / cooling heat treatment, the silicon wafer surface is oxidized, thereby causing interstitial silicon. (I-Si) is generated and introduced (FIG. 4A). Thereafter, during the high temperature treatment, oxygen contained in the inner wall oxide film formed on the inner wall of the COP generated during the growth of the silicon single crystal ingot is dissolved in the silicon wafer. When the generated i-Si is buried in the COP from which the inner wall oxide film has been removed, the COP disappears (FIG. 4B), and a defect-free region (DZ layer) is formed (FIG. 4B). c)). At that time, after the COP disappears, the remaining interstitial silicon (i-Si) forms a supersaturated state of the interstitial silicon in the defect-free region (FIG. 4C).

  Note that COP may remain near the surface of the wafer due to the rapid heating / cooling heat treatment. FIG. 5 is a conceptual diagram for explaining the mechanism in which the COP in the vicinity of the wafer surface remains in the mechanism in which the DZ layer is formed by the rapid heating / cooling heat treatment and the interstitial silicon is supersaturated. .

In the case where COP remains in the vicinity of the surface of the wafer, for example, when a silicon single crystal ingot is grown by the Czochralski method, the concentration of dissolved oxygen is very high (for example, 1.7 × 10 × 10). ¹⁸ atoms / cm ³ or more), or when the oxygen partial pressure of the oxidizing atmosphere in the rapid heating / cooling heat treatment is high (for example, an oxygen 100% atmosphere).

  For example, if the solid solution oxygen concentration during the growth of a silicon single crystal ingot is high, or if the oxygen partial pressure in the oxidizing atmosphere in the rapid heating / cooling heat treatment is high, the vicinity of the wafer surface is in an oxygen supersaturated state. Oxygen contained in the inner wall oxide film formed on the inner wall of the COP generated near the surface is hardly dissolved in the wafer. Therefore, the COP inner wall oxide film formed near the surface of the wafer remains, and this remaining inner wall oxide film prevents the i-Si from being buried inside the COP. In some cases, it cannot be eliminated (FIGS. 5A to 5C).

  In this case, the defect-free region (DZ layer) in which the interstitial silicon is supersaturated can be formed by removing the COP remaining in the vicinity of the surface of the wafer by polishing. Note that this polishing may be performed only by finish polishing, which is generally a well-known technique, or may be performed in combination with secondary polishing, which is a well-known technique, and the above-described finish polishing.

  The depth direction distribution of the dissolved oxygen concentration in the internal direction from the wafer surface 11 of the silicon wafer 10 according to the present embodiment manufactured by the above-described manufacturing method will be described with reference to the drawings.

6 to 8 are graphs showing the distribution in the depth direction of the dissolved oxygen concentration of the silicon wafer according to the present embodiment. Here, the horizontal axis of FIGS. 6 to 8 is the depth (μm) from the surface of the silicon wafer, and the vertical axis is the solid solution oxygen concentration (× 10 ¹⁸ atoms / cm ³ ). 6 shows the depth direction distribution of the dissolved oxygen concentration when the interstitial silicon is supersaturated in the case shown in FIG. 4, and FIG. 7 shows the above-described FIG. FIG. 8 shows the depth direction distribution of the dissolved oxygen concentration when the surface COP is polished when the interstitial silicon is supersaturated in such a case. FIG. 8 shows a larger amount of polishing than FIG. It is a depth direction distribution of the solid solution oxygen concentration in the case.

In the depth direction distribution of the dissolved oxygen concentration of the silicon wafer according to this embodiment, the solid-state oxygen concentration of the silicon wafer is fixed within a defect-free region (for example, a region having a depth of 5 μm or less from the wafer surface) including at least the device active region. A high oxygen concentration region having a maximum dissolved oxygen concentration of 0.7 × 10 ¹⁸ atoms / cm ³ or more and a deep region inside the silicon wafer deeper than the defect-free region (for example, from the wafer surface) Even in the case where the depth exceeds 5 μm, the solid solution oxygen concentration is 0.7 × 10 ¹⁸ atoms / cm ³ or more (FIGS. 6 (2) to (3) and FIGS. 7 (6) to (7): (Hereinafter referred to as the first form), instead of the first form, in the bulk region, the solid solution oxygen concentration is less than 0.7 × 10 ¹⁸ atoms / cm ³ (FIG. 6 (1), FIG. 5): hereinafter referred to as the second embodiment) and the solid solution oxygen concentration does not have a peak value (maximum value) of 0.7 × 10 ¹⁸ atoms / cm ³ or more, but the defect-free region and the bulk region In FIG. 6, the solid solution oxygen concentration is 0.7 × 10 ¹⁸ atoms / cm ³ or more (FIG. 6 (4), FIG. 7 (8), and FIGS. 8 (9) to (11)).

  Among these, an embodiment in which the solid solution oxygen concentration in the defect-free region is higher than the solid solution oxygen concentration in the bulk region inside the silicon wafer deeper than the defect-free region (FIGS. 6 (1) to (3), 7 (5) to (7) are preferably provided.

  By providing such a configuration, BMD generated in the bulk region or slip dislocation generated from the back surface can be pinned in the bulk region, and propagation to the device formation region on the wafer surface can be prevented. it can.

  Furthermore, the embodiment (FIGS. 6 (1) to (4) and FIG. 7 (8)) in which the dissolved oxygen concentration gradually decreases from the high oxygen concentration region toward the surface of the silicon wafer is provided. Is more preferable.

  By providing such a configuration, the generation amount of thermal donors formed on the surface can be suppressed.

  Next, the effects of the present invention will be specifically described with reference to some examples, but the present invention is not limited to the following examples.

(Examples 1-9)
When producing a silicon single crystal ingot by the CZ method, the solid solution oxygen concentration is 0.5, 0.7, 1.2, 1.7 (× 10 ¹⁸ atoms / cm ³ ) (converted by 1970-1979 version Old ASTM) The vacancy in which vacancy-type point defect aggregates exist while controlling V / G (the pulling speed V and the temperature gradient G in the crystal axis direction at 1300 ° C.) by adjusting each with the calculated value from the coefficient. Pulling was performed so that a hole-type point defect region (I region) was formed on the entire surface, and three types of silicon single crystal ingots having P-type and crystal plane orientation (001) with different [Oi] were produced.

  Next, the obtained silicon single crystal ingot was cut into a wafer shape with a wire saw and subjected to bevel processing, lapping, etching, and polishing, and a double-side polished silicon wafer having a diameter of 300 mm was produced.

Next, using the RTP apparatus 10 as shown in FIG. 2, in the temperature process as shown in FIG. 3A, the temperature rising rate is 75 ° C./sec and the maximum temperature reached 1300 in a 100% oxygen atmosphere. A silicon wafer having a solid solution oxygen concentration distribution as shown in FIG. 6 (1) is performed by performing rapid heating / cooling heat treatment under the conditions of 30 ° C., a holding time at the maximum temperature of 30 seconds, and a temperature drop rate of 25 ° C./sec. Example 1: Solid solution oxygen concentration 0.5 × 10 ¹⁸ atoms / cm ³ ), silicon wafer having solid solution oxygen concentration distribution as shown in FIG. 6 (2) (Example 2: solid solution oxygen concentration 0.7 × 10 ¹⁸ atoms / cm ³ ), a silicon wafer having a solid solution oxygen concentration distribution as shown in FIG. 6 (3) (Example 3: solid solution oxygen concentration 1.2 × 10 ¹⁸ atoms / cm ³ ), FIG. 4) As shown Silicon wafers with溶酸oxygen concentration distribution: to produce respectively (Example 4 dissolved oxygen concentration ^{1.7 × 10 18 atoms / cm 3} ).

Further, the sample of the same lot (same dissolved oxygen concentration) as in Examples 1 to 4 subjected to the rapid heating / cooling heat treatment was subjected to surface polishing of about 2.5 μm from the surface, as shown in FIG. Silicon wafer having a solid solution oxygen concentration distribution (Example 5: solid solution oxygen concentration 0.5 × 10 ¹⁸ atoms / cm ³ ), a silicon wafer having a solid solution oxygen concentration distribution as shown in FIG. Example 6: A silicon wafer having a solid solution oxygen concentration distribution as shown in FIG. 7 (7) (Example 7: solid solution oxygen concentration 1.2), with a solid solution oxygen concentration 0.7 × 10 ¹⁸ atoms / cm ³ ). × 10 ¹⁸ atoms / cm ³ ) and silicon wafers having a solid solution oxygen concentration distribution as shown in FIG. 7 (8) (Example 8: solid solution oxygen concentration 1.7 × 10 ¹⁸ atoms / cm ³ ) were produced. did.

Further, the samples of the same lot (same dissolved oxygen concentration) as those of Examples 2 to 4 subjected to the rapid heating / cooling heat treatment were subjected to surface polishing of about 5.0 μm from the surface, as shown in FIG. 8 (9). Silicon wafer having a solid solution oxygen concentration distribution (Example 9: solid solution oxygen concentration 0.7 × 10 ¹⁸ atoms / cm ³ ), a silicon wafer having a solid solution oxygen concentration distribution as shown in FIG. Example 10: a silicon wafer having a solid solution oxygen concentration distribution as shown in FIG. 8 (11) (Example 11: solid solution oxygen concentration 1.7), with a solid solution oxygen concentration of 1.2 × 10 ¹⁸ atoms / cm ³ ). × 10 ¹⁸ atoms / cm ³ ) were produced.

(Comparative Examples 1-2)
At the time of producing the silicon single crystal ingot by the CZ method, the solid solution oxygen concentration was adjusted to 0.3, 0.5 (× 10 ¹⁸ atoms / cm ³ ), and other methods similar to those in Examples 9 to 11 ( A silicon wafer having a solid solution oxygen concentration distribution as shown in FIG. 9 (12) by rapid heating / cooling heat treatment + surface polishing of about 5.0 μm of machining allowance (Comparative Example 1: solid solution oxygen concentration 0.3 × 10) ¹⁸ atoms / cm ³ ) and a silicon wafer having a solid solution oxygen concentration distribution as shown in FIG. 9 (13) (Comparative Example 2: solid solution oxygen concentration 0.5 × 10 ¹⁸ atoms / cm ³ ) were produced.

(Comparative Examples 3-5)
At the time of producing a silicon single crystal ingot by the CZ method, the solid solution oxygen concentration is 0.7, 1.2, 1.7 (× 10 ¹⁸ atoms / cm ³ ) (calculated from the conversion factor by the 1970-1979 version Old ASTM). Value) and controlling V / G (pulling speed V and temperature gradient G in the crystal axis direction at 1300 ° C.), there is no agglomeration of vacancy-type point defects, and the lattice A plurality of silicon single crystal ingots having P-type and crystal plane orientations (001) having different solid solution oxygen concentrations were produced so that a defect-free region rich in interstitial silicon type point defects was formed on the entire surface.

The obtained silicon single crystal ingot was cut into a wafer shape with a wire saw and subjected to bevel processing, lapping, etching, and polishing to produce a silicon wafer having a diameter of 300 mm that was polished on both sides, as shown in FIG. 9 (14). A silicon wafer having such a dissolved oxygen concentration distribution (Comparative Example 3: dissolved oxygen concentration 0.7 × 10 ¹⁸ atoms / cm ³ ), a silicon wafer having a dissolved oxygen concentration distribution as shown in FIG. (Comparative example 4: solid solution oxygen concentration 1.2 × 10 ¹⁸ atoms / cm ³ ), a silicon wafer having a solid solution oxygen concentration distribution as shown in FIG. 9 (16) (comparative example 5: solid solution oxygen concentration 1. each was prepared ^{7 × 10 18 atoms / cm 3} ).

(Evaluation of oxygen precipitate density)
Each sample of Examples 1 to 11 and Comparative Examples 1 to 5 was subjected to a heat treatment at 800 ° C. for 4 hours in an oxygen 100% atmosphere, and then 1000 ° C. in the same atmosphere (oxygen 100%). , after the 16 hours heat treatment, Sato etching (liquid composition; HF (concentration 49%): HNO3 _{(69% concentration): CH 3 COOH: H 2} O = 1: 15: 3: 1) to subjecting the sample surface The surface was observed with a microscope, and the density of etch pits existing in the region from the surface to a depth of 5 μm was measured.

As a result, in the samples of Examples 1 to 11 and Comparative Examples 1 and 2, the etch pit density was 10 pieces / cm ² or less, and almost no etch pits were observed, but in the samples of Comparative Examples 3 to 5, The density of oxygen precipitates exceeded 10 pieces / cm ² , and many etch pits were confirmed.

(Slip evaluation)
Each sample of Examples 1 to 11 and Comparative Examples 1 to 5 was subjected to conditions more severe than the above-described evaluation of oxygen precipitate density (heat treatment at 1200 ° C. for 1 hour in an oxygen 100% atmosphere). The occurrence of slip dislocations in the defect-free region serving as the device formation surface of each sample was evaluated.

  As a result, for the samples of Comparative Examples 1 and 2, it was confirmed that the slip propagated from the back surface to the device formation region on the wafer surface. Nothing was reached that reached.

It is sectional drawing which showed typically the silicon wafer concerning this embodiment. It is a graph which shows the depth direction distribution of the solid solution oxygen concentration of the silicon wafer concerning this embodiment. It is a conceptual diagram of an example of the temperature process in rapid heating and rapid cooling heat processing. It is a conceptual diagram for demonstrating the mechanism in which a DZ layer is formed and the interstitial silicon will be in a supersaturated state by rapid heating / rapid cooling heat treatment. It is a conceptual diagram for demonstrating the mechanism in which the COP near the surface of the wafer remains in the mechanism in which the DZ layer is formed by the rapid heating / cooling thermal process and the interstitial silicon is supersaturated. It is a graph which shows the depth direction distribution of the solid solution oxygen concentration of the silicon wafer concerning this embodiment. It is a graph which shows the depth direction distribution of the solid solution oxygen concentration of the silicon wafer concerning this embodiment. It is a graph which shows the depth direction distribution of the solid solution oxygen concentration of the silicon wafer concerning this embodiment. It is a graph which shows the depth direction distribution of the solid solution oxygen concentration of the silicon wafer concerning a comparative example.

Explanation of symbols

10 Silicon wafer 12 DZ layer 13 Solid solution oxygen 14 Interstitial silicon 15 Bulk region

Claims (3)

A silicon wafer has a high oxygen concentration region having a solid solution oxygen concentration of 0.7 × 10 ¹⁸ atoms / cm ³ or more in a defect-free region including at least a device active region, and in the defect-free region, A silicon wafer containing interstitial silicon in a supersaturated state.   2. The silicon wafer according to claim 1, wherein a solid solution oxygen concentration in the defect-free region is higher than a solid solution oxygen concentration in a bulk region inside the silicon wafer deeper than the defect-free region. 3. The silicon wafer according to claim 1, wherein a solid solution oxygen concentration gradually decreases from the high oxygen concentration region toward a surface of the silicon wafer.