JP2006518115A - 集積回路基板および関連する構造の選択的バンピング方法 - Google Patents
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Abstract
Description
本願は、2003年2月18日に出願された米国仮特許出願第60/448,096号の優先権の利益を享受し、同出願の内容全体を引用することにより、本明細書の一部をなすものとする。
過酸化水素−10〜20%
スルホサリチル酸−2〜30グラム/リットル
硫化カリウム−25〜200グラム/リットル
ベンゾトリゾール−1〜10グラム/リットル
補給水
温度:30〜70℃
pH<7
過酸化水素−10〜20%
スルホサリチル酸−2〜30グラム/リットル
硫化カリウム−25〜200グラム/リットル
ベンゾトリゾール−1〜10グラム/リットル
補給水
温度:30〜70℃
pH<7
過酸化水素−10〜20%
スルホサリチル酸−2〜30グラム/リットル
硫化カリウム−25〜200グラム/リットル
ベンゾトリゾール−1〜10グラム/リットル
補給水
温度:30〜70℃
pH<7
過酸化水素−10〜20%
スルホサリチル酸−2〜30グラム/リットル
硫化カリウム−25〜200グラム/リットル
ベンゾトリゾール−1〜10グラム/リットル
補給水
温度:30〜70℃
pH<7
Claims (49)
- 金属層を含む基板上に障壁層を形成するステップと、
前記障壁層上に伝導性バンプを形成するステップであって、前記障壁層が該伝導性バンプと前記基板との間にあり、該伝導性バンプが前記金属層からオフセットされるステップと、
前記伝導性バンプを形成した後に、前記障壁層の少なくともいくらかを前記金属層から除去することによって、前記伝導性バンプと前記基板との間に前記障壁層の一部分を維持しながら、前記金属層を露出するステップと
を含んでなる、上部に金属層を含む基板をバンピングする方法。 - 前記基板が集積回路基板を含む請求項1に記載の方法。
- 前記金属層がアルミニウム層を含む請求項1に記載の方法。
- 前記障壁層がチタンタングステン層を含む請求項1に記載の方法。
- 前記金属層と前記障壁層と前記伝導性バンプとの全てが異なる材料を含む請求項1に記載の方法。
- 前記伝導性バンプを形成するステップの前に、前記障壁層上に伝導性アンダーバンプ冶金層を形成するステップと、
前記障壁層を除去する前に、前記伝導性バンプと前記基板との間に前記伝導性アンダーバンプ冶金層の一部分を維持しながら、前記金属層とは反対の前記障壁層から前記伝導性アンダーバンプ冶金層を除去するステップと
をさらに含む請求項1に記載の方法。 - 前記伝導性アンダーバンプ冶金層が銅を含む請求項6に記載の方法。
- 前記伝導性アンダーバンプ冶金層および前記障壁層が異なる材料を含む請求項6に記載の方法。
- 前記伝導性バンプを形成するステップの前に、前記アンダーバンプ冶金層上に第2の障壁層を形成するステップをさらに含み、前記第2の障壁層および前記アンダーバンプ冶金層が異なる材料を含み、前記第2の障壁層が前記伝導性バンプと前記伝導性アンダーバンプ冶金層との間にある請求項6に記載の方法。
- 前記第2の障壁層がニッケルを含む請求項9に記載の方法。
- 前記アンダーバンプ冶金層が銅を含む請求項10に記載の方法。
- 前記第2の障壁層を形成するステップが、前記アンダーバンプ冶金層の一部分上に前記第2の障壁層を選択的に形成するステップを含み、前記第2の障壁層が前記金属層からオフセットされる請求項9に記載の方法。
- 前記伝導性バンプを形成するステップが、前記金属層からオフセットされた前記第2の障壁層上に前記伝導性バンプを選択的に形成するステップを含む請求項12に記載の方法。
- 前記第2の障壁層を形成し、前記伝導性バンプを選択的に形成するステップが、同一のマスクを用いて、前記第2の障壁層および前記伝導性バンプを選択的に形成するステップを含む請求項13に記載の方法。
- 前記伝導性バンプが、はんだ、金、および/または、銅の少なくとも1つを含む請求項1に記載の方法。
- 前記伝導性バンプを形成するステップが、前記金属層からオフセットされた前記障壁層上に前記バンプを選択的にめっきするステップを含む請求項1に記載の方法。
- 前記集積回路基板が上部に入出力パッドを含み、前記障壁層が前記金属層および前記入出力パッドを含む前記基板上に形成され、前記伝導性バンプが前記入出力パッドの反対の前記障壁層上に形成される請求項1に記載の方法。
- 前記金属層および前記バンプパッドの両方がアルミニウムを含む請求項17に記載の方法。
- 前記基板が上部に入出力パッドを含み、前記障壁層が前記金属層および前記入出力パッドを含む前記基板上に形成され、前記金属層から前記障壁層を除去した後に、前記伝導性バンプが前記入出力パッドに電気的に連結される請求項1に記載の方法。
- 前記金属層および前記入出力パッドの両方がアルミニウムを含む請求項19に記載の方法。
- 前記伝導性バンプが前記入出力パッドとは反対の前記障壁層上に形成される請求項19に記載の方法。
- 前記伝導性バンプが前記入出力パッドからオフセットされる請求項19に記載の方法。
- 前記金属層から前記障壁層を除去した後に、前記伝導性バンプに第2の基板を結合するステップをさらに含む請求項1に記載の方法。
- 上部に露出された金属層を含む基板と、
該露出された金属層からオフセットされた前記基板上にある障壁層と、
該障壁層上にある伝導性バンプであって、前記障壁層が前記伝導性バンプと前記基板との間にあり、前記伝導性バンプが前記金属層からオフセットされ、前記障壁層と前記伝導性バンプと前記金属層との全てが異なる伝導性材料を含むものである伝導性バンプと
を含んでなる電子デバイス。 - 前記電子デバイスが集積回路デバイスを含み、前記基板が集積回路基板を含む請求項24に記載の電子デバイス。
- 前記障壁層がチタンタングステンを含む請求項24に記載の電子デバイス。
- 前記露出された金属層がアルミニウムを含む請求項25に記載の電子デバイス。
- 前記伝導性バンプが、はんだ、金、および/または、銅の少なくとも1つを含む請求項25に記載の電子デバイス。
- 前記障壁層と前記伝導性バンプとの間に、伝導性アンダーバンプ冶金層をさらに含む請求項24に記載の電子デバイス。
- 前記伝導性バンプに結合された第2の基板をさらに含む請求項24に記載の電子デバイス。
- 前記集積回路基板上に入出力パッドをさらに含み、前記障壁層および前記伝導性バンプが前記入出力パッドに電気的に接続される請求項24に記載の電子デバイス。
- 前記入出力パッドおよび前記金属層の各々がアルミニウムを含む請求項31に記載の電子デバイス。
- 前記伝導性バンプが、前記入出力パッドとは反対の前記障壁層上にある請求項31に記載の電子デバイス。
- 前記伝導性バンプが、前記入出力パッドからオフセットされている請求項31に記載の電子デバイス。
- 前記障壁層と前記伝導性バンプとの間にアンダーバンプ冶金層をさらに含み、前記アンダーバンプ冶金層および前記障壁層が異なる材料を含む請求項25に記載の電子デバイス。
- 露出された金属層からオフセットされた基板上に障壁層を形成するステップと、
該障壁層上に伝導性バンプを形成するステップであって、該障壁層が該伝導性バンプと前記基板との間にあり、該伝導性バンプが前記金属層からオフセットされ、該障壁層と該伝導性バンプと前記金属層との全てが異なる伝導性材料を含むものであるステップと
を含んでなる、上部に露出された金属層を含む基板を含む電子デバイスをバンピングする方法。 - 前記電子デバイスが集積回路デバイスを含み、前記基板が集積回路基板を含む請求項36に記載の方法。
- 前記障壁層がチタンタングステンを含む請求項36に記載の方法。
- 前記露出された金属層がアルミニウムを含む請求項38に記載の方法。
- 前記伝導性バンプが、はんだ、金、および/または、銅の少なくとも1つを含む請求項38に記載の方法。
- 前記障壁層と前記伝導性バンプとの間に伝導性アンダーバンプ冶金層を形成するステップをさらに含む請求項36に記載の方法。
- 前記伝導性バンプに結合された第2の基板を結合するステップをさらに含む請求項36に記載の方法。
- 前記集積回路基板が上部に入出力パッドを含み、前記障壁層および前記伝導性バンプが前記入出力パッドに電気的に接続される請求項36に記載の方法。
- 前記入出力パッドおよび前記金属層の各々がアルミニウムを含む請求項43に記載の方法。
- 前記伝導性バンプが前記入出力パッドとは反対の前記障壁層にある請求項43に記載の方法。
- 前記伝導性バンプが前記入出力パッドからオフセットされる請求項43に記載の方法。
- 前記障壁層と前記伝導性バンプとの間にアンダーバンプ冶金層をさらに含み、前記アンダーバンプ冶金層および前記障壁層が異なる材料を含む請求項36に記載の方法。
- 金属層を含む基板上に障壁層を形成するステップと、
該障壁層上に伝導性バンプを形成するステップであって、該障壁層が該伝導性バンプと前記基板との間にあり、該伝導性バンプが前記金属層から横方向にオフセットされているステップと、
前記伝導性バンプを形成した後に、前記金属層から前記障壁層を除去することによって、前記伝導性バンプと前記基板との間に前記障壁層の一部分を維持しながら、前記金属層を露出するステップと
を含んでなる、上部に金属層を含む集積回路基板をバンピングする方法。 - 集積回路基板と、
該集積回路基板上にある露出された金属層と、
該露出された金属層から横方向にオフセットされた前記集積回路基板上にある障壁層と、
該障壁層上にある伝導性バンプであって、該障壁層が該伝導性バンプと前記基板との間にあり、前記伝導性バンプが前記金属層から離れている伝導性バンプと
を含んでなる集積回路デバイス。
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US44809603P | 2003-02-18 | 2003-02-18 | |
| PCT/US2004/005818 WO2004075265A2 (en) | 2003-02-18 | 2004-02-17 | Methods for selectively bumping integrated circuit substrates and related structures |
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| Publication Number | Publication Date |
|---|---|
| JP2006518115A true JP2006518115A (ja) | 2006-08-03 |
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| Country | Link |
|---|---|
| US (2) | US7081404B2 (ja) |
| EP (1) | EP1595283A2 (ja) |
| JP (1) | JP2006518115A (ja) |
| KR (1) | KR20050105223A (ja) |
| CN (1) | CN1784775A (ja) |
| TW (2) | TWI225899B (ja) |
| WO (1) | WO2004075265A2 (ja) |
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- 2004-02-17 CN CNA2004800104255A patent/CN1784775A/zh active Pending
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Also Published As
| Publication number | Publication date |
|---|---|
| KR20050105223A (ko) | 2005-11-03 |
| US20040209406A1 (en) | 2004-10-21 |
| WO2004075265A2 (en) | 2004-09-02 |
| US20060231951A1 (en) | 2006-10-19 |
| TW200507120A (en) | 2005-02-16 |
| TWI225899B (en) | 2005-01-01 |
| CN1784775A (zh) | 2006-06-07 |
| US7081404B2 (en) | 2006-07-25 |
| EP1595283A2 (en) | 2005-11-16 |
| WO2004075265A3 (en) | 2004-11-04 |
| TW200416305A (en) | 2004-09-01 |
| US7579694B2 (en) | 2009-08-25 |
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