JP2001326241A - Bonding pad and semiconductor chip - Google Patents

Abstract

PROBLEM TO BE SOLVED: To solve the problem of wire bonding process that a mark dedicated for recognition of the relative positional coordinate of a bonding place is put on the surface of a semiconductor chip and reduction of chip size is limited correspondingly. SOLUTION: As a reference point being used by a wire bonder for grasping a bonding place, marks 14 for recognizing the positional coordinate relative to a plurality of bonding positions are put on two bonding pads 11, 12 of a semiconductor chip.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a bonding pad provided with a recognition mark as a reference point used for grasping a place where a wire bonding apparatus is to be connected in a wire bonding step in manufacturing a semiconductor device, and a semiconductor device. It is about chips.

[0002]

2. Description of the Related Art Generally, when connecting bonding pads of a semiconductor chip, two recognition marks for the purpose of relatively recognizing the position coordinates are provided on the surface of the semiconductor chip, and these marks are used for image recognition. Then, the wire bonding apparatus performs the wire bonding by making the wire bonding apparatus grasp the position to be connected with the wire.

On the other hand, Japanese Patent Application Laid-Open No. 2000-12603 (hereinafter referred to as a document) discloses a technique for preventing bonding from protruding from a bonding pad of a semiconductor chip and preventing a bonding from being applied to a protective film. There is.

In this document, in order to visually recognize the center of a bonding pad, a shape of a convex portion or a concave portion is provided on each side of all bonding pads.

[0005]

However, if a dedicated recognition mark is provided on the surface of a semiconductor chip, the miniaturization of the chip is hindered by that much.

The shape of the convex or concave portion in the document is not a mark for recognizing relative position coordinates, but for recognizing the center of the bonding pad, and must be provided on all four sides of all bonding pads. There is.

[0007]

SUMMARY OF THE INVENTION In order to solve the above-mentioned problems, the present invention provides a bonding pad to which a wire bonding apparatus is connected as a reference point used for grasping a place where the wire bonding apparatus is to be connected. A recognition mark for recognizing relative position coordinates with a plurality of bonding positions on the semiconductor chip is provided.

[0008]

FIG. 1 is a sectional view showing a first embodiment of the present invention.

An example of an FET is shown as a semiconductor chip formed by a normal semiconductor wafer process.

1 is a silicon substrate, 2 is an oxide film formed on the silicon substrate 1, 3 and 4 are diffusion layers, 5 is a polysilicon film, 6 is an intermediate insulating film, 7 is a drain electrode, 8 is a source electrode, 9 is a gate electrode, 10 is a passivation film, 1
1 to 13 are bonding pads, and 14 is a recognition mark.

As is well known, the bonding pads 11 to 13 are formed on the surface of the electrode by a thin film of aluminum or the like.

Recognition marks 14 are formed at two places, the bonding pad 11 of the drain electrode 7 and the bonding pad 12 of the source electrode 8, but not at the bonding pad 13 of the base electrode 9.

The recognition mark 14 is formed in a three-dimensional shape, such as a cross or a square, using a step.

The method of forming the recognition mark 14 will be described.
A semiconductor chip is formed, and finally a bonding pad 1 is formed.
A resist mask having the shape of the recognition mark 14 is formed on the surface of the metal layer such as the aluminum thin film 1 or 12 through a normal photolithography process.

Next, the surface of the metal layer is etched in the shape of the recognition mark 14. At this time, the etching amount is set to about の of the thickness of the metal layer so that the bonding strength at the time of wire connection can be obtained when wire bonding is performed on the recognition mark 14 later. A recognition mark 14 that can be visually recognized is formed by a step generated by this etching.

The recognition mark 14 serves as a reference point used by the wire bonding apparatus to grasp a place to be connected, and recognizes relative position coordinates with a plurality of bonding positions to be connected on the semiconductor chip. Used to

Since the recognition mark 14 serves as a reference point for the relative position coordinates, it is necessary and sufficient if it is located at two bonding pads in the semiconductor chip, and need not be provided on all bonding pads.

Even if it is provided at three or more locations, two of them are used as reference points and the others are unnecessary, so that providing at three or more locations does not depart from the technical scope of the present invention. .

The recognition mark 14 does not necessarily have to be formed at the center of the bonding pads 11 and 12,
In 2nd wire bonding, wedge bonding, or the like, there is a case where it is intentionally shifted from the center and formed at the end.

In the figure, the bonding pads 11, 1
2 are formed on the upper surface of the drain electrode 7 and the upper surface of the source electrode 8, respectively.

As described above, according to the first embodiment, the recognition mark 14 is formed as a reference point for recognizing a place to be connected to the bonding pads 11 and 12.
The wire bonding apparatus can recognize the relative position coordinates between the recognition mark 14 and the bonding position, and the bonding pads 11 and 12 on which the recognition mark 14 is formed.
Can be wire-bonded to all bonding pads to be connected.

As a result, it is not necessary to consciously insert a mark only for recognition into the semiconductor chip, and it is possible to improve the number of elements in the semiconductor chip, the degree of integration of wiring, etc., and to reduce the size of the chip. Will also be connected.

Further, since the recognition mark 14 is a reference point of relative position coordinates, it is only necessary to provide two at a semiconductor chip, and it is not necessary to provide it at every bonding pad.

FIG. 2 is a sectional view showing a second embodiment of the present invention, which is the same as the first embodiment except that the method of forming the recognition mark 14 is different.

Bonding pad 1 of silicon substrate 1
A resist mask having the shape of the recognition mark 14 is formed in a region where the layers 1 and 12 are to be formed through a normal photolithography process.

Next, the etched portion 15 on the surface of the silicon substrate 1 is etched into the shape of the recognition mark 14 by alkali etching or the like. After that, the oxide film 2 and the intermediate insulating film 6
A normal semiconductor wafer process such as formation of a semiconductor wafer is performed.

A step is left on the surfaces of the bonding pads 11 and 12 of the semiconductor chip finally formed through this process by an amount corresponding to the etching of the surface of the silicon substrate 1 immediately below the bonding pads 11 and 12, and the recognition mark 14 is formed. You.

As described above, according to the second embodiment, the same effects as those of the first embodiment can be obtained.

FIG. 3 is a sectional view showing a third embodiment of the present invention, which is the same as the first embodiment except that the method of forming the recognition mark 14 is different.

The intermediate insulating film 6 is formed by a normal semiconductor wafer process, and a resist mask having the shape of the recognition mark 14 is formed in a region of the intermediate insulating film 6 where the bonding pads 11 and 12 are to be formed through a normal photolithography process. Form.

Next, the etching portion 16 of the intermediate insulating film 6 is etched into the shape of the recognition mark 14, and a normal semiconductor wafer process is performed.

On the surfaces of the bonding pads 11 and 12 of the semiconductor chip finally formed through this process, a step is left by an amount corresponding to the etching of the surface of the intermediate insulating film 6 therebelow, and the recognition mark 14 is formed. Is done.

It is to be noted that the recognition mark 14 is similarly formed on the bonding pads 11 and 12 regardless of whether the etching of the shape of the recognition mark 14 is performed on any of the molded films such as the oxide film 2, not limited to the intermediate insulating film 6. Can be.

As described above, according to the third embodiment, the same effects as those of the first embodiment can be obtained.

FIG. 4 is a sectional view showing a fourth embodiment of the present invention, which is the same as the first embodiment except that the method of forming the recognition mark 17 is different.

The recognition mark 17 is formed by a convex step, while the recognition mark 14 of the above-described embodiment is formed by a concave step. However, there is no change in its function.

In a region of the silicon substrate 1 where the bonding pads 11 and 12 are to be formed, a resist mask having a shape of the recognition mark 17 is formed through a normal photolithography process.

Next, a pattern having the shape of the recognition mark 17 is formed on the oxidized portion 18 on the surface of the silicon substrate 1 by oxidation. After that, a normal semiconductor wafer process such as formation of the oxide film 2 and the intermediate insulating film 6 is performed.

On the surfaces of the bonding pads 11 and 12 of the semiconductor chip finally formed through this process, a convex step remains by the amount of the oxidation of the surface of the silicon substrate 1 immediately below the bonding pads 11 and 12. Is formed.

As described above, according to the fourth embodiment, the same effects as those of the first embodiment can be obtained.

FIG. 5 is a sectional view showing a fifth embodiment of the present invention, which is the same as the first embodiment except that the method of forming the recognition mark 19 is different.

The recognition mark 19 is formed by processing the tip of the probing needle into the shape of the recognition mark 19, for example, a sufficient shape or a square, and applying the needle to the bonding pads 11 and 12 of the semiconductor chip to perform probing. This utilizes a step of a recognition mark-like flaw that can be obtained.

In a probing process for checking characteristics of a semiconductor chip formed through a normal semiconductor wafer process, a probing needle processed into the shape of the recognition mark 19 is applied to the bonding pads 11 and 12 to perform probing.

At this time, a scratch in the shape of the tip of the probing needle remains on the surfaces of the bonding pads 11 and 12, and the recognition mark 19 is formed by the step of the scratch.

As described above, according to the fifth embodiment, in addition to the effect of the first embodiment, since the recognition mark 19 is formed by using the scratch of the needle in the probing process, the number of processes is increased. And can be easily implemented.

[0046]

As described above, according to the present invention, the semiconductor chip is provided with a recognition mark as a reference point for recognizing relative position coordinates with a plurality of bonding positions on the bonding pads of the semiconductor chip. Contributes to downsizing.

[Brief description of the drawings]

FIG. 1 is a sectional view showing a first embodiment of the present invention.

FIG. 2 is a sectional view showing a second embodiment of the present invention.

FIG. 3 is a sectional view showing a third embodiment of the present invention.

FIG. 4 is a sectional view showing a fourth embodiment of the present invention.

FIG. 5 is a sectional view showing a fifth embodiment of the present invention.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Silicon substrate 2 Oxide film 6 Intermediate insulating film 11, 12, 13 Bonding pad 14, 17, 19 Recognition mark 15, 16 Etching part 18 Oxidation part

Claims (8)

[Claims] 1. A bonding pad to be connected by a wire bonding apparatus, wherein a reference point used by the wire bonding apparatus to grasp a place to be connected is relative to a plurality of bonding positions on a semiconductor chip. A bonding pad provided with a recognition mark for recognizing position coordinates. 2. The bonding pad according to claim 1, wherein the recognition mark is formed using a step. 3. The bonding pad according to claim 2,
A semiconductor chip provided at a location. 4. The semiconductor chip according to claim 3, wherein the recognition mark is formed by etching a surface of the bonding pad into a shape of the recognition mark. 5. The semiconductor chip according to claim 3, wherein the shape of the recognition mark is etched on the surface of the silicon substrate located immediately below the bonding pad. 6. The semiconductor chip according to claim 3, wherein the shape of the recognition mark is etched in a corrugated film existing immediately below the bonding pad. 7. The semiconductor chip according to claim 3, wherein the shape of the recognition mark is oxidized on the surface of the silicon substrate located immediately below the bonding pad. 8. The semiconductor chip according to claim 3, wherein said recognition mark is formed on said bonding pad at the time of probing with a probing needle having a tip processed into the shape of said recognition mark.