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DE69940074D1 - Verfahren zur herstellung einer halbleitervorrichtung - Google Patents

Verfahren zur herstellung einer halbleitervorrichtung

Info

Publication number
DE69940074D1
DE69940074D1 DE69940074T DE69940074T DE69940074D1 DE 69940074 D1 DE69940074 D1 DE 69940074D1 DE 69940074 T DE69940074 T DE 69940074T DE 69940074 T DE69940074 T DE 69940074T DE 69940074 D1 DE69940074 D1 DE 69940074D1
Authority
DE
Germany
Prior art keywords
producing
semiconductor device
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69940074T
Other languages
English (en)
Inventor
Gaku Sugahara
Tohru Saitoh
Minoru Kubo
Teruhito Ohnishi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Corp
Original Assignee
Panasonic Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Panasonic Corp filed Critical Panasonic Corp
Application granted granted Critical
Publication of DE69940074D1 publication Critical patent/DE69940074D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/051—Manufacture or treatment of FETs having PN junction gates
    • H10D30/0516—Manufacture or treatment of FETs having PN junction gates of FETs having PN heterojunction gates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D10/00—Bipolar junction transistors [BJT]
    • H10D10/01—Manufacture or treatment
    • H10D10/021—Manufacture or treatment of heterojunction BJTs [HBT]
    • H10D64/0111—
    • H10D64/0113—
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0167—Manufacturing their channels
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • H10P14/2905—
    • H10P14/3211—
    • H10P14/3408—
    • H10P14/3411—
    • H10P14/6334—
    • H10P14/69215—
DE69940074T 1998-09-14 1999-09-13 Verfahren zur herstellung einer halbleitervorrichtung Expired - Lifetime DE69940074D1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP25987698 1998-09-14
PCT/JP1999/004962 WO2000016391A1 (en) 1998-09-14 1999-09-13 Method for producing semiconductor device

Publications (1)

Publication Number Publication Date
DE69940074D1 true DE69940074D1 (de) 2009-01-22

Family

ID=17340181

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69940074T Expired - Lifetime DE69940074D1 (de) 1998-09-14 1999-09-13 Verfahren zur herstellung einer halbleitervorrichtung

Country Status (5)

Country Link
US (1) US6620665B1 (de)
EP (1) EP1143502B1 (de)
DE (1) DE69940074D1 (de)
TW (1) TWI233630B (de)
WO (1) WO2000016391A1 (de)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2002082526A1 (en) * 2001-04-03 2002-10-17 Matsushita Electric Industrial Co., Ltd. Semiconductor device and its manufacturing method
CN1255878C (zh) * 2001-04-12 2006-05-10 松下电器产业株式会社 半导体装置及其制造方法
US20060014334A1 (en) * 2001-10-12 2006-01-19 J R P Augusto Carlos Method of fabricating heterojunction devices integrated with CMOS
AU2003202499A1 (en) 2002-01-09 2003-07-30 Matsushita Electric Industrial Co., Ltd. Semiconductor device and its production method
DE10218381A1 (de) * 2002-04-24 2004-02-26 Forschungszentrum Jülich GmbH Verfahren zur Herstellung einer oder mehrerer einkristalliner Schichten mit jeweils unterschiedlicher Gitterstruktur in einer Ebene einer Schichtenfolge
US6893931B1 (en) * 2002-11-07 2005-05-17 Newport Fab, Llc Reducing extrinsic base resistance in an NPN transistor
US7648886B2 (en) * 2003-01-14 2010-01-19 Globalfoundries Inc. Shallow trench isolation process
WO2008097604A2 (en) * 2007-02-07 2008-08-14 Microlink Devices, Inc. Hbt and field effect transistor integration
US7687786B2 (en) * 2008-05-16 2010-03-30 Twin Creeks Technologies, Inc. Ion implanter for noncircular wafers
KR20110065444A (ko) * 2008-10-02 2011-06-15 스미또모 가가꾸 가부시키가이샤 반도체 기판, 전자 디바이스 및 반도체 기판의 제조 방법
TW201025426A (en) * 2008-10-02 2010-07-01 Sumitomo Chemical Co Semiconductor wafer, electronic device and method for making a semiconductor wafer
GB201112327D0 (en) 2011-07-18 2011-08-31 Epigan Nv Method for growing III-V epitaxial layers
JP5826716B2 (ja) * 2012-06-19 2015-12-02 株式会社東芝 半導体装置及びその製造方法

Family Cites Families (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS544065A (en) * 1977-06-13 1979-01-12 Hitachi Ltd Impurity diffusion method
US4722659A (en) * 1986-05-16 1988-02-02 Thermco Systems, Inc. Semiconductor wafer carrier transport apparatus
US4731293A (en) * 1986-06-20 1988-03-15 American Telephone And Telegraph Company, At&T Bell Laboratories Fabrication of devices using phosphorus glasses
US4835112A (en) * 1988-03-08 1989-05-30 Motorola, Inc. CMOS salicide process using germanium implantation
US4920076A (en) * 1988-04-15 1990-04-24 The United States Of America As Represented By The United States Department Of Energy Method for enhancing growth of SiO2 in Si by the implantation of germanium
US5084411A (en) * 1988-11-29 1992-01-28 Hewlett-Packard Company Semiconductor processing with silicon cap over Si1-x Gex Film
US4937206A (en) * 1989-07-10 1990-06-26 Applied Materials, Inc. Method and apparatus for preventing cross contamination of species during the processing of semiconductor wafers
JPH04162431A (ja) * 1990-10-24 1992-06-05 Fujitsu Ltd 半導体装置の製造方法
US5296387A (en) * 1991-03-06 1994-03-22 National Semiconductor Corporation Method of providing lower contact resistance in MOS transistor structures
US5241214A (en) * 1991-04-29 1993-08-31 Massachusetts Institute Of Technology Oxides and nitrides of metastabale group iv alloys and nitrides of group iv elements and semiconductor devices formed thereof
JPH05226620A (ja) * 1992-02-18 1993-09-03 Fujitsu Ltd 半導体基板及びその製造方法
JPH06310719A (ja) * 1993-04-19 1994-11-04 Sharp Corp Ｇｅ−ＳｉのＳＯＩ型ＭＯＳトランジスタ及びその製造方法
JPH07288238A (ja) * 1994-04-18 1995-10-31 Sony Corp マルチチャンバプロセス装置
JPH07321178A (ja) * 1994-05-24 1995-12-08 Hitachi Ltd 搬送装置およびその搬送装置を有するマルチチャンバ装置
JP3655331B2 (ja) 1994-07-21 2005-06-02 株式会社ユニコム 幼児用椅子
JP2676678B2 (ja) 1994-11-28 1997-11-17 株式会社日立製作所 連続スパッタ処理方法
JPH08335539A (ja) * 1995-06-06 1996-12-17 Sony Corp 生産管理装置および生産管理方法
US5879996A (en) * 1996-09-18 1999-03-09 Micron Technology, Inc. Silicon-germanium devices for CMOS formed by ion implantation and solid phase epitaxial regrowth
JPH10198403A (ja) * 1997-01-09 1998-07-31 Hitachi Ltd 多品種生産方法
JP3196719B2 (ja) * 1998-03-31 2001-08-06 日本電気株式会社 汚染防御用隔離ラインを有する半導体製造ライン、ウエハ搬送機構および半導体の製造方法

Also Published As

Publication number Publication date
EP1143502A4 (de) 2005-03-16
EP1143502A1 (de) 2001-10-10
WO2000016391A1 (en) 2000-03-23
US6620665B1 (en) 2003-09-16
TWI233630B (en) 2005-06-01
EP1143502B1 (de) 2008-12-10

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition