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DE69940737D1 - Verfahren zur herstellung einer halbleiteranordnung - Google Patents

Verfahren zur herstellung einer halbleiteranordnung

Info

Publication number
DE69940737D1
DE69940737D1 DE69940737T DE69940737T DE69940737D1 DE 69940737 D1 DE69940737 D1 DE 69940737D1 DE 69940737 T DE69940737 T DE 69940737T DE 69940737 T DE69940737 T DE 69940737T DE 69940737 D1 DE69940737 D1 DE 69940737D1
Authority
DE
Germany
Prior art keywords
producing
semiconductor arrangement
semiconductor
arrangement
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69940737T
Other languages
English (en)
Inventor
Hiroshi Iwata
Seizo Kakimoto
Masayuki Nakano
Kouichiro Adachi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Application granted granted Critical
Publication of DE69940737D1 publication Critical patent/DE69940737D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/721—Insulated-gate field-effect transistors [IGFET] having a gate-to-body connection, i.e. bulk dynamic threshold voltage IGFET 
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/027—Manufacture or treatment of FETs having insulated gates [IGFET] of lateral single-gate IGFETs
    • H10D30/0275—Manufacture or treatment of FETs having insulated gates [IGFET] of lateral single-gate IGFETs forming single crystalline semiconductor source or drain regions resulting in recessed gates, e.g. forming raised source or drain regions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/031—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT]
    • H10D30/0321—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] comprising silicon, e.g. amorphous silicon or polysilicon
    • H10D30/0323—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] comprising silicon, e.g. amorphous silicon or polysilicon comprising monocrystalline silicon
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6704—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device
    • H10D30/6708—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device for preventing the kink effect or the snapback effect, e.g. discharging the minority carriers of the channel region for preventing bipolar effect
    • H10D30/6711—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device for preventing the kink effect or the snapback effect, e.g. discharging the minority carriers of the channel region for preventing bipolar effect by using electrodes contacting the supplementary regions or layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6704—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device
    • H10D30/6713—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/674—Thin-film transistors [TFT] characterised by the active materials
    • H10D30/6741—Group IV materials, e.g. germanium or silicon carbide
    • H10D30/6743—Silicon
    • H10D30/6744—Monocrystalline silicon
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/01—Manufacture or treatment
DE69940737T 1998-06-30 1999-06-29 Verfahren zur herstellung einer halbleiteranordnung Expired - Lifetime DE69940737D1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP18346698 1998-06-30
PCT/JP1999/003483 WO2000001015A1 (en) 1998-06-30 1999-06-29 Semiconductor device and method of manufacture thereof

Publications (1)

Publication Number Publication Date
DE69940737D1 true DE69940737D1 (de) 2009-05-28

Family

ID=16136291

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69940737T Expired - Lifetime DE69940737D1 (de) 1998-06-30 1999-06-29 Verfahren zur herstellung einer halbleiteranordnung

Country Status (5)

Country Link
US (2) US6426532B1 (de)
EP (1) EP1100128B1 (de)
KR (1) KR100349768B1 (de)
DE (1) DE69940737D1 (de)
WO (1) WO2000001015A1 (de)

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JP3523093B2 (ja) * 1997-11-28 2004-04-26 株式会社東芝 半導体装置およびその製造方法
KR100349768B1 (ko) * 1998-06-30 2002-08-24 샤프 가부시키가이샤 반도체 장치 및 그의 제조방법
US6617226B1 (en) * 1999-06-30 2003-09-09 Kabushiki Kaisha Toshiba Semiconductor device and method for manufacturing the same
KR100679203B1 (ko) 2000-01-07 2007-02-07 샤프 가부시키가이샤 반도체 장치, 그 제조 방법, 및 정보 처리 장치
KR100372643B1 (ko) * 2000-06-30 2003-02-17 주식회사 하이닉스반도체 다마신 공정을 이용한 반도체 소자의 제조방법
JP4614522B2 (ja) * 2000-10-25 2011-01-19 富士通セミコンダクター株式会社 半導体装置及びその製造方法
JP2002237575A (ja) * 2001-02-08 2002-08-23 Sharp Corp 半導体装置及びその製造方法
JP2003031697A (ja) * 2001-07-19 2003-01-31 Sharp Corp スタティック型ランダムアクセスメモリ装置及びその製造方法
US20040207011A1 (en) * 2001-07-19 2004-10-21 Hiroshi Iwata Semiconductor device, semiconductor storage device and production methods therefor
JP4193097B2 (ja) 2002-02-18 2008-12-10 日本電気株式会社 半導体装置およびその製造方法
JP2003332582A (ja) * 2002-05-13 2003-11-21 Toshiba Corp 半導体装置及びその製造方法
US6900091B2 (en) * 2002-08-14 2005-05-31 Advanced Analogic Technologies, Inc. Isolated complementary MOS devices in epi-less substrate
JP2004128121A (ja) * 2002-10-01 2004-04-22 Matsushita Electric Ind Co Ltd 半導体装置およびその製造方法
JP2004319853A (ja) * 2003-04-17 2004-11-11 Oki Electric Ind Co Ltd 半導体装置及びその製造方法
JP2004342889A (ja) * 2003-05-16 2004-12-02 Sharp Corp 半導体記憶装置、半導体装置、半導体記憶装置の製造方法、および携帯電子機器
US7137089B1 (en) * 2004-09-01 2006-11-14 National Semiconductor Corporation Systems and methods for reducing IR-drop noise
US20060118869A1 (en) * 2004-12-03 2006-06-08 Je-Hsiung Lan Thin-film transistors and processes for forming the same
CN1945852A (zh) * 2005-10-06 2007-04-11 松下电器产业株式会社 半导体装置及其制造方法
US7659579B2 (en) 2006-10-06 2010-02-09 International Business Machines Corporation FETS with self-aligned bodies and backgate holes
US7534689B2 (en) * 2006-11-21 2009-05-19 Advanced Micro Devices, Inc. Stress enhanced MOS transistor and methods for its fabrication
US7863143B2 (en) * 2008-05-01 2011-01-04 International Business Machines Corporation High performance schottky-barrier-source asymmetric MOSFETs
CN104425522B (zh) * 2013-09-10 2017-10-20 中芯国际集成电路制造(上海)有限公司 一种半导体器件及其制造方法
US9728637B2 (en) 2013-11-14 2017-08-08 Taiwan Semiconductor Manufacturing Co., Ltd. Mechanism for forming semiconductor device with gate
CN115207126B (zh) * 2022-06-28 2025-07-08 上海积塔半导体有限公司 一种mosfet结构及其制作方法

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US4462040A (en) * 1979-05-07 1984-07-24 International Business Machines Corporation Single electrode U-MOSFET random access memory
US4409723A (en) * 1980-04-07 1983-10-18 Eliyahou Harari Method of forming non-volatile EPROM and EEPROM with increased efficiency
US4555721A (en) * 1981-05-19 1985-11-26 International Business Machines Corporation Structure of stacked, complementary MOS field effect transistor circuits
US4467518A (en) * 1981-05-19 1984-08-28 Ibm Corporation Process for fabrication of stacked, complementary MOS field effect transistor circuits
US4445267A (en) * 1981-12-30 1984-05-01 International Business Machines Corporation MOSFET Structure and process to form micrometer long source/drain spacing
JPH0732124B2 (ja) 1986-01-24 1995-04-10 シャープ株式会社 半導体装置の製造方法
JPH063812B2 (ja) * 1987-07-13 1994-01-12 株式会社東芝 半導体装置の製造方法
US5303185A (en) * 1988-02-05 1994-04-12 Emanuel Hazani EEPROM cell structure and architecture with increased capacitance and with programming and erase terminals shared between several cells
US5314835A (en) 1989-06-20 1994-05-24 Sharp Kabushiki Kaisha Semiconductor memory device
JPH0374848A (ja) * 1989-08-16 1991-03-29 Hitachi Ltd 半導体装置及びその製造方法
US5234847A (en) * 1990-04-02 1993-08-10 National Semiconductor Corporation Method of fabricating a BiCMOS device having closely spaced contacts
US5168072A (en) * 1990-10-12 1992-12-01 Texas Instruments Incorporated Method of fabricating an high-performance insulated-gate field-effect transistor
JP3074848B2 (ja) 1991-09-13 2000-08-07 東ソー株式会社 エチレンアミンを製造する方法
JPH06326262A (ja) * 1992-05-22 1994-11-25 Seiko Instr Inc 半導体装置及びその製造方法
JP2903892B2 (ja) * 1992-09-07 1999-06-14 日本電気株式会社 電界効果トランジスタの製造方法
KR0132281B1 (ko) * 1992-12-21 1998-04-11 쓰지 하루오 반도체 장치의 형성방법
US6107194A (en) * 1993-12-17 2000-08-22 Stmicroelectronics, Inc. Method of fabricating an integrated circuit
US5559368A (en) 1994-08-30 1996-09-24 The Regents Of The University Of California Dynamic threshold voltage mosfet having gate to body connection for ultra-low voltage operation
JP2964925B2 (ja) * 1994-10-12 1999-10-18 日本電気株式会社 相補型ｍｉｓ型ｆｅｔの製造方法
DE69531282T2 (de) * 1994-12-20 2004-05-27 STMicroelectronics, Inc., Carrollton Isolierung durch aktive Transistoren mit geerdeten Torelektroden
US5960319A (en) 1995-10-04 1999-09-28 Sharp Kabushiki Kaisha Fabrication method for a semiconductor device
JPH1022462A (ja) * 1996-06-28 1998-01-23 Sharp Corp 半導体装置及びその製造方法
US6060723A (en) * 1997-07-18 2000-05-09 Hitachi, Ltd. Controllable conduction device
US5773331A (en) * 1996-12-17 1998-06-30 International Business Machines Corporation Method for making single and double gate field effect transistors with sidewall source-drain contacts
JPH10335660A (ja) 1997-06-05 1998-12-18 Nec Corp 半導体装置およびその製造方法
US6054355A (en) * 1997-06-30 2000-04-25 Kabushiki Kaisha Toshiba Method of manufacturing a semiconductor device which includes forming a dummy gate
KR100349768B1 (ko) * 1998-06-30 2002-08-24 샤프 가부시키가이샤 반도체 장치 및 그의 제조방법
US6172405B1 (en) 1998-07-17 2001-01-09 Sharp Kabushiki Kaisha Semiconductor device and production process therefore
JP2000353804A (ja) * 1999-06-11 2000-12-19 Mitsubishi Electric Corp 半導体装置およびその製造方法

Also Published As

Publication number Publication date
EP1100128A4 (de) 2005-07-06
EP1100128A1 (de) 2001-05-16
KR100349768B1 (ko) 2002-08-24
US20020175374A1 (en) 2002-11-28
WO2000001015A1 (en) 2000-01-06
US6426532B1 (en) 2002-07-30
EP1100128B1 (de) 2009-04-15
US6682966B2 (en) 2004-01-27
KR20010083080A (ko) 2001-08-31

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