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DE60143882D1 - Verfahren zur Herstellung einer MOS-gesteuerten Halbleiteranordnung - Google Patents

Verfahren zur Herstellung einer MOS-gesteuerten Halbleiteranordnung

Info

Publication number
DE60143882D1
DE60143882D1 DE60143882T DE60143882T DE60143882D1 DE 60143882 D1 DE60143882 D1 DE 60143882D1 DE 60143882 T DE60143882 T DE 60143882T DE 60143882 T DE60143882 T DE 60143882T DE 60143882 D1 DE60143882 D1 DE 60143882D1
Authority
DE
Germany
Prior art keywords
mos
producing
semiconductor device
controlled semiconductor
controlled
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60143882T
Other languages
English (en)
Inventor
Christopher Kocon
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fairchild Semiconductor Corp
Original Assignee
Fairchild Semiconductor Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fairchild Semiconductor Corp filed Critical Fairchild Semiconductor Corp
Application granted granted Critical
Publication of DE60143882D1 publication Critical patent/DE60143882D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/64Double-diffused metal-oxide semiconductor [DMOS] FETs
    • H10D30/66Vertical DMOS [VDMOS] FETs
    • H10P10/00
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/64Double-diffused metal-oxide semiconductor [DMOS] FETs
    • H10D30/66Vertical DMOS [VDMOS] FETs
    • H10D30/668Vertical DMOS [VDMOS] FETs having trench gate electrodes, e.g. UMOS transistors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/102Constructional design considerations for preventing surface leakage or controlling electric field concentration
    • H10D62/103Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices
    • H10D62/105Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE] 
    • H10D62/109Reduced surface field [RESURF] PN junction structures
    • H10D62/111Multiple RESURF structures, e.g. double RESURF or 3D-RESURF structures
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/113Isolations within a component, i.e. internal isolations
    • H10D62/115Dielectric isolations, e.g. air gaps
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/17Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
    • H10D62/393Body regions of DMOS transistors or IGBTs 
DE60143882T 2000-02-11 2001-01-30 Verfahren zur Herstellung einer MOS-gesteuerten Halbleiteranordnung Expired - Lifetime DE60143882D1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/502,712 US6376878B1 (en) 2000-02-11 2000-02-11 MOS-gated devices with alternating zones of conductivity
PCT/US2001/002964 WO2001059848A2 (en) 2000-02-11 2001-01-30 Mos-gated semiconductor device having alternating conductivity type semiconductor regions and methods of making the same

Publications (1)

Publication Number Publication Date
DE60143882D1 true DE60143882D1 (de) 2011-03-03

Family

ID=23999054

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60143882T Expired - Lifetime DE60143882D1 (de) 2000-02-11 2001-01-30 Verfahren zur Herstellung einer MOS-gesteuerten Halbleiteranordnung

Country Status (7)

Country Link
US (1) US6376878B1 (de)
EP (1) EP1256133B1 (de)
JP (2) JP2003523089A (de)
KR (1) KR100692877B1 (de)
AU (1) AU2001234648A1 (de)
DE (1) DE60143882D1 (de)
WO (1) WO2001059848A2 (de)

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US7504306B2 (en) 2005-04-06 2009-03-17 Fairchild Semiconductor Corporation Method of forming trench gate field effect transistor with recessed mesas
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US7446374B2 (en) 2006-03-24 2008-11-04 Fairchild Semiconductor Corporation High density trench FET with integrated Schottky diode and method of manufacture
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JP5015762B2 (ja) * 2007-01-09 2012-08-29 株式会社ワイ・ワイ・エル 半導体装置
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KR100943498B1 (ko) 2007-12-26 2010-02-22 주식회사 동부하이텍 반도체 소자 및 그 제조방법
US7772668B2 (en) * 2007-12-26 2010-08-10 Fairchild Semiconductor Corporation Shielded gate trench FET with multiple channels
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TWI587503B (zh) * 2012-01-11 2017-06-11 世界先進積體電路股份有限公司 半導體裝置及其製造方法
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Also Published As

Publication number Publication date
WO2001059848A3 (en) 2002-05-02
KR20020075404A (ko) 2002-10-04
WO2001059848A2 (en) 2001-08-16
US6376878B1 (en) 2002-04-23
EP1256133A2 (de) 2002-11-13
KR100692877B1 (ko) 2007-03-12
AU2001234648A1 (en) 2001-08-20
EP1256133B1 (de) 2011-01-19
JP2012138600A (ja) 2012-07-19
JP2003523089A (ja) 2003-07-29

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