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DE69934814D1 - Nichtzirkuläre mikro-bohrung - Google Patents

Nichtzirkuläre mikro-bohrung

Info

Publication number
DE69934814D1
DE69934814D1 DE69934814T DE69934814T DE69934814D1 DE 69934814 D1 DE69934814 D1 DE 69934814D1 DE 69934814 T DE69934814 T DE 69934814T DE 69934814 T DE69934814 T DE 69934814T DE 69934814 D1 DE69934814 D1 DE 69934814D1
Authority
DE
Germany
Prior art keywords
drilling
circular micro
micro
circular
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69934814T
Other languages
English (en)
Other versions
DE69934814T2 (de
Inventor
A Cotton
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Viasystems Group Inc
Original Assignee
Viasystems Group Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Viasystems Group Inc filed Critical Viasystems Group Inc
Application granted granted Critical
Publication of DE69934814D1 publication Critical patent/DE69934814D1/de
Publication of DE69934814T2 publication Critical patent/DE69934814T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
    • H05K1/0218—Reduction of cross-talk, noise or electromagnetic interference by printed shielding conductors, ground planes or power plane
    • H05K1/0219—Printed shielding conductors for shielding around or between signal conductors, e.g. coplanar or coaxial printed shielding conductors
    • H05K1/0221—Coaxially shielded signal lines comprising a continuous shielding layer partially or wholly surrounding the signal lines
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
    • H05K1/0218—Reduction of cross-talk, noise or electromagnetic interference by printed shielding conductors, ground planes or power plane
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H05K1/115—Via connections; Lands around holes or via connections
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09009—Substrate related
    • H05K2201/09036—Recesses or grooves in insulating substrate
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/0929—Conductive planes
    • H05K2201/09354—Ground conductor along edge of main surface
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/095—Conductive through-holes or vias
    • H05K2201/09509—Blind vias, i.e. vias having one side closed
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09818—Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
    • H05K2201/09854—Hole or via having special cross-section, e.g. elliptical
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09818—Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
    • H05K2201/09981—Metallised walls
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0011—Working of insulating substrates or insulating layers
    • H05K3/0017—Etching of the substrate by chemical or physical means
    • H05K3/0026—Etching of the substrate by chemical or physical means by laser ablation
    • H05K3/0032—Etching of the substrate by chemical or physical means by laser ablation of organic insulating material
    • H05K3/0035—Etching of the substrate by chemical or physical means by laser ablation of organic insulating material of blind holes, i.e. having a metal layer at the bottom
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0011—Working of insulating substrates or insulating layers
    • H05K3/0017—Etching of the substrate by chemical or physical means
    • H05K3/0041—Etching of the substrate by chemical or physical means by plasma etching
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4652—Adding a circuit layer by laminating a metal foil or a preformed metal foil pattern
    • H10W42/20—

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Structure Of Printed Boards (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
  • Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)
  • Manufacturing Of Printed Wiring (AREA)
  • Parts Printed On Printed Circuit Boards (AREA)
  • Laminated Bodies (AREA)
  • Multi-Conductor Connections (AREA)
DE69934814T 1998-09-10 1999-09-07 Nichtzirkuläre mikro-bohrung Expired - Fee Related DE69934814T2 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US9973098P 1998-09-10 1998-09-10
US99730P 1998-09-10
PCT/US1999/020418 WO2000016443A1 (en) 1998-09-10 1999-09-07 Non-circular micro-via

Publications (2)

Publication Number Publication Date
DE69934814D1 true DE69934814D1 (de) 2007-02-22
DE69934814T2 DE69934814T2 (de) 2007-10-11

Family

ID=22276347

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69934814T Expired - Fee Related DE69934814T2 (de) 1998-09-10 1999-09-07 Nichtzirkuläre mikro-bohrung

Country Status (15)

Country Link
EP (1) EP1127387B1 (de)
JP (1) JP2002525854A (de)
KR (3) KR20010086372A (de)
CN (1) CN1133240C (de)
AU (2) AU5812099A (de)
BR (1) BR9913588A (de)
CA (1) CA2343445A1 (de)
DE (1) DE69934814T2 (de)
EA (1) EA003157B1 (de)
ES (1) ES2281188T3 (de)
IL (1) IL141826A0 (de)
NO (1) NO20011219L (de)
PL (1) PL346561A1 (de)
TR (1) TR200100713T2 (de)
WO (2) WO2000016443A1 (de)

Families Citing this family (28)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10052532C2 (de) * 2000-10-23 2002-11-14 Conducta Endress & Hauser Leiterplatte mit einer Eingangsschaltung zur Aufnahme und Verarbeitung eines elektrischen Signals sowie Verwendung der Leiterplatte
EP1356531A1 (de) * 2001-01-24 2003-10-29 Koninklijke Philips Electronics N.V. Verfahren zur herstellung einer bahn auf einem substrat
DE10219388A1 (de) 2002-04-30 2003-11-20 Siemens Ag Verfahren zur Erzeugung einer Grabenstruktur in einem Polymer-Substrat
US8129628B2 (en) 2005-10-31 2012-03-06 Sharp Kabushiki Kaisha Multilayer wiring board and method for manufacturing multilayer wiring board
JP2009033114A (ja) * 2007-06-29 2009-02-12 Tdk Corp 電子モジュール、及び電子モジュールの製造方法
DE102009019782A1 (de) 2009-05-02 2010-11-04 Valeo Schalter Und Sensoren Gmbh Verfahren zur Herstellung von durchkontaktierbaren Leiterplatten
JP2011061021A (ja) * 2009-09-10 2011-03-24 Kyokutoku Kagi Kofun Yugenkoshi 非円柱ビア構造及びこのビア構造を有する伝熱促進基板
US8488329B2 (en) 2010-05-10 2013-07-16 International Business Machines Corporation Power and ground vias for power distribution systems
US8748750B2 (en) 2011-07-08 2014-06-10 Honeywell International Inc. Printed board assembly interface structures
WO2014108744A1 (en) * 2013-01-09 2014-07-17 Freescale Semiconductor, Inc. Electronic high frequency device and manufacturing method
KR102128508B1 (ko) * 2013-10-08 2020-06-30 엘지이노텍 주식회사 인쇄회로기판
KR101507268B1 (ko) * 2014-01-10 2015-03-30 (주)인터플렉스 연성회로기판의 그라운드 확장 구조
US20170064821A1 (en) * 2015-08-31 2017-03-02 Kristof Darmawikarta Electronic package and method forming an electrical package
US10516207B2 (en) 2017-05-17 2019-12-24 Nxp B.V. High frequency system, communication link
FR3077158B1 (fr) * 2018-01-25 2021-02-26 Commissariat Energie Atomique Puce electronique a face arriere protegee par une structure de fragilisation amelioree
EP3582233B1 (de) * 2018-06-13 2021-07-28 Airbus Operations, S.L.U. Verfahren zur gedruckten kabelinstallation in kabelbaumsystemen für flugzeuge und verbundelement mit integriertem kabelbaumsystem
WO2020180149A1 (ko) 2019-03-07 2020-09-10 에스케이씨 주식회사 패키징 기판 및 이를 포함하는 반도체 장치
EP3905315A4 (de) 2019-03-07 2022-10-19 Absolics Inc. Verpackungssubstrat und halbleiterbauelement damit
KR102653023B1 (ko) 2019-03-12 2024-03-28 앱솔릭스 인코포레이티드 패키징 기판 및 이를 포함하는 반도체 장치
CN113261093B (zh) 2019-03-12 2024-04-16 爱玻索立克公司 半导体封装用基板及其制备方法以及半导体装置
KR102537005B1 (ko) 2019-03-12 2023-05-26 앱솔릭스 인코포레이티드 유리를 포함하는 기판의 적재 카세트 및 이를 적용한 기판의 적재방법
US11967542B2 (en) 2019-03-12 2024-04-23 Absolics Inc. Packaging substrate, and semiconductor device comprising same
PL3910667T3 (pl) 2019-03-29 2025-11-12 Absolics Inc. Opakowaniowe podłoże szklane dla półprzewodnika, podłoże opakowaniowe dla półprzewodnika i urządzenie półprzewodnikowe
CN112312648B (zh) * 2019-07-31 2025-08-01 深南电路股份有限公司 线路板及其制作方法
WO2021040178A1 (ko) 2019-08-23 2021-03-04 에스케이씨 주식회사 패키징 기판 및 이를 포함하는 반도체 장치
KR20220003342A (ko) 2020-07-01 2022-01-10 삼성전기주식회사 전자 소자 패키지 및 이의 제조방법
US11756897B2 (en) * 2021-05-05 2023-09-12 STATS ChipPAC Pte. Ltd. Semiconductor device and method of forming a slot in EMI shielding with improved removal depth
US12328811B2 (en) 2021-07-27 2025-06-10 Samsung Electronics Co., Ltd Insulating member arrangement structure and electronic device including the same

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CA939831A (en) * 1969-03-27 1974-01-08 Frederick W. Schneble (Jr.) Plated through hole printed circuit boards
US5347086A (en) * 1992-03-24 1994-09-13 Microelectronics And Computer Technology Corporation Coaxial die and substrate bumps
US5304743A (en) * 1992-05-12 1994-04-19 Lsi Logic Corporation Multilayer IC semiconductor package
JP3241139B2 (ja) * 1993-02-04 2001-12-25 三菱電機株式会社 フィルムキャリア信号伝送線路
US5401912A (en) * 1993-06-07 1995-03-28 St Microwave Corp., Arizona Operations Microwave surface mount package
US5359767A (en) * 1993-08-26 1994-11-01 International Business Machines Corporation Method of making multilayered circuit board
JPH07235775A (ja) * 1994-02-21 1995-09-05 Mitsubishi Electric Corp 多層プリント配線基板
US5773195A (en) * 1994-12-01 1998-06-30 International Business Machines Corporation Cap providing flat surface for DCA and solder ball attach and for sealing plated through holes, multi-layer electronic structures including the cap, and a process of forming the cap and for forming multi-layer electronic structures including the cap
EP0916237B1 (de) * 1996-07-31 2001-01-17 Dyconex Patente Verfahren zur herstellung von verbindungsleitern
US5724727A (en) * 1996-08-12 1998-03-10 Motorola, Inc. Method of forming electronic component

Also Published As

Publication number Publication date
KR20010086372A (ko) 2001-09-10
AU5820999A (en) 2000-03-27
BR9913588A (pt) 2001-06-05
EA003157B1 (ru) 2003-02-27
KR20030074545A (ko) 2003-09-19
CN1317163A (zh) 2001-10-10
DE69934814T2 (de) 2007-10-11
HK1042780A1 (en) 2002-08-23
EP1127387A1 (de) 2001-08-29
EP1127387B1 (de) 2007-01-10
AU5812099A (en) 2000-04-03
NO20011219D0 (no) 2001-03-09
WO2000016443A1 (en) 2000-03-23
CA2343445A1 (en) 2000-03-23
NO20011219L (no) 2001-05-04
WO2000014771A2 (en) 2000-03-16
TR200100713T2 (tr) 2001-10-22
CN1133240C (zh) 2003-12-31
KR20030074544A (ko) 2003-09-19
PL346561A1 (en) 2002-02-11
ES2281188T3 (es) 2007-09-16
EP1127387A4 (de) 2004-05-26
IL141826A0 (en) 2002-03-10
JP2002525854A (ja) 2002-08-13
EA200100329A1 (ru) 2001-10-22
KR100455021B1 (ko) 2004-11-06

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee