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BR9808381A - Integrated circuit and integrated circuit test process - Google Patents

Integrated circuit and integrated circuit test process

Info

Publication number
BR9808381A
BR9808381A BR9808381-3A BR9808381A BR9808381A BR 9808381 A BR9808381 A BR 9808381A BR 9808381 A BR9808381 A BR 9808381A BR 9808381 A BR9808381 A BR 9808381A
Authority
BR
Brazil
Prior art keywords
integrated circuit
rom
test process
user
cpu
Prior art date
Application number
BR9808381-3A
Other languages
Portuguese (pt)
Inventor
Juergen Nolles
Hans-Heinrich Viehmann
Original Assignee
Siemens Ag
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens Ag filed Critical Siemens Ag
Publication of BR9808381A publication Critical patent/BR9808381A/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Quality & Reliability (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Microcomputers (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Storage Device Security (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)

Abstract

Patente de Invenção: <B>"CIRCUITO INTEGRADO E PROCESSO PARA TESTE DO CIRCUITO INTEGRADO"<D>. Circuito integrado com uma CPU e uma ROM de usuário caracterizado por uma ROM de teste, cujo espaço de endereço se encontra dentro do espaço de endereço da ROM de usuário, uma RAM externa à CPU bem como um dispositivo de comutação, que possibilita um acesso apenas à ROM de usuário ou à ROM de teste e é irreversivelmente deslocável para um estado, que permite apenas um acesso à ROM de usuário.Invention Patent: <B> "INTEGRATED CIRCUIT AND PROCESS FOR TESTING THE INTEGRATED CIRCUIT" <D>. Integrated circuit with a CPU and a user ROM characterized by a test ROM, whose address space is within the address space of the user ROM, a RAM external to the CPU as well as a switching device, which allows access only to the user ROM or the test ROM and is irreversibly movable to a state, which allows only access to the user ROM.

BR9808381-3A 1997-03-19 1998-03-02 Integrated circuit and integrated circuit test process BR9808381A (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE19711478A DE19711478A1 (en) 1997-03-19 1997-03-19 Integrated circuit and method for testing the integrated circuit
PCT/DE1998/000608 WO1998041880A2 (en) 1997-03-19 1998-03-02 Integrated circuit and method for testing the same

Publications (1)

Publication Number Publication Date
BR9808381A true BR9808381A (en) 2000-05-23

Family

ID=7823916

Family Applications (1)

Application Number Title Priority Date Filing Date
BR9808381-3A BR9808381A (en) 1997-03-19 1998-03-02 Integrated circuit and integrated circuit test process

Country Status (7)

Country Link
EP (1) EP0968436A2 (en)
JP (1) JP2001527669A (en)
KR (1) KR20000076351A (en)
CN (1) CN1251183A (en)
BR (1) BR9808381A (en)
DE (1) DE19711478A1 (en)
WO (1) WO1998041880A2 (en)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3198997B2 (en) * 1997-08-28 2001-08-13 日本電気株式会社 Microcomputer and burn-in test method thereof
EP0992809A1 (en) 1998-09-28 2000-04-12 Siemens Aktiengesellschaft Circuit with deactivatable scan path
RU2174692C1 (en) * 2000-06-27 2001-10-10 Ульяновский государственный технический университет Device for measuring transition-body heat resistance of digital integral microcircuits
DE10101234A1 (en) * 2001-01-11 2002-07-18 Giesecke & Devrient Gmbh Testing non-volatile memory involves producing test pattern, write access to memory with test pattern, read access to acquire test result and comparison with test pattern for agreement
DE602004020414D1 (en) 2003-02-24 2009-05-20 St Microelectronics Sa Method and device for selecting the operating mode of an integrated circuit
CN1829127B (en) * 2006-04-20 2011-06-29 北京星河亮点通信软件有限责任公司 Method for building communication terminal test instrumentation control platform based on microkernel
CN102592683B (en) * 2012-02-23 2014-12-10 苏州华芯微电子股份有限公司 Method for entering chip test mode and related device
CN103021471B (en) * 2012-12-24 2016-08-03 上海新储集成电路有限公司 A kind of memorizer and storage method thereof
US10818374B2 (en) * 2018-10-29 2020-10-27 Texas Instruments Incorporated Testing read-only memory using memory built-in self-test controller

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0758502B2 (en) * 1988-06-30 1995-06-21 三菱電機株式会社 IC card
JP3125070B2 (en) * 1990-12-14 2001-01-15 三菱電機株式会社 IC card
JPH06236447A (en) * 1993-02-09 1994-08-23 Mitsubishi Electric Corp Microcomputer for ic card

Also Published As

Publication number Publication date
CN1251183A (en) 2000-04-19
EP0968436A2 (en) 2000-01-05
KR20000076351A (en) 2000-12-26
WO1998041880A2 (en) 1998-09-24
DE19711478A1 (en) 1998-10-01
JP2001527669A (en) 2001-12-25
WO1998041880A3 (en) 1999-01-14

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Legal Events

Date Code Title Description
B08F Application dismissed because of non-payment of annual fees [chapter 8.6 patent gazette]

Free format text: REFERENTE A 4A, 5A,6A, 7A, 8A E 9A ANUIDADES

B08K Patent lapsed as no evidence of payment of the annual fee has been furnished to inpi [chapter 8.11 patent gazette]

Free format text: REFERENTE AO DESPACHO 8.6 NA RPI 1892 DE 10/04/2007