AU2002352885A1 - Improving integrated circuit performance and reliability using a patterned bump layout on a power grid - Google Patents

Improving integrated circuit performance and reliability using a patterned bump layout on a power grid

Info

Publication number: AU2002352885A1
Authority: AU; Australia
Prior art keywords: reliability; integrated circuit; power grid; circuit performance; improving integrated
Prior art date: 2001-11-29
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.): Abandoned

Application number

AU2002352885A

Inventor

Sudhakar Bobba

Dean Liu

Tyler J. Thorp

Pradeep R. Trivedi

Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)

Sun Microsystems Inc

Original Assignee

Sun Microsystems Inc

Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)

2001-11-29

Filing date

2002-11-25

Publication date

2003-06-17

2001-11-29 Priority claimed from US09/997,437 external-priority patent/US6473883B1/en

2001-11-29 Priority claimed from US09/997,523 external-priority patent/US6541873B1/en

2001-11-29 Priority claimed from US09/997,471 external-priority patent/US6495926B1/en

2001-11-29 Priority claimed from US09/997,844 external-priority patent/US6617699B2/en

2001-11-29 Priority claimed from US09/997,452 external-priority patent/US6577002B1/en

2001-11-29 Priority claimed from US09/997,438 external-priority patent/US6762505B2/en

2002-11-25 Application filed by Sun Microsystems Inc filed Critical Sun Microsystems Inc

2003-06-17 Publication of AU2002352885A1 publication Critical patent/AU2002352885A1/en

Status Abandoned legal-status Critical Current

Classifications

- H10W72/00—
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/30—Circuit design
- G06F30/39—Circuit design at the physical level
- H10W20/427—
- H10W20/43—
- H10W72/012—
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0263—High current adaptations, e.g. printed high current conductors or using auxiliary non-printed means; Fine and coarse circuit patterns on one circuit board
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/111—Pads for surface mounting, e.g. lay-out
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3431—Leadless components
- H05K3/3436—Leadless components having an array of bottom contacts, e.g. pad grid array or ball grid array components
- H10W72/20—
- H10W72/248—
- H10W72/251—

Landscapes

Engineering & Computer Science (AREA)
Computer Hardware Design (AREA)
Physics & Mathematics (AREA)
Theoretical Computer Science (AREA)
Evolutionary Computation (AREA)
Geometry (AREA)
General Engineering & Computer Science (AREA)
General Physics & Mathematics (AREA)
Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Semiconductor Integrated Circuits (AREA)
Wire Bonding (AREA)
Design And Manufacture Of Integrated Circuits (AREA)

AU2002352885A 2001-11-29 2002-11-25 Improving integrated circuit performance and reliability using a patterned bump layout on a power grid Abandoned AU2002352885A1 (en)

Applications Claiming Priority (13)

Application Number	Priority Date	Filing Date	Title
US09/997,437 US6473883B1 (en)	2001-11-29	2001-11-29	Integrated circuit performance and reliability using angle measurement for a patterned bump layout on a power grid
US09/997,523 US6541873B1 (en)	2001-11-29	2001-11-29	90 degree bump placement layout for an integrated circuit power grid
US09/997,523		2001-11-29
US09/997,471 US6495926B1 (en)	2001-11-29	2001-11-29	60 degree bump placement layout for an integrated circuit power grid
US09/997,437		2001-11-29
US09/997,844		2001-11-29
US09/997,844 US6617699B2 (en)	2001-11-29	2001-11-29	120 degree bump placement layout for an integrated circuit power grid
US09/997,452 US6577002B1 (en)	2001-11-29	2001-11-29	180 degree bump placement layout for an integrated circuit power grid
US09/997,438		2001-11-29
US09/997,471		2001-11-29
US09/997,438 US6762505B2 (en)	2001-11-29	2001-11-29	150 degree bump placement layout for an integrated circuit power grid
US09/997,452		2001-11-29
PCT/US2002/037643 WO2003048981A2 (en)	2001-11-29	2002-11-25	Improving integrated circuit performance and reliability using a patterned bump layout on a power grid

Publications (1)

Publication Number	Publication Date
AU2002352885A1 true AU2002352885A1 (en)	2003-06-17

Family

ID=27560358

Family Applications (1)

Application Number	Title	Priority Date	Filing Date
AU2002352885A Abandoned AU2002352885A1 (en)	2001-11-29	2002-11-25	Improving integrated circuit performance and reliability using a patterned bump layout on a power grid

Country Status (4)

Country	Link
JP (1)	JP2005512315A (en)
AU (1)	AU2002352885A1 (en)
GB (1)	GB2398903A (en)
WO (1)	WO2003048981A2 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
US6961247B2 (en) *	2002-06-27	2005-11-01	Sun Microsystems, Inc.	Power grid and bump pattern with reduced inductance and resistance
US7335536B2 (en) *	2005-09-01	2008-02-26	Texas Instruments Incorporated	Method for fabricating low resistance, low inductance interconnections in high current semiconductor devices

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
US5801966A (en) *	1995-07-24	1998-09-01	Cognex Corporation	Machine vision methods and articles of manufacture for determination of convex hull and convex hull angle
US6410990B2 (en) *	1997-12-12	2002-06-25	Intel Corporation	Integrated circuit device having C4 and wire bond connections
US6396712B1 (en) *	1998-02-12	2002-05-28	Rose Research, L.L.C.	Method and apparatus for coupling circuit components
US6323559B1 (en) *	1998-06-23	2001-11-27	Lsi Logic Corporation	Hexagonal arrangements of bump pads in flip-chip integrated circuits
TW430935B (en) *	1999-03-19	2001-04-21	Ind Tech Res Inst	Frame type bonding pad structure having a low parasitic capacitance

2002
- 2002-11-25 AU AU2002352885A patent/AU2002352885A1/en not_active Abandoned
- 2002-11-25 JP JP2003550104A patent/JP2005512315A/en active Pending
- 2002-11-25 WO PCT/US2002/037643 patent/WO2003048981A2/en not_active Ceased
2004
- 2004-05-14 GB GB0410834A patent/GB2398903A/en not_active Withdrawn

Also Published As

Publication number	Publication date
WO2003048981A3 (en)	2004-06-24
GB2398903A (en)	2004-09-01
JP2005512315A (en)	2005-04-28
GB0410834D0 (en)	2004-06-16
WO2003048981A2 (en)	2003-06-12

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Legal Events

Date	Code	Title	Description
2004-08-12	MK6	Application lapsed section 142(2)(f)/reg. 8.3(3) - pct applic. not entering national phase