MX2010001526A - Dispositivo de circuito y metodo para medir inestabilidad de reloj. - Google Patents
Dispositivo de circuito y metodo para medir inestabilidad de reloj.Info
- Publication number
- MX2010001526A MX2010001526A MX2010001526A MX2010001526A MX2010001526A MX 2010001526 A MX2010001526 A MX 2010001526A MX 2010001526 A MX2010001526 A MX 2010001526A MX 2010001526 A MX2010001526 A MX 2010001526A MX 2010001526 A MX2010001526 A MX 2010001526A
- Authority
- MX
- Mexico
- Prior art keywords
- circuit device
- clock jitter
- measuring clock
- clock signal
- value
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G04—HOROLOGY
- G04F—TIME-INTERVAL MEASURING
- G04F10/00—Apparatus for measuring unknown time intervals by electric means
- G04F10/005—Time-to-digital converters [TDC]
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R29/00—Arrangements for measuring or indicating electric quantities not covered by groups G01R19/00 - G01R27/00
- G01R29/26—Measuring noise figure; Measuring signal-to-noise ratio
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/31708—Analysis of signal quality
- G01R31/31709—Jitter measurements; Jitter generators
Landscapes
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Pulse Circuits (AREA)
- Manipulation Of Pulses (AREA)
- Tests Of Electronic Circuits (AREA)
- Dc Digital Transmission (AREA)
- Testing, Inspecting, Measuring Of Stereoscopic Televisions And Televisions (AREA)
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
- Measuring Phase Differences (AREA)
Abstract
En una modalidad, se describe un método que incluye recibir una señal de reloj en una cadena de retardo de un dispositivo de circuito y determinar un valor de la señal de reloj en un punto seleccionado dentro de la cadena de retardo. El método también incluye ajustar el punto seleccionado cuando el valor no indica detección de un borde de la señal de reloj.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US11/836,220 US7816960B2 (en) | 2007-08-09 | 2007-08-09 | Circuit device and method of measuring clock jitter |
| PCT/US2008/072629 WO2009021186A1 (en) | 2007-08-09 | 2008-08-08 | Circuit device and method of measuring clock jitter |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| MX2010001526A true MX2010001526A (es) | 2010-03-15 |
Family
ID=39590275
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| MX2010001526A MX2010001526A (es) | 2007-08-09 | 2008-08-08 | Dispositivo de circuito y metodo para medir inestabilidad de reloj. |
Country Status (14)
| Country | Link |
|---|---|
| US (1) | US7816960B2 (es) |
| EP (1) | EP2026469B1 (es) |
| JP (1) | JP5318870B2 (es) |
| KR (1) | KR101200233B1 (es) |
| CN (1) | CN101779376B (es) |
| AT (1) | ATE506754T1 (es) |
| BR (1) | BRPI0815032A2 (es) |
| CA (1) | CA2695373C (es) |
| DE (1) | DE602008006312D1 (es) |
| ES (1) | ES2365438T3 (es) |
| MX (1) | MX2010001526A (es) |
| RU (1) | RU2451391C2 (es) |
| TW (1) | TWI366343B (es) |
| WO (1) | WO2009021186A1 (es) |
Families Citing this family (29)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8736323B2 (en) * | 2007-01-11 | 2014-05-27 | International Business Machines Corporation | Method and apparatus for on-chip phase error measurement to determine jitter in phase-locked loops |
| CN102047133A (zh) * | 2008-05-29 | 2011-05-04 | Nxp股份有限公司 | 用于周期抖动测量的延迟锁定环 |
| US7928773B2 (en) * | 2008-07-09 | 2011-04-19 | Integrated Device Technology, Inc | Multiple frequency synchronized phase clock generator |
| US20130099835A1 (en) * | 2011-10-25 | 2013-04-25 | You-Wen Chang | Calibration apparatus for performing phase detection/edge distance detection upon signals and related calibration method thereof |
| US9000807B2 (en) * | 2012-07-02 | 2015-04-07 | Microsemi SoC Corporation | On-chip probe circuit for detecting faults in an FPGA |
| US8866511B2 (en) * | 2012-11-20 | 2014-10-21 | Nvidia Corporation | Matrix phase detector |
| US9110134B2 (en) * | 2012-12-27 | 2015-08-18 | Intel Corporation | Input/output delay testing for devices utilizing on-chip delay generation |
| US8887120B1 (en) * | 2013-12-27 | 2014-11-11 | Freescale Semiconductor, Inc. | Timing path slack monitoring system |
| CN103902484B (zh) * | 2014-03-04 | 2017-11-21 | 深圳博用科技有限公司 | 一种芯片升级的自适应方法 |
| US9606182B2 (en) | 2014-06-16 | 2017-03-28 | Samsung Electronics Co., Ltd. | System on chip |
| US9490808B2 (en) * | 2014-12-01 | 2016-11-08 | Mediatek Inc. | Sensing circuit |
| JP6227196B2 (ja) * | 2015-05-27 | 2017-11-08 | 三菱電機株式会社 | クロック診断装置及びクロック診断方法 |
| US9645602B2 (en) * | 2015-09-23 | 2017-05-09 | Qualcomm Incorporated | Frequency sensor for side-channel attack |
| TWI585427B (zh) * | 2016-05-24 | 2017-06-01 | 國立中央大學 | 延遲量測電路及其量測方法 |
| KR102546302B1 (ko) * | 2016-07-08 | 2023-06-21 | 삼성전자주식회사 | 클락 지터 측정 회로 및 이를 포함하는 반도체 장치 |
| US10145892B2 (en) | 2016-08-22 | 2018-12-04 | International Business Machines Corporation | Increasing the resolution of on-chip measurement circuits |
| CN106452693B (zh) * | 2016-08-26 | 2019-04-30 | 西安空间无线电技术研究所 | 一种基于双频点噪底能量分析的时钟相位抖动测量方法 |
| TWI637185B (zh) * | 2017-01-03 | 2018-10-01 | 奇景光電股份有限公司 | 時脈抖動的內建自我測試電路 |
| US20180205383A1 (en) * | 2017-01-19 | 2018-07-19 | Qualcomm Incorporated | Digital Clock Generation and Variation Control Circuitry |
| US9893878B1 (en) * | 2017-03-15 | 2018-02-13 | Oracle International Corporation | On-chip jitter measurement for clock circuits |
| WO2019000373A1 (zh) * | 2017-06-30 | 2019-01-03 | 深圳市大疆创新科技有限公司 | 用于测量时间的电路、方法及相关芯片、系统和设备 |
| KR102410014B1 (ko) * | 2017-08-03 | 2022-06-21 | 삼성전자주식회사 | 클락 지터 측정 회로 및 이를 포함하는 반도체 장치 |
| CN108023576B (zh) * | 2017-12-25 | 2021-02-02 | 北京无线电计量测试研究所 | 一种用于快沿脉冲发生器上升时间校准的方法 |
| CN109062538B (zh) * | 2018-07-10 | 2020-11-20 | 豪威科技(上海)有限公司 | 环形先进先出缓冲器及数据传输接口、系统、方法 |
| WO2020061080A1 (en) * | 2018-09-18 | 2020-03-26 | Texas Instruments Incorporated | Methods and apparatus to improve power converter on-time generation |
| US11879936B1 (en) * | 2022-07-01 | 2024-01-23 | Ampere Computing Llc | On-die clock period jitter and duty cycle analyzer |
| CN115204083B (zh) * | 2022-09-13 | 2023-02-28 | 摩尔线程智能科技(北京)有限责任公司 | 芯片静态时序分析方法、装置、电子设备及存储介质 |
| US20240112720A1 (en) * | 2022-09-30 | 2024-04-04 | Advanced Micro Devices, Inc. | Unmatched clock for command-address and data |
| CN120722174B (zh) * | 2025-08-29 | 2025-11-14 | 瀚博半导体(上海)股份有限公司 | 数字时钟抖动测量电路及测量方法 |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| US4637018A (en) * | 1984-08-29 | 1987-01-13 | Burroughs Corporation | Automatic signal delay adjustment method |
| RU2065253C1 (ru) * | 1994-03-17 | 1996-08-10 | Георгий Иванович Тузов | Способ поиска сигнала и начальной синхронизации каналов в системе спутниковой связи и устройство для его осуществления |
| RU2101864C1 (ru) * | 1994-08-09 | 1998-01-10 | Научно-производственное предприятие "Дальняя связь" | Способ измерения фазового дрожания |
| US5805003A (en) * | 1995-11-02 | 1998-09-08 | Cypress Semiconductor Corp. | Clock frequency synthesis using delay-locked loop |
| IT1284718B1 (it) * | 1996-07-31 | 1998-05-21 | Cselt Centro Studi Lab Telecom | Dispositivo e procedimento per allineare temporalmente segnali numerici, ad esempio un segnale di orologio ed un flusso di dati. |
| US5818890A (en) * | 1996-09-24 | 1998-10-06 | Motorola, Inc. | Method for synchronizing signals and structures therefor |
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| DE19933117B4 (de) * | 1999-07-19 | 2011-07-28 | Continental Automotive GmbH, 30165 | Verfahren zur Modulation eines Grundtaktes für digitale Schaltungen und Modulator zur Ausführung des Verfahrens |
| JP2001094417A (ja) * | 1999-09-24 | 2001-04-06 | Toshiba Microelectronics Corp | デジタル方式pll回路 |
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| US6518805B2 (en) * | 2000-10-04 | 2003-02-11 | Broadcom Corporation | Programmable divider with built-in programmable delay chain for high-speed/low power application |
| JP3575430B2 (ja) * | 2001-02-01 | 2004-10-13 | 日本電気株式会社 | 2段階可変長遅延回路 |
| US7042971B1 (en) * | 2001-06-12 | 2006-05-09 | Lsi Logic Corporation | Delay-locked loop with built-in self-test of phase margin |
| US7072433B2 (en) * | 2001-07-11 | 2006-07-04 | Micron Technology, Inc. | Delay locked loop fine tune |
| JP4871462B2 (ja) * | 2001-09-19 | 2012-02-08 | エルピーダメモリ株式会社 | 補間回路とdll回路及び半導体集積回路 |
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| US7162000B2 (en) * | 2002-01-16 | 2007-01-09 | Motorola, Inc. | Delay locked loop synthesizer with multiple outputs and digital modulation |
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| KR20050076202A (ko) * | 2004-01-20 | 2005-07-26 | 삼성전자주식회사 | 지연 신호 발생 회로 및 이를 포함한 메모리 시스템 |
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| CN100412749C (zh) * | 2004-10-21 | 2008-08-20 | 威盛电子股份有限公司 | 存储器信号定时调校方法与相关装置 |
| DE102005007652A1 (de) * | 2005-02-19 | 2006-08-24 | Infineon Technologies Ag | DLL-Schaltung zum Bereitstellen eines Ausgangssignals mit einer gewünschten Phasenverschiebung |
| DE102005008151B4 (de) * | 2005-02-23 | 2008-02-28 | Infineon Technologies Ag | DLL-Schaltkreis zum Bereitstellen einer einstellbaren Phasenbeziehung zu einem periodischen Eingangssignal |
-
2007
- 2007-08-09 US US11/836,220 patent/US7816960B2/en active Active
-
2008
- 2008-03-19 EP EP08005117A patent/EP2026469B1/en not_active Not-in-force
- 2008-03-19 DE DE602008006312T patent/DE602008006312D1/de active Active
- 2008-03-19 AT AT08005117T patent/ATE506754T1/de not_active IP Right Cessation
- 2008-03-19 ES ES08005117T patent/ES2365438T3/es active Active
- 2008-08-08 WO PCT/US2008/072629 patent/WO2009021186A1/en not_active Ceased
- 2008-08-08 CN CN200880102622.8A patent/CN101779376B/zh not_active Expired - Fee Related
- 2008-08-08 RU RU2010108218/08A patent/RU2451391C2/ru active
- 2008-08-08 JP JP2010520324A patent/JP5318870B2/ja not_active Expired - Fee Related
- 2008-08-08 MX MX2010001526A patent/MX2010001526A/es active IP Right Grant
- 2008-08-08 KR KR1020107005206A patent/KR101200233B1/ko not_active Expired - Fee Related
- 2008-08-08 CA CA2695373A patent/CA2695373C/en active Active
- 2008-08-08 BR BRPI0815032-0A2A patent/BRPI0815032A2/pt not_active IP Right Cessation
- 2008-08-11 TW TW097130605A patent/TWI366343B/zh active
Also Published As
| Publication number | Publication date |
|---|---|
| RU2010108218A (ru) | 2011-10-27 |
| JP5318870B2 (ja) | 2013-10-16 |
| ES2365438T3 (es) | 2011-10-05 |
| RU2451391C2 (ru) | 2012-05-20 |
| CA2695373A1 (en) | 2009-02-12 |
| EP2026469A1 (en) | 2009-02-18 |
| TW200919968A (en) | 2009-05-01 |
| KR101200233B1 (ko) | 2012-11-09 |
| JP2010536267A (ja) | 2010-11-25 |
| US20090039867A1 (en) | 2009-02-12 |
| BRPI0815032A2 (pt) | 2015-03-10 |
| US7816960B2 (en) | 2010-10-19 |
| ATE506754T1 (de) | 2011-05-15 |
| TWI366343B (en) | 2012-06-11 |
| CA2695373C (en) | 2013-07-23 |
| DE602008006312D1 (de) | 2011-06-01 |
| WO2009021186A1 (en) | 2009-02-12 |
| EP2026469B1 (en) | 2011-04-20 |
| CN101779376B (zh) | 2013-11-06 |
| KR20100053632A (ko) | 2010-05-20 |
| CN101779376A (zh) | 2010-07-14 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| FG | Grant or registration |