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WO2008149973A1 - 試験装置およびキャリブレーション用デバイス - Google Patents

試験装置およびキャリブレーション用デバイス Download PDF

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Publication number
WO2008149973A1
WO2008149973A1 PCT/JP2008/060439 JP2008060439W WO2008149973A1 WO 2008149973 A1 WO2008149973 A1 WO 2008149973A1 JP 2008060439 W JP2008060439 W JP 2008060439W WO 2008149973 A1 WO2008149973 A1 WO 2008149973A1
Authority
WO
WIPO (PCT)
Prior art keywords
comparator
skew
sampling
signal
unit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/JP2008/060439
Other languages
English (en)
French (fr)
Inventor
Masahiro Ishida
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Advantest Corp
Original Assignee
Advantest Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advantest Corp filed Critical Advantest Corp
Priority to JP2009517907A priority Critical patent/JPWO2008149973A1/ja
Publication of WO2008149973A1 publication Critical patent/WO2008149973A1/ja
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/319—Tester hardware, i.e. output processing circuits
    • G01R31/3193—Tester hardware, i.e. output processing circuits with comparison between actual response and known fault free response
    • G01R31/31937—Timing aspects, e.g. measuring propagation delay
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/31708—Analysis of signal quality
    • G01R31/31709—Jitter measurements; Jitter generators
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/319—Tester hardware, i.e. output processing circuits
    • G01R31/31903—Tester hardware, i.e. output processing circuits tester configuration
    • G01R31/31908—Tester set-up, e.g. configuring the tester to the device under test [DUT], down loading test patterns
    • G01R31/3191—Calibration

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Tests Of Electronic Circuits (AREA)

Abstract

　被試験デバイスが出力する被測定信号を、与えられるサンプリングクロックのタイミングで測定する第１のコンパレータ及び第２のコンパレータと、第１及び第２のコンパレータにおける測定結果に基づいて、被試験デバイスの良否を判定する判定部と、第１及び第２のコンパレータに、予めジッタを印加した調整信号を入力させて、それぞれサンプリングさせる制御部と、第１のコンパレータにおけるサンプリング結果と、第２のコンパレータにおけるサンプリング結果とに基づいて、第１及び第２のコンパレータ間のスキューを算出するスキュー算出部と、スキュー算出部が算出したスキューに基づいて、第１及び第２のコンパレータの少なくともいずれかにおける、被測定信号又はサンプリングクロックの少なくともいずれかの位相を調整する位相調整部とを有する試験装置を提供する。
PCT/JP2008/060439 2007-06-07 2008-06-06 試験装置およびキャリブレーション用デバイス Ceased WO2008149973A1 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2009517907A JPWO2008149973A1 (ja) 2007-06-07 2008-06-06 試験装置およびキャリブレーション用デバイス

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US11/759,235 2007-06-07
US11/759,235 US7797121B2 (en) 2007-06-07 2007-06-07 Test apparatus, and device for calibration

Publications (1)

Publication Number Publication Date
WO2008149973A1 true WO2008149973A1 (ja) 2008-12-11

Family

ID=40093777

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2008/060439 Ceased WO2008149973A1 (ja) 2007-06-07 2008-06-06 試験装置およびキャリブレーション用デバイス

Country Status (4)

Country Link
US (1) US7797121B2 (ja)
JP (1) JPWO2008149973A1 (ja)
TW (1) TWI371593B (ja)
WO (1) WO2008149973A1 (ja)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012052913A (ja) * 2010-09-01 2012-03-15 Advantest Corp 試験装置および信号発生装置
US11005463B2 (en) 2019-06-28 2021-05-11 Advantest Corporation Signal processor and signal processing method

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US8564311B2 (en) * 2010-07-01 2013-10-22 Stmicroelectronics Asia Pacific Pte Ltd. Sensing phase sequence to suppress single tone noise
US9117509B2 (en) * 2012-02-03 2015-08-25 Mediatek Inc. Electronic apparatus, DRAM controller, and DRAM
US9337993B1 (en) 2013-12-27 2016-05-10 Clariphy Communications, Inc. Timing recovery in a high speed link
WO2015113607A1 (en) * 2014-01-30 2015-08-06 Advantest Corporation Test apparatus and method for testing a device under test
JP2015169524A (ja) 2014-03-06 2015-09-28 株式会社アドバンテスト 試験装置、キャリブレーションデバイス、キャリブレーション方法、および試験方法
US9590774B1 (en) * 2015-09-25 2017-03-07 Microsoft Technology Licensing, Llc Circuit for introducing signal jitter
CN116613084B (zh) * 2023-07-17 2024-02-23 深圳市思远半导体有限公司 芯片、测试机台、芯片内部比较器的校准方法及相关设备

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JP2001289892A (ja) * 2000-01-31 2001-10-19 Advantest Corp ジッタ測定装置及びその方法
WO2003036313A1 (en) * 2001-10-25 2003-05-01 Advantest Corporation Clock/skew measurement apparatus and clock/skew measurement method
JP2003344507A (ja) * 2002-05-30 2003-12-03 Elpida Memory Inc 半導体装置の試験方法及び試験装置
WO2003104826A1 (ja) * 2002-06-10 2003-12-18 株式会社アドバンテスト 半導体試験装置
JP2004157133A (ja) * 2001-06-07 2004-06-03 Advantest Corp 半導体試験装置のキャリブレーション方法
WO2005074304A1 (en) * 2004-01-23 2005-08-11 Sunrise Telecom Incorporated Method and apparatus for measuring jitter
WO2005098868A1 (ja) * 2004-04-05 2005-10-20 Advantest Corporation 試験装置、位相調整方法、及びメモリコントローラ
WO2007018020A1 (ja) * 2005-08-09 2007-02-15 Advantest Corporation 半導体試験装置

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US6820234B2 (en) * 1998-06-29 2004-11-16 Acuid Limited Skew calibration means and a method of skew calibration
SE513507C2 (sv) * 1998-09-11 2000-09-25 Switchcore Ab Anordning och metod för att synkronisera data till en lokal klocka
US6324485B1 (en) * 1999-01-26 2001-11-27 Newmillennia Solutions, Inc. Application specific automated test equipment system for testing integrated circuit devices in a native environment
US6460001B1 (en) * 2000-03-29 2002-10-01 Advantest Corporation Apparatus for and method of measuring a peak jitter
US7127018B2 (en) * 2001-03-20 2006-10-24 Advantest Corporation Apparatus for and method of measuring clock skew
WO2003062843A1 (en) * 2002-01-18 2003-07-31 Advantest Corporation Tester
EP1464970A1 (en) * 2003-04-04 2004-10-06 Agilent Technologies Inc Loop-back testing with delay elements
JP4729251B2 (ja) * 2003-11-28 2011-07-20 株式会社アドバンテスト 高周波遅延回路、及び試験装置
US7317309B2 (en) * 2004-06-07 2008-01-08 Advantest Corporation Wideband signal analyzing apparatus, wideband period jitter analyzing apparatus, and wideband skew analyzing apparatus
US20060087346A1 (en) * 2004-10-22 2006-04-27 Advantest Corporation Phase difference detecting apparatus
US7313496B2 (en) * 2005-02-11 2007-12-25 Advantest Corporation Test apparatus and test method for testing a device under test
DE602005002931T2 (de) * 2005-04-22 2008-06-12 Verigy (Singapore) Pte. Ltd. Prüfung eines Testobjekts mit Abtastung vom Taktsignal und vom Datensignal
US7421355B2 (en) * 2006-02-27 2008-09-02 Advantest Corporation Measuring apparatus, measuring method, testing apparatus, testing method, and electronic device
US7856330B2 (en) * 2006-02-27 2010-12-21 Advantest Corporation Measuring apparatus, testing apparatus, and electronic device
US7394277B2 (en) * 2006-04-20 2008-07-01 Advantest Corporation Testing apparatus, testing method, jitter filtering circuit, and jitter filtering method
JP2010518760A (ja) * 2007-02-09 2010-05-27 ディー・エフ・ティー・マイクロシステムズ・インコーポレーテッド ハイスピード・シリアル・リンクのミッション環境における、該ハイスピード・シリアル・リンクの物理層テスティングのためのシステム及び方法

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001289892A (ja) * 2000-01-31 2001-10-19 Advantest Corp ジッタ測定装置及びその方法
JP2004157133A (ja) * 2001-06-07 2004-06-03 Advantest Corp 半導体試験装置のキャリブレーション方法
WO2003036313A1 (en) * 2001-10-25 2003-05-01 Advantest Corporation Clock/skew measurement apparatus and clock/skew measurement method
JP2003344507A (ja) * 2002-05-30 2003-12-03 Elpida Memory Inc 半導体装置の試験方法及び試験装置
WO2003104826A1 (ja) * 2002-06-10 2003-12-18 株式会社アドバンテスト 半導体試験装置
WO2005074304A1 (en) * 2004-01-23 2005-08-11 Sunrise Telecom Incorporated Method and apparatus for measuring jitter
WO2005098868A1 (ja) * 2004-04-05 2005-10-20 Advantest Corporation 試験装置、位相調整方法、及びメモリコントローラ
WO2007018020A1 (ja) * 2005-08-09 2007-02-15 Advantest Corporation 半導体試験装置

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012052913A (ja) * 2010-09-01 2012-03-15 Advantest Corp 試験装置および信号発生装置
US11005463B2 (en) 2019-06-28 2021-05-11 Advantest Corporation Signal processor and signal processing method

Also Published As

Publication number Publication date
TWI371593B (en) 2012-09-01
US7797121B2 (en) 2010-09-14
JPWO2008149973A1 (ja) 2010-08-26
TW200907384A (en) 2009-02-16
US20080304608A1 (en) 2008-12-11

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