Projects with this topic
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Using Yosys to synthesize a bitstream for a Lattice MachXO3 board
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I'm currently working on a hobby project that I will call "vISA", which stands for "Variable Instruction Set Architecture."
Because GitLab's Project Description is very limited, just read the README.md instead.
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Collection of utility modules written in Verilog
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The soft core for the Ice Sea VR headset. Designed to be run on the FPGA of the headset mainboard
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Implementation of a freespace optics bridge.
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Trusted Execution Environments On-Demand (TEEOD) is a novel Trusted Execution Environment (TEE) approach that leverages the reconfigurable logic of FPGAs to provide enhanced security for security-critical applications. Unlike traditional TEE implementations that rely on hardware extensions or dedicated security elements, TEEOD offers a more flexible and secure solution by dynamically creating and managing enclaves on-demand. Each enclave can be customized and includes a dedicated soft-core microcontroller (MCU), private memory, security services, and means to communicate with the regular execution environment (REE).
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Open source Logic Analyzer based on LiteX SoC
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Implementation of Intel8080 cpu written in verilog running spaceinvaders.
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Final project for the MSc course of Laboratory of Advanced Electronics held in 2021 by Prof. Leonardo Ricci at the University of Trento.
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Set of simple modules to communicate via UART
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Set of simple modules to communicate via SPI protocol.
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