F

FPGA

Implementation of a freespace optics bridge.

Automate building the tools from Project IceStorm

A stack-based 16-bit CPU written in VHDL (with pt-br docs)

Wrapper for FPGA toolchain tools

Acoustic levitation on SoC FPGA (DE0-Nano-SoC)

https://youtu.be/p1Vm4cL4aUA

A simple COMmunication BLOCK with well know interfaces in the FPGA side

An Demonstration of FPGA Assisted Software Tracing for ARM CoreSight On Xilinx Zynq-7000 SoC

Our bachelor's thesis. A Security token system for Linux PAM using an FPGA. Either utilizing 72-bit or 512-bit RSA cryptography when using Version A and B respectively. Version B is utilizing USB UART communication, while version A is air-gapped.

Lauterbach's JSwitch VHDL IP

Source/Version control task for Lab 3

A Python package to use FPGA development tools programmatically. It is a mirror of https://github.com/PyFPGA/pyfpga, where the development is done. Documentation: https://pyfpga.github.io/pyfpga

A Docker image with the ModelSim HDL simulator

This project is about building Hack on real hardware as proposed in Chapter 13 of the course nand2tetris using only FOSS, free and open source hard- and software.

Relevamiento de grupos de desarrollo, capacidades y casos de uso de la tecnología FPGA en Argentina. https://rodrigomelo9.gitlab.io/fpgargentina/

LaTeX documentation of JSwitch IP

Newest version of microprocessor design for Artix-7 100 Digilent Arty board. Includes the migrated Python assembler code as well, and a assembly-language implementation of Conway's Game of Life coded for this design.

A VHDL synthesizable and behavioral FIFO design.

This project is about building Hack on real hardware as proposed in chapter 13 of the course nand2tetris using only FOSS, free and open source hard- and software.