F

FPGA

Acoustic levitation on SoC FPGA (DE0-Nano-SoC)

https://youtu.be/p1Vm4cL4aUA

Newest version of microprocessor design for Artix-7 100 Digilent Arty board. Includes the migrated Python assembler code as well, and a assembly-language implementation of Conway's Game of Life coded for this design.

Custom AXI GPIO core with up to 32 input and 32 output ports

Collection of some simple AXI4-Lite slaves.

AXIoE is a packet format and network protocol for executing ARM(R) AMBA(R) 4 AXI standard bus style memory transactions on a remote device connected through an Ethernet network.

BProC (Basic Processor Compiler) is a small customizable instruction set compiler for basic processor design, intended for educational purposes.

CASP is developed to assist students, engineers and makers in designing, developing and validating real time embedded system software quickly with little programming effort.

CMake scripts for building FPGA/ASIC projects.

CORDIC block meant for FPGA implementation

A simple COMmunication BLOCK with well know interfaces in the FPGA side

Simple SDRAM test for Cyclone FPGA in VHDL

Hardware integer divider module

A Docker image with the ModelSim HDL simulator

Various FPGA DSP-based arithmetic units such as adders, multipliers, etc on 24/32/64-bits using the DSP48E2 FPGA primitve

A synchronous protocol for accessing an asynchronous digital Design-Under-Test (JTAG sans the hassles)