WO2012117959A1 - Semiconductor element and display panel - Google Patents

Abstract

Provided is a semiconductor element capable of suppressing reduction in connection reliability while suppressing increase in size. This semiconductor element (10) comprises: long-side electrode strings (21 and 22) each arranged along long sides (11a and 11b); a short-side electrode string (23) arranged along a short side (11c); and a plurality of sub-electrodes (17) arranged along the short-side electrode string and positioned further on the outside than the short-side electrode string. The sub-electrodes are electrically connected to a bump electrode (16) in the short-side electrode string or are formed by a dummy electrode.

Description

Semiconductor element and display panel

The present invention relates to a semiconductor element and a display panel, and more particularly to a semiconductor element and a display panel provided with a plurality of electrodes arranged in a row.

Conventionally, display panels are used in various devices. The display panel includes a panel that displays an image and a driver (semiconductor element) that is mounted on the panel and drives the panel. Note that in this specification, a semiconductor element refers to a semiconductor substrate in which wirings, circuit elements, electrodes, and the like are formed. A semiconductor element (driver) mounted on a panel is usually provided with electrodes arranged along two sides (two long sides) or four sides (two long sides and two short sides). FIG. 11 is a cross-sectional view illustrating a structure of a display panel including a semiconductor element according to a conventional example. FIG. 12 is a plan view showing the structure of the semiconductor element of FIG.

As shown in FIG. 11, a display panel 101 according to a conventional example includes a semiconductor element 110 and a panel (element mounting member) 120 made of a transparent substrate on which the semiconductor element 110 is mounted. As shown in FIG. 12, the semiconductor element 110 includes a rectangular main surface 111 having two long sides 111a and 111b and two short sides 111c and 111d. On the main surface 111, a plurality of bump electrodes 112 and a plurality of bump electrodes 113 are arranged along the long sides 111a and 111b, respectively.

An ACF (anisotropic conductive film) (not shown) containing conductive particles is disposed between the semiconductor element 110 and the panel 120, and the semiconductor element 110 is mounted on the panel 120 by thermocompression bonding. Yes.

However, as shown in FIG. 11, the semiconductor element 110 is warped due to thermal contraction after thermocompression bonding. This warpage becomes the largest at the corner portion (particularly, the short side portion) of the semiconductor element 110, the pressing force against the conductive particles becomes small, and the deformation (compression) rate of the conductive particles becomes insufficient. For this reason, sufficient connection may not be obtained between the semiconductor element 110 and the panel 120.

Incidentally, in recent years, touch panel type liquid crystal modules have been put into practical use. In order to simplify the module structure and prevent noise, a liquid crystal driver integrated with a TP (touch panel) driving circuit in which a liquid crystal driving liquid crystal driver (semiconductor element) incorporates a touch panel driving circuit has been developed. . Here, when a touch panel driving circuit is incorporated in a liquid crystal driver in which liquid crystal driving bump electrodes are arranged along two long sides, touch panel driving bump electrodes are arranged along one short side. There is. That is, in the TP driving circuit integrated liquid crystal driver, the bump electrodes may be arranged along three sides (two long sides and one short side) of the main surface.

If the bump electrodes are arranged along the three sides in this manner, the bump electrodes are not formed on the remaining one side, so that the formation density of the bump electrodes is biased. For this reason, the pressure at the time of thermocompression bonding the semiconductor element to the panel becomes non-uniform, and the pressurization to the conductive particles of the bump electrode in the short side portion tends to be insufficient. As a result, particularly in a semiconductor element in which bump electrodes are formed along three sides, when the semiconductor element is warped due to thermal contraction, the semiconductor element (short-side bump electrode) is sufficient between the panel and the semiconductor element. Connection is difficult to obtain.

Therefore, in order to suppress unevenness in the formation density of the bump electrodes, it is conceivable to provide dummy bump electrodes on one side (short side) where no bump electrodes are formed and to arrange bump electrodes on four sides. With this configuration, it is possible to suppress the unevenness in the formation density of the bump electrodes, and to some extent prevent the connection reliability between the semiconductor element and the panel from being lowered.

Note that a semiconductor element in which dummy bump electrodes are provided in order to suppress unevenness in the formation density of bump electrodes and bump electrodes are arranged on four sides is disclosed in Patent Document 1, for example.

JP-A-9-68715

However, when a bump electrode is newly provided on one side where the bump electrode is not formed, a region for providing the bump electrode is required, which causes a problem that the semiconductor element is increased in size.

The present invention has been made to solve the above-described problems, and an object of the present invention is to provide a semiconductor capable of suppressing a decrease in connection reliability while suppressing an increase in size. An element and a display panel are provided.

In order to achieve the above object, a semiconductor device of the present invention includes a rectangular main surface having two long sides and two short sides, and a plurality of functional electrodes arranged along the two long sides. Two long side electrode rows and a short side electrode row arranged along one of the two short sides, including a plurality of functional electrodes, and arranged outside the short side electrode row, the short side A plurality of sub-electrodes arranged along at least a part of the side electrode row, and the sub-electrode is electrically connected to the functional electrode of the short-side side electrode row or formed by a dummy electrode.

In this semiconductor element, by arranging a plurality of sub-electrodes along the short-side electrode row, adhesion between the electrodes (functional electrode and sub-electrode) around the short-side electrode row and the electrode of the element mounting member is performed. Increases area.

Further, by arranging a plurality of sub-electrodes outside the short-side electrode row, the sub-electrodes can be placed in a space between the short-side electrode row and the short side.

In the semiconductor element, preferably, the plurality of sub-electrodes are arranged along at least the end of the short side electrode array. If comprised in this way, the adhesion area between the electrode (functional electrode and sub electrode) and the electrode of an element mounting member in the at least edge part periphery of a short side electrode row | line will become large.

In the semiconductor element, preferably, the sub-electrode has a smaller area than the functional electrode of the short side electrode array.

In the semiconductor element in which the sub electrode has a smaller area than the functional electrode of the short side electrode row, the width of the sub electrode in the arrangement direction is preferably smaller than the width of the functional electrode in the short side electrode row . If comprised in this way, it can suppress that the distance between sub-electrodes becomes small.

In the semiconductor element in which the sub electrode has a smaller area than the functional electrode of the short side electrode row, preferably the length in the direction intersecting the arrangement direction of the sub electrode is the arrangement direction of the functional electrode of the short side electrode row It is smaller than the length in the direction intersecting with. If comprised in this way, a sub electrode can be easily arrange | positioned in the space between a short side electrode row | line | column and a short side.

In the semiconductor element, preferably, the sub electrode is electrically connected to the functional electrode of the short side electrode array.

In the semiconductor element, preferably, the functional electrode and the sub electrode include a bump electrode protruding from the main surface.

In the semiconductor element, preferably, the functional electrode and the sub electrode are connected to the element mounting member via an anisotropic conductive layer.

The display panel of the present invention includes the semiconductor element having the above-described configuration.

As described above, according to the present invention, by arranging a plurality of sub-electrodes along the short-side electrode row, the electrodes (functional electrodes and sub-electrodes) around the short-side electrode row and the element mounting member are arranged. The adhesion area between the electrodes increases. Thereby, since the adhesive strength between the electrode in the periphery of the short side electrode array and the electrode of the element mounting member can be increased, the connection reliability between the semiconductor element and the element mounting member is reduced. Can be suppressed.

Further, by arranging the sub-electrodes outside the short-side electrode row (a plurality of functional electrodes), a gap can be formed between the functional electrode and the sub-electrode in the short-side electrode row. Thereby, when peeling and a crack arise in the connection part of a subelectrode, it can suppress that the peeling and a crack are transmitted to the functional electrode of a short side electrode row | line | column. For this reason, it is possible to suppress the deterioration of the connection of the functional electrodes by arranging the sub-electrodes outside the functional electrodes rather than simply increasing the functional electrodes of the short side electrode array. In addition, since the resin exists between the functional electrode and the sub electrode, the anchor effect works and the adhesion of the connection portion at each electrode is improved, and a decrease in reliability can be suppressed.

Further, by arranging a plurality of sub-electrodes outside the short-side electrode row, the sub-electrodes can be placed in a space between the short-side electrode row and the short side. Thereby, it can suppress that a semiconductor element enlarges.

1 is a side view illustrating a structure of a liquid crystal display panel including a semiconductor device according to a first embodiment of the present invention. It is the top view which showed the structure of the semiconductor element of FIG. FIG. 2 is an enlarged plan view showing the structure of the semiconductor element of FIG. 1. FIG. 2 is an enlarged plan view showing a structure around a sub-electrode of the semiconductor element of FIG. 1. It is the top view which showed the structure of AM board | substrate of FIG. It is a figure for demonstrating the effect of the semiconductor element by 1st Embodiment. FIG. 6 is an enlarged plan view illustrating a structure of a semiconductor device according to a second embodiment of the present invention. FIG. 8 is an enlarged plan view showing a structure around a sub-electrode in FIG. 7. FIG. 5 is an enlarged plan view illustrating a structure of a semiconductor device according to a third embodiment of the present invention. It is the enlarged plan view which showed the structure of the sub-electrode periphery of the semiconductor element by the modification of this invention. It is sectional drawing which showed the structure of the display panel provided with the semiconductor element by a conventional example. It is the top view which showed the structure of the semiconductor element of FIG.

Hereinafter, embodiments of the present invention will be described with reference to the drawings.

(First embodiment)
The structure of the liquid crystal display panel 1 including the semiconductor element 10 according to the first embodiment of the present invention will be described with reference to FIGS.

The liquid crystal display panel (display panel) 1 according to the first embodiment of the present invention is used for a liquid crystal display device (not shown). As shown in FIG. 1, the liquid crystal display panel 1 includes a semiconductor element 10 and a panel (element mounting member) 40 on which the semiconductor element 10 is mounted. The panel 40 is configured by combining an AM substrate (active matrix substrate) 41 made of a glass substrate and a counter substrate 42. Further, liquid crystal (not shown) is sealed between the AM substrate 41 and the counter substrate 42. The AM substrate 41 has a larger area than the counter substrate 42, and a part of the AM substrate 41 protrudes from the counter substrate 42. The semiconductor element 10 is mounted on the protruding portion of the AM substrate 41. An ACF (anisotropic conductive film (anisotropic conductive layer)) 70 is disposed between the semiconductor element 10 and the panel 40. The counter substrate 42 functions as a touch panel, and electrodes (not shown) are formed on the main surface 42 a of the counter substrate 42.

The semiconductor element 10 is a TP (touch panel) driving circuit integrated type liquid crystal driver in which a touch panel driving circuit is incorporated in a liquid crystal driving liquid crystal driver. The semiconductor element 10 is formed with wirings, circuit elements, and the like (not shown), and bump electrodes (12 to 16) described later are electrically connected to the circuit elements. Further, as shown in FIG. 2, the semiconductor element 10 includes a rectangular main surface 11 having two long sides 11a and 11b and two short sides 11c and 11d.

On the main surface 11, a plurality of output bump electrodes 12 and a plurality of bump electrodes 13 arranged along (adjacent to) the long side 11a are provided. On the main surface 11, a plurality of input bump electrodes 14 and a plurality of bump electrodes 15 arranged along the long side 11 b are provided. A plurality of bump electrodes 16 arranged along the short side 11 c are provided on the main surface 11. That is, the output bump electrode 12, the bump electrode 13, the input bump electrode 14, and the bump electrodes 15 and 16 are arranged on the peripheral edge of the main surface 11 and arranged along only three sides (11a to 11c). Yes. The output bump electrode 12, the bump electrode 13, the input bump electrode 14, and the bump electrodes 15 and 16 are examples of the “functional electrode” and the “bump electrode” in the present invention.

The output bump electrode 12 and the input bump electrode 14 are electrodes for driving a liquid crystal, and the bump electrodes 13, 15 and 16 are electrodes for driving a touch panel.

The bump electrodes (12 to 16) are formed so as to protrude from the main surface 11. The bump electrodes (12 to 16) are arranged at a narrow pitch, and the distance between the bump electrodes is, for example, about 15 μm.

A plurality of output bump electrodes 12 and a plurality of bump electrodes 13 constitute a long side electrode array 21, and a plurality of input bump electrodes 14 and a plurality of bump electrodes 15 constitute a long side electrode array 22. Yes. In addition, a short side electrode array 23 is constituted by the plurality of bump electrodes 16.

Here, a plurality of sub-electrodes 17 are arranged on the main surface 11 along the short-side electrode array 23 (a plurality of bump electrodes 16). Specifically, the plurality of sub-electrodes 17 are arranged in a space between the short side electrode array 23 and the short side 11c. That is, the plurality of sub-electrodes 17 are arranged outside the short-side electrode row 23. The sub electrode 17 is also formed by a bump electrode protruding from the main surface 11.

Further, the sub electrode 17 is electrically connected to the adjacent bump electrode 16. The sub electrode 17 may be a dummy electrode (an electrode that does not contribute to driving the liquid crystal display panel 1).

The sub-electrodes 17 are arranged at the same pitch as the bump electrodes 16 as shown in FIG. The sub electrode 17 is formed in the same area (width and length) as the bump electrode 16. Further, the sub-electrode 17 is disposed closer to the side than the long-side electrode rows 21 and 22. That is, the distance D1 between the sub electrode 17 and the short side 11c is the distance D2 between the long side electrode row 21 and the long side 11a and between the long side electrode row 22 and the long side 11b. It is smaller than the distance D3.

In addition, as shown in FIG. 4, the distance D4 between the sub electrode 17 and the bump electrode 16 is smaller than the distance D5 between the bump electrodes 16.

Further, as shown in FIG. 2, the semiconductor element 10 is provided with a circuit formation region 10a. The circuit forming region 10a is provided at a predetermined distance from the bump electrodes (12 to 16) and the sides (11a to 11d) of the main surface 11.

The AM substrate 41 of the panel 40 is provided with a plurality of pad electrodes corresponding to the electrodes of the semiconductor element 10 as shown in FIG. Specifically, the AM substrate 41 has pad electrodes 51, 52, 53, 54 at positions corresponding to the output bump electrode 12, the bump electrode 13, the input bump electrode 14, the bump electrodes 15, 16 and the sub electrode 17, respectively. , 55 and 56 are provided. The pad electrode 51 is formed with the same pitch, the same width, and the same area as the output bump electrode 12, for example. The same applies to the pad electrodes 52 to 56. Since the semiconductor element 10 is mounted face-down on the AM substrate 41, the pad electrodes 51 to 56 are formed at positions where the electrodes (12 to 17) of the semiconductor element 10 are inverted.

Further, lead wires are connected to the pad electrodes 52, 54 and 55, and electrodes (not shown) are connected to the lead wires. This electrode (not shown) is connected to the electrode on the main surface 42a of the counter substrate 42 through an FPC (Flexible Printed Circuit) or the like.

When the semiconductor element 10 is mounted on the AM substrate 41 (panel 40), the ACF 70 is sandwiched between the semiconductor element 10 and the AM substrate 41 and thermocompression bonded. At this time, a part of the conductive particles contained in the ACF 70 is pushed out by passing between the bump electrodes (12 to 16) and between the sub-electrodes 17 by being pressed by the semiconductor element 10. .

In the present embodiment, as described above, the plurality of sub-electrodes 17 are arranged along the short side electrode array 23. As a result, the adhesion area between the electrodes (bump electrode 16 and sub-electrode 17) and the electrodes (pad electrodes 55 and 56) on the periphery of the short-side electrode array 23 can be increased and the adhesion strength can be increased. Can be bigger. As a result, it is possible to suppress a decrease in connection reliability between the semiconductor element 10 and the panel 40.

Further, by disposing the sub electrode 17 outside the short side electrode array 23, the sub electrode 17 can be disposed in the space between the short side electrode array 23 and the short side 11c. Thereby, it can suppress that the semiconductor element 10 enlarges. Specifically, as shown in FIG. 6, the short side 11c side of the semiconductor element 10 may be increased by a distance D10 as compared with the case where the sub electrode 17 is not provided on the short side 11c side. On the other hand, when the sub electrode 17 is arranged on the short side 11d side in order to suppress the uneven formation density of the bump electrodes as in the semiconductor element 210, the short side 11d side of the semiconductor element 210 is a distance larger than the distance D10. It is necessary to increase it by D210. The distance D210 is naturally larger than the length of the sub-electrode 17 (the length in the direction intersecting the arrangement direction).

Further, by disposing the sub electrode 17 outside the short side electrode row 23, the connection between the bump electrode 16 and the panel 40 is reduced before the connection between the sub electrode 17 and the panel 40 is deteriorated. Deterioration can be suppressed. If the connection between the bump electrode 16 and the panel 40 does not deteriorate, there is no problem even if the connection between the sub electrode 17 and the panel 40 deteriorates. Therefore, a part of the sub electrode 17 may be missing, for example, so that the sub electrode 17 can be brought closer to the short side 11c. As a result, an increase in size of the semiconductor element 10 can be further suppressed.

Further, by disposing the sub electrode 17 outside the bump electrode 16, a gap can be formed between the bump electrode 16 and the sub electrode 17. Thereby, when peeling or a crack arises in the connection part of the sub electrode 17, it can suppress that the peeling or crack is transmitted to the connection part of the bump electrode 16. FIG. For this reason, it is possible to suppress the deterioration of the connection of the bump electrode 16 if the sub electrode 17 is arranged outside the bump electrode 16 rather than simply increasing the bump electrode 16. In addition, since the resin (ACF70) exists between the bump electrode 16 and the sub electrode 17, the anchor effect works and the adhesion of the connection portion at each electrode is improved, and a decrease in reliability can be suppressed. .

Further, the connection between the semiconductor element 10 and the panel 40 tends to deteriorate particularly from the corner portion of the semiconductor element 10 (the end portion of the short side electrode array 23). For this reason, by arranging the sub-electrodes 17 along at least the end portions of the short-side electrode row 23, it is possible to suppress deterioration in connection at the end portions of the short-side electrode row 23, which is effective.

Further, the sub electrode 17 is electrically connected to the bump electrode 16. Thereby, even if the connection of one of the sub electrode 17 and the bump electrode 16 to the panel 40 is deteriorated, the liquid crystal display panel 1 is prevented from malfunctioning if the other is electrically connected to the panel 40. Can do.

Note that, even if the sub electrode 17 is electrically connected to the bump electrode 16 or formed by a dummy electrode, the bump electrode 16 and the sub electrode 17 are electrically connected by the conductive particles. As a result, the semiconductor element 10 does not malfunction. For this reason, since the sub electrode 17 can be formed close to the bump electrode 16, it is possible to suppress an increase in the short side 11 c side of the semiconductor element 10.

(Second Embodiment)
In the second embodiment, a case where the sub electrode 17 has an area smaller than that of the bump electrode 16 will be described with reference to FIGS. 7 and 8 unlike the first embodiment.

In the semiconductor device 10 according to the second embodiment of the present invention, the sub electrode 17 has a smaller area than the bump electrode 16 as shown in FIG. Specifically, as shown in FIG. 8, the width W17 in the arrangement direction (A direction) of the sub-electrodes 17 is smaller than the width W16 in the arrangement direction (A direction) of the bump electrodes 16. Further, the length L17 in the direction (B direction) intersecting the arrangement direction of the sub-electrodes 17 is smaller than the length L16 in the direction (B direction) intersecting the arrangement direction of the bump electrodes 16.

The remaining structure of the second embodiment is the same as that of the first embodiment.

In the present embodiment, as described above, by making the width W17 of the sub electrode 17 smaller than the width W16 of the bump electrode 16, it is possible to suppress the distance between the sub electrodes 17 from being reduced. Thereby, when the semiconductor element 10 is thermocompression bonded to the panel 40 via the ACF 70, it is possible to prevent the conductive particles contained in the ACF 70 from easily passing between the sub-electrodes 17. For this reason, it can suppress that the fluidity | liquidity of electroconductive particle falls between the bump electrodes 16 or between the sub electrodes 17, and aggregates. As a result, it is possible to suppress the occurrence of a short circuit between the bump electrodes 16 and between the sub-electrodes 17, thereby further suppressing the connection reliability of the semiconductor element 10 from being lowered. 8 indicates the movement of the conductive particles contained in the ACF 70 during thermocompression bonding.

Further, by making the length L17 of the sub-electrode 17 smaller than the length L16 of the bump electrode 16, in the second embodiment, there is no need to increase the short side 11c side, and the semiconductor is compared with the first embodiment. The element 10 can be reduced in size.

Further, by making the length L17 of the sub electrode 17 smaller than the length L16 of the bump electrode 16, the region through which the conductive particles pass during thermocompression bonding (between the bump electrodes 16 and between the sub electrodes 17). Can be prevented from becoming longer. Thereby, it can suppress more that the fluidity | liquidity of electroconductive particle falls between the bump electrodes 16 or between the sub electrodes 17, and aggregates.

The remaining effects of the second embodiment are similar to those of the aforementioned first embodiment.

(Third embodiment)
In the semiconductor element 10 according to the third embodiment, as shown in FIG. 9, the sub-electrodes 17 are arranged along only the end portions of the short side electrode row 23 (a plurality of bump electrodes 16). Thus, even when the sub-electrodes 17 are arranged only along the end portions of the short side electrode row 23, it is possible to easily suppress the deterioration of the connection at the end portions of the short side electrode row 23. Is possible. The sub electrode 17 may have the same area as the bump electrode 16 as in the first embodiment, or may have a smaller area than the bump electrode 16 as in the second embodiment.

Other structures and effects of the third embodiment are the same as those of the first and second embodiments.

In addition, it should be thought that embodiment disclosed this time is an illustration and restrictive at no points. The scope of the present invention is shown not by the above description of the embodiments but by the scope of claims, and further includes meanings equivalent to the scope of claims and all modifications within the scope.

For example, in the above-described embodiment, an example in which the display panel is applied to a liquid crystal display panel has been described. However, the present invention is not limited to this and may be applied to a display panel other than the liquid crystal display panel.

In the above embodiment, the example in which the semiconductor element is mounted on the panel has been described, but the present invention is not limited to this. You may mount a semiconductor element in element mounting members other than a panel.

In the second embodiment, the example in which the width and the length of the sub electrode are made smaller than the width and the length of the bump electrode is shown, but the present invention is not limited to this. Only one of the width and length of the sub electrode may be smaller than one of the width and length of the bump electrode.

In the above embodiment, the example in which the bump electrodes 16 (the same applies to 12 to 15) are arranged in a line is shown, but the present invention is not limited to this. For example, the present invention is also applicable to the case where the bump electrodes 16 are arranged in two rows as in the semiconductor element according to the modification of the present invention shown in FIG.

In the above embodiment, an example in which the sub electrode 17 has the same area as the bump electrode 16 or a small area has been described. However, the present invention is not limited to this, and the sub electrode 17 has a larger area than the bump electrode 16. May be.

In the above embodiment, an example in which the sub-electrodes are arranged only along the short-side electrode array has been described, but the present invention is not limited to this. That is, a sub-electrode arranged along the short-side electrode row and a sub-electrode arranged along the long-side electrode row may be provided.

In the above-described embodiment, an example in which an ACF is used when a semiconductor element is mounted on a panel has been described. When mounting a semiconductor element on a panel, ACP (anisotropic conductive paste (anisotropic conductive layer)) may be used.

In the above embodiment, an example in which a bump electrode is provided in a semiconductor element and a pad electrode is provided in a panel (element mounting member) has been described. However, the present invention is not limited thereto, and a pad electrode is provided in a semiconductor element. Bump electrodes may be provided on the mounting member. In addition, since it is easier to form the bump electrode on the semiconductor element than to form the pad electrode on the panel, it is preferable to form the bump electrode on the semiconductor element.

1 Liquid crystal display panel (display panel)
DESCRIPTION OF SYMBOLS 10 Semiconductor element 11 Main surface 11a, 11b Long side 11c, 11d Short side 12 Output bump electrode (functional electrode, bump electrode)
13, 15, 16 Bump electrode (functional electrode)
14 Input bump electrode (functional electrode, bump electrode)
17 Sub electrode (dummy electrode, bump electrode)
21, 22 Long side electrode row 23 Short side electrode row 40 Panel (element mounting member)
70 ACF (anisotropic conductive layer)
L16, L17 Length W16, W17 Width

Claims (9)

A rectangular main surface having two long sides and two short sides;
Two long-side electrode arrays that are arranged along the two long sides and include a plurality of functional electrodes;
A short-side electrode array that is arranged along one of the two short sides and includes a plurality of functional electrodes;
A plurality of sub-electrodes arranged outside the short-side electrode row and arranged along at least a part of the short-side electrode row;
With
The sub-electrode is electrically connected to the functional electrode of the short-side electrode array, or formed by a dummy electrode. The semiconductor element according to claim 1, wherein the plurality of sub-electrodes are arranged along at least an end portion of the short-side electrode row. The semiconductor element according to claim 1, wherein the sub-electrode has a smaller area than the functional electrode of the short-side electrode array. 4. The semiconductor element according to claim 3, wherein a width in the arrangement direction of the sub-electrodes is smaller than a width in the arrangement direction of the functional electrodes of the short side electrode array. 5. The semiconductor element according to claim 3, wherein a length in a direction intersecting with the arrangement direction of the sub-electrodes is smaller than a length in a direction intersecting with the arrangement direction of the functional electrodes of the short side electrode array. . 6. The semiconductor element according to claim 1, wherein the sub electrode is electrically connected to a functional electrode of the short side electrode array. 7. The semiconductor element according to claim 1, wherein the functional electrode and the sub electrode include a bump electrode protruding from the main surface. 8. The semiconductor element according to claim 1, wherein the functional electrode and the sub electrode are connected to an element mounting member via an anisotropic conductive layer. A display panel comprising the semiconductor element according to any one of claims 1 to 8.

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