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WO2009069617A1 - データ処理装置、及びデータ処理方法 - Google Patents

データ処理装置、及びデータ処理方法 Download PDF

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Publication number
WO2009069617A1
WO2009069617A1 PCT/JP2008/071384 JP2008071384W WO2009069617A1 WO 2009069617 A1 WO2009069617 A1 WO 2009069617A1 JP 2008071384 W JP2008071384 W JP 2008071384W WO 2009069617 A1 WO2009069617 A1 WO 2009069617A1
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WO
WIPO (PCT)
Prior art keywords
ldpc
parity
data process
code
bit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/JP2008/071384
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English (en)
French (fr)
Inventor
Takashi Yokokawa
Makiko Yamamoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority to AU2008330660A priority Critical patent/AU2008330660B2/en
Priority to NZ585417A priority patent/NZ585417A/xx
Priority to EP14190466.4A priority patent/EP2852064B1/en
Priority to UAA201007579A priority patent/UA101485C2/uk
Priority to EA201070631A priority patent/EA021877B1/ru
Priority to US12/743,720 priority patent/US8489956B2/en
Priority to EP08854728.6A priority patent/EP2237429B1/en
Priority to DK08854728.6T priority patent/DK2237429T3/en
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP2009543804A priority patent/JP5359881B2/ja
Priority to CN200880122984.3A priority patent/CN101911504B/zh
Priority to BRPI0819643-5A priority patent/BRPI0819643A2/pt
Publication of WO2009069617A1 publication Critical patent/WO2009069617A1/ja
Priority to ZA2010/03528A priority patent/ZA201003528B/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1148—Structural properties of the code parity-check or generator matrix
    • H03M13/116—Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices
    • H03M13/1165—QC-LDPC codes as defined for the digital video broadcasting [DVB] specifications, e.g. DVB-Satellite [DVB-S2]
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1105—Decoding
    • H03M13/1131—Scheduling of bit node or check node processing
    • H03M13/1137—Partly parallel processing, i.e. sub-blocks or sub-groups of nodes being processed in parallel
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1148—Structural properties of the code parity-check or generator matrix
    • H03M13/118—Parity check matrix structured for simplifying encoding, e.g. by having a triangular or an approximate triangular structure
    • H03M13/1185—Parity check matrix structured for simplifying encoding, e.g. by having a triangular or an approximate triangular structure wherein the parity-check matrix comprises a part with a double-diagonal
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/25—Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM]
    • H03M13/255—Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM] with Low Density Parity Check [LDPC] codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • H03M13/2703—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques the interleaver involving at least two directions
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • H03M13/2703—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques the interleaver involving at least two directions
    • H03M13/2707—Simple row-column interleaver, i.e. pure block interleaving
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • H03M13/2703—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques the interleaver involving at least two directions
    • H03M13/271—Row-column interleaver with permutations, e.g. block interleaving with inter-row, inter-column, intra-row or intra-column permutations
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/65—Purpose and implementation aspects
    • H03M13/6522—Intended application, e.g. transmission or communication standard
    • H03M13/6552—DVB-T2
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0057—Block codes
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0071—Use of interleaving

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Probability & Statistics with Applications (AREA)
  • Theoretical Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Multimedia (AREA)
  • Error Detection And Correction (AREA)

Abstract

本発明は、バースト誤りや、イレージャ等の、LDPC符号の符号ビットのエラーに対する耐性を向上させることができるデータ処理装置、及びデータ処理方法に関する。 LDPC符号化部２１は、LDPC(Low Density Parity Check)符号のパリティビットに対応する部分であるパリティ行列が階段構造になっている検査行列に従ったLDPC符号化を行うことにより、LDPC符号を出力する。パリティインターリーバ２３は、LDPC符号化部２１が出力するLDPC符号のパリティビットを、他のパリティビットの位置にインターリーブするパリティインターリーブを行う。本発明は、例えば、LDPC符号を送信する送信装置に適用できる。
PCT/JP2008/071384 2007-11-26 2008-11-26 データ処理装置、及びデータ処理方法 Ceased WO2009069617A1 (ja)

Priority Applications (12)

Application Number Priority Date Filing Date Title
EP08854728.6A EP2237429B1 (en) 2007-11-26 2008-11-26 Interleaving of parity bits of a ldpc code word in the context of dvb
EP14190466.4A EP2852064B1 (en) 2007-11-26 2008-11-26 Deinterleaving of LDPC coded parity bits for DVB-T2
UAA201007579A UA101485C2 (uk) 2007-11-26 2008-11-26 Пристрій та спосіб обробки даних
EA201070631A EA021877B1 (ru) 2007-11-26 2008-11-26 Устройство и способ обработки данных
US12/743,720 US8489956B2 (en) 2007-11-26 2008-11-26 Data processing apparatus and data processing method
DK08854728.6T DK2237429T3 (en) 2007-11-26 2008-11-26 INSERTING THE PARITY BIT OF AN LDPC CODE WORD IN THE CONTEXT OF DVB
JP2009543804A JP5359881B2 (ja) 2007-11-26 2008-11-26 データ処理装置、及びデータ処理方法
AU2008330660A AU2008330660B2 (en) 2007-11-26 2008-11-26 Data process device and data process method
NZ585417A NZ585417A (en) 2007-11-26 2008-11-26 Interleaving data using a low density parity check code containing parity bits having a staircase structure
CN200880122984.3A CN101911504B (zh) 2007-11-26 2008-11-26 数据处理设备和数据处理方法
BRPI0819643-5A BRPI0819643A2 (pt) 2007-11-26 2008-11-26 Aparelho e método de processamento de dados
ZA2010/03528A ZA201003528B (en) 2007-11-26 2010-05-18 Data process device and data process method

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP2007304689 2007-11-26
JP2007-304689 2007-11-26
JP2008070467 2008-03-18
JP2008-070467 2008-03-18

Publications (1)

Publication Number Publication Date
WO2009069617A1 true WO2009069617A1 (ja) 2009-06-04

Family

ID=40678512

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2008/071384 Ceased WO2009069617A1 (ja) 2007-11-26 2008-11-26 データ処理装置、及びデータ処理方法

Country Status (15)

Country Link
US (1) US8489956B2 (ja)
EP (2) EP2237429B1 (ja)
JP (1) JP5359881B2 (ja)
KR (1) KR101577469B1 (ja)
CN (1) CN101911504B (ja)
AU (1) AU2008330660B2 (ja)
BR (1) BRPI0819643A2 (ja)
CO (1) CO6311047A2 (ja)
DK (1) DK2237429T3 (ja)
EA (1) EA021877B1 (ja)
MY (1) MY158260A (ja)
NZ (1) NZ585417A (ja)
TW (1) TWI497920B (ja)
WO (1) WO2009069617A1 (ja)
ZA (1) ZA201003528B (ja)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012049734A (ja) * 2010-08-25 2012-03-08 Nippon Hoso Kyokai <Nhk> 送信装置及び受信装置
JP2013502095A (ja) * 2009-08-07 2013-01-17 トムソン ライセンシング 低密度パリティ検査符号化およびコンステレーションマッピングを用いるデータ伝送
US8660203B2 (en) 2009-08-07 2014-02-25 Thomson Licensing Data reception using low density parity check coding and constellation mapping
JP2014045436A (ja) * 2012-08-28 2014-03-13 Jvc Kenwood Corp 送信装置、受信装置、送信方法、受信方法
JP2019176517A (ja) * 2010-10-22 2019-10-10 エレクトロニクス アンド テレコミュニケーションズ リサーチ インスチチュートＥｌｅｃｔｒｏｎｉｃｓ Ａｎｄ Ｔｅｌｅｃｏｍｍｕｎｉｃａｔｉｏｎｓ Ｒｅｓｅａｒｃｈ Ｉｎｓｔｉｔｕｔｅ 無線通信システムにおけるデータブロック送信方法及び送信機

Families Citing this family (41)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7334181B2 (en) * 2003-09-04 2008-02-19 The Directv Group, Inc. Method and system for providing short block length low density parity check (LDPC) codes
US7376883B2 (en) * 2003-10-27 2008-05-20 The Directv Group, Inc. Method and system for providing long and short block length low density parity check (LDPC) codes
US7434138B2 (en) * 2005-06-27 2008-10-07 Agere Systems Inc. Structured interleaving/de-interleaving scheme for product code encoders/decorders
ES2416356T3 (es) 2007-10-30 2013-07-31 Sony Corporation Aparato y método de procesamiento de datos
EP2071795B1 (en) * 2007-12-12 2010-03-24 Lg Electronics Inc. Apparatus for transmitting and receiving a signal and a method of transmitting and receiving a signal
JP5601182B2 (ja) 2010-12-07 2014-10-08 ソニー株式会社 データ処理装置、及びデータ処理方法
JP5630278B2 (ja) 2010-12-28 2014-11-26 ソニー株式会社 データ処理装置、及びデータ処理方法
JP5637393B2 (ja) * 2011-04-28 2014-12-10 ソニー株式会社 データ処理装置、及び、データ処理方法
EP2525495A1 (en) 2011-05-18 2012-11-21 Panasonic Corporation Bit-interleaved coding and modulation (BICM) with quasi-cyclic LDPC codes
EP2525498A1 (en) 2011-05-18 2012-11-21 Panasonic Corporation Bit-interleaved coding and modulation (BICM) with quasi-cyclic LDPC codes
EP2525497A1 (en) 2011-05-18 2012-11-21 Panasonic Corporation Bit-interleaved coding and modulation (BICM) with quasi-cyclic LDPC codes
EP2525496A1 (en) 2011-05-18 2012-11-21 Panasonic Corporation Bit-interleaved coding and modulation (BICM) with quasi-cyclic LDPC codes
JP5648852B2 (ja) * 2011-05-27 2015-01-07 ソニー株式会社 データ処理装置、及び、データ処理方法
EP2552043A1 (en) 2011-07-25 2013-01-30 Panasonic Corporation Spatial multiplexing for bit-interleaved coding and modulation with quasi-cyclic LDPC codes
US8971435B2 (en) 2011-07-25 2015-03-03 Blackberry Limited Multi-user communication using sparse space codes
EP2560311A1 (en) 2011-08-17 2013-02-20 Panasonic Corporation Cyclic-block permutations for spatial multiplexing with quasi-cyclic LDPC codes
MX2015009839A (es) * 2013-02-08 2015-12-01 Sony Corp Dispositivo de procesamiento de datos y metodo de procesamiento de datos.
SG11201406379RA (en) 2013-02-08 2014-11-27 Sony Corp Data processing device and data processing method
EP2955854A4 (en) * 2013-02-08 2016-08-24 Sony Corp DATA PROCESSING DEVICE AND DATA PROCESSING METHOD
US20150358032A1 (en) * 2013-02-08 2015-12-10 Sony Corporation Data processing device and data processing method
GB201312243D0 (en) * 2013-07-08 2013-08-21 Samsung Electronics Co Ltd Non-Uniform Constellations
US9838233B2 (en) * 2013-08-01 2017-12-05 Lg Electronics Inc. Apparatus for transmitting broadcast signals, apparatus for receiving broadcast signals, method for transmitting broadcast signals and method for receiving broadcast signals
JPWO2015041072A1 (ja) * 2013-09-20 2017-03-02 ソニー株式会社 データ処理装置、及びデータ処理方法
MX2016003222A (es) * 2013-09-20 2016-08-11 Sony Corp Dispositivo de procesamiento de datos y metodo de procesamiento de datos.
CN105531935B (zh) 2013-09-20 2020-03-31 索尼公司 数据处理装置和数据处理方法
JP6364416B2 (ja) 2013-09-20 2018-07-25 サターン ライセンシング エルエルシーＳａｔｕｒｎ Ｌｉｃｅｎｓｉｎｇ ＬＬＣ データ処理装置、データ処理方法、及び、記録媒体
MX2016003484A (es) * 2013-09-24 2016-07-06 Sony Corp Dispositivo de procesamiento de datos y metodo de procesamiento de datos.
KR102359183B1 (ko) * 2013-10-30 2022-02-07 삼성전자주식회사 송신 장치 및 그의 신호 처리 방법
US9602135B2 (en) * 2014-02-20 2017-03-21 Electronics And Telecommunications Research Institute Bit interleaver for low-density parity check codeword having length of 64800 and code rate of 5/15 and 64-symbol mapping, and bit interleaving method using same
CA3158081C (en) * 2014-02-20 2025-07-08 Shanghai National Engineering Research Center Of Digital Television Co.,Ltd INTERLACE AND MAPPING METHOD AND DEINTERLACE AND DEMAPPING METHOD FOR LDPC CODEWORD
US10425103B2 (en) * 2014-05-21 2019-09-24 Sony Corporation Data processing device and data processing method
KR102178262B1 (ko) 2014-07-08 2020-11-12 삼성전자주식회사 패리티 검사 행렬 생성 방법, 그를 이용한 부호화 장치, 부호화 방법, 복호화 장치 및 복호화 방법
CN107408214B (zh) * 2015-01-30 2021-07-09 惠普发展公司，有限责任合伙企业 M进制循环编码
KR102287614B1 (ko) * 2015-02-12 2021-08-10 한국전자통신연구원 길이가 64800이며, 부호율이 2/15인 ldpc 부호어 및 16-심볼 맵핑을 위한 비트 인터리버 및 이를 이용한 비트 인터리빙 방법
US9762346B2 (en) * 2015-05-19 2017-09-12 Samsung Electronics Co., Ltd. Transmitting apparatus and mapping method thereof
CN109245846B (zh) * 2017-07-10 2022-07-05 中兴通讯股份有限公司 一种阶梯码解码方法和阶梯码解码装置
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CN110098891B (zh) * 2018-01-30 2021-09-07 华为技术有限公司 交织方法和交织装置
CN110288069B (zh) * 2019-06-26 2023-05-02 百度在线网络技术（北京）有限公司 二维码生成和解析的方法、装置、设备及可读存储介质
CN112052702B (zh) * 2020-08-10 2023-12-19 北京智通云联科技有限公司 一种识别二维码的方法和装置
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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001352252A (ja) * 2000-06-08 2001-12-21 Sony Corp 符号化装置及び符号化方法、並びに、復号装置及び復号方法
JP2004343170A (ja) 2003-05-13 2004-12-02 Sony Corp 復号方法および復号装置、並びにプログラム
JP2005051469A (ja) * 2003-07-28 2005-02-24 Sony Corp 符号化装置および符号化方法、並びにプログラム
JP2006254466A (ja) * 2005-03-11 2006-09-21 Samsung Electronics Co Ltd 低密度のパリティ検査符号を用いる通信システムにおけるチャンネルインタリービング／デインタリービング装置およびその制御方法

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6353900B1 (en) * 1998-09-22 2002-03-05 Qualcomm Incorporated Coding system having state machine based interleaver
EP1463255A1 (en) * 2003-03-25 2004-09-29 Sony United Kingdom Limited Interleaver for mapping symbols on the carriers of an OFDM system
KR100505694B1 (ko) * 2003-07-09 2005-08-02 삼성전자주식회사 직접 계산 방식에 의한 코드화 직교 주파수 분할 다중화수신기의 채널 상태 평가 장치 및 그 방법
KR20050118056A (ko) * 2004-05-12 2005-12-15 삼성전자주식회사 다양한 부호율을 갖는 Ｂｌｏｃｋ ＬＤＰＣ 부호를 이용한이동 통신 시스템에서의 채널부호화 복호화 방법 및 장치
US7165205B2 (en) * 2004-05-14 2007-01-16 Motorola, Inc. Method and apparatus for encoding and decoding data
CN101341659B (zh) * 2004-08-13 2012-12-12 Dtvg许可公司 用于多输入多输出通道的低密度奇偶校验码的码设计与实现的改进
WO2006039801A1 (en) * 2004-10-12 2006-04-20 Nortel Networks Limited System and method for low density parity check encoding of data
KR100860504B1 (ko) * 2005-06-09 2008-09-26 삼성전자주식회사 이동통신 시스템에서 송수신 장치 및 방법
JP2007036776A (ja) 2005-07-28 2007-02-08 Sony Corp 復号装置および復号方法
JP2007096658A (ja) 2005-09-28 2007-04-12 Matsushita Electric Ind Co Ltd 無線送信装置および無線受信装置
US7941725B2 (en) * 2005-12-21 2011-05-10 Stmicroelectronics Sa Method for ciphering data with error correction code
FR2895176B1 (fr) * 2005-12-21 2008-02-22 St Microelectronics Sa Transmission securisee avec code correcteur d'erreur
US20100229066A1 (en) * 2006-01-10 2010-09-09 Mitsubishi Electric Corporation Check matrix generating method
US7493548B2 (en) * 2006-02-06 2009-02-17 Motorola, Inc Method and apparatus for encoding and decoding data
JP2007214783A (ja) * 2006-02-08 2007-08-23 Kddi Corp 送信装置、受信装置及び伝送方法
ES2416356T3 (es) * 2007-10-30 2013-07-31 Sony Corporation Aparato y método de procesamiento de datos
TWI538415B (zh) * 2007-11-26 2016-06-11 Sony Corp Data processing device and data processing method

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001352252A (ja) * 2000-06-08 2001-12-21 Sony Corp 符号化装置及び符号化方法、並びに、復号装置及び復号方法
JP2004343170A (ja) 2003-05-13 2004-12-02 Sony Corp 復号方法および復号装置、並びにプログラム
JP2005051469A (ja) * 2003-07-28 2005-02-24 Sony Corp 符号化装置および符号化方法、並びにプログラム
JP2006254466A (ja) * 2005-03-11 2006-09-21 Samsung Electronics Co Ltd 低密度のパリティ検査符号を用いる通信システムにおけるチャンネルインタリービング／デインタリービング装置およびその制御方法

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
H. JIN.; A. KHANDEKAR; R. J. MCELIECE: "Irregular Repeat-Accumulate Codes", PROCEEDINGS OF 2ND INTERNATIONAL SYMPOSIUM ON TURBO CODES AND RELATED TOPICS, September 2000 (2000-09-01), pages 1 - 8, XP002325752

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013502095A (ja) * 2009-08-07 2013-01-17 トムソン ライセンシング 低密度パリティ検査符号化およびコンステレーションマッピングを用いるデータ伝送
US8654880B2 (en) 2009-08-07 2014-02-18 Thomson Licensing Data transmission using low density parity check coding and constellation mapping
US8660203B2 (en) 2009-08-07 2014-02-25 Thomson Licensing Data reception using low density parity check coding and constellation mapping
JP2012049734A (ja) * 2010-08-25 2012-03-08 Nippon Hoso Kyokai <Nhk> 送信装置及び受信装置
JP2019176517A (ja) * 2010-10-22 2019-10-10 エレクトロニクス アンド テレコミュニケーションズ リサーチ インスチチュートＥｌｅｃｔｒｏｎｉｃｓ Ａｎｄ Ｔｅｌｅｃｏｍｍｕｎｉｃａｔｉｏｎｓ Ｒｅｓｅａｒｃｈ Ｉｎｓｔｉｔｕｔｅ 無線通信システムにおけるデータブロック送信方法及び送信機
JP2021180516A (ja) * 2010-10-22 2021-11-18 エレクトロニクス アンド テレコミュニケーションズ リサーチ インスチチュートElectronics And Telecommunications Research Institute 無線通信システムにおけるデータブロック送信方法及び送信機
US11476988B2 (en) 2010-10-22 2022-10-18 Electronics And Telecommunications Research Institute Transmitter and method for transmitting data block in wireless communication system
JP2023063397A (ja) * 2010-10-22 2023-05-09 エレクトロニクス アンド テレコミュニケーションズ リサーチ インスチチュート 無線通信システムにおけるデータブロック送信方法及び送信機
JP7279118B2 (ja) 2010-10-22 2023-05-22 エレクトロニクス アンド テレコミュニケーションズ リサーチ インスチチュート 無線通信システムにおけるデータブロック送信方法及び送信機
US11916818B2 (en) 2010-10-22 2024-02-27 Electronics And Telecommunications Research Institute Transmitter and method for transmitting data block in wireless communication system
JP2014045436A (ja) * 2012-08-28 2014-03-13 Jvc Kenwood Corp 送信装置、受信装置、送信方法、受信方法

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