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WO2009057444A1 - 回路基板及び表示装置 - Google Patents

回路基板及び表示装置 Download PDF

Info

Publication number
WO2009057444A1
WO2009057444A1 PCT/JP2008/068591 JP2008068591W WO2009057444A1 WO 2009057444 A1 WO2009057444 A1 WO 2009057444A1 JP 2008068591 W JP2008068591 W JP 2008068591W WO 2009057444 A1 WO2009057444 A1 WO 2009057444A1
Authority
WO
WIPO (PCT)
Prior art keywords
circuit board
interlayer insulating
insulating films
display device
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/JP2008/068591
Other languages
English (en)
French (fr)
Inventor
Hiroyuki Moriwaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Priority to US12/679,510 priority Critical patent/US8692251B2/en
Priority to CN200880106147.1A priority patent/CN101796619B/zh
Publication of WO2009057444A1 publication Critical patent/WO2009057444A1/ja
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1345—Conductors connecting electrodes to cell terminals
    • G02F1/13452—Conductors connecting driver circuitry and terminals of panels
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/441—Interconnections, e.g. scanning lines
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/451—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs characterised by the compositions or shapes of the interlayer dielectrics
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/60—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Mathematical Physics (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • General Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Thin Film Transistor (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)

Abstract

本発明は、回路部分の配線面積を削減することにより、挟額縁化に好適な回路基板及び上記回路基板を備える表示装置を提供する。本発明は、基板上に、半導体層、ゲート絶縁膜、ゲート電極層及び２以上の層間絶縁膜がこの順に積層された回路基板であって、上記回路基板は、２以上の層間絶縁膜上に、電源ライン、ソースバスライン、ビデオライン等の信号供給配線を有し、かつ２以上の層間絶縁膜の間にインバータ等の回路内の接続配線を有する回路基板である。
PCT/JP2008/068591 2007-11-02 2008-10-14 回路基板及び表示装置 Ceased WO2009057444A1 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
US12/679,510 US8692251B2 (en) 2007-11-02 2008-10-14 Circuit board and display device
CN200880106147.1A CN101796619B (zh) 2007-11-02 2008-10-14 电路基板和显示装置

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2007-286363 2007-11-02
JP2007286363 2007-11-02

Publications (1)

Publication Number Publication Date
WO2009057444A1 true WO2009057444A1 (ja) 2009-05-07

Family

ID=40590836

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2008/068591 Ceased WO2009057444A1 (ja) 2007-11-02 2008-10-14 回路基板及び表示装置

Country Status (3)

Country Link
US (1) US8692251B2 (ja)
CN (1) CN101796619B (ja)
WO (1) WO2009057444A1 (ja)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20130029040A (ko) 2010-03-04 2013-03-21 제온 코포레이션 반도체 소자 기판의 제조 방법
US20150108478A1 (en) * 2009-10-21 2015-04-23 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and manufacturing method for the same
WO2018147048A1 (ja) * 2017-02-13 2018-08-16 ソニー株式会社 表示装置、電子機器、および表示装置の製造方法
JP2021061410A (ja) * 2010-08-06 2021-04-15 株式会社半導体エネルギー研究所 半導体装置

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI540710B (zh) * 2012-06-22 2016-07-01 新力股份有限公司 A semiconductor device, a method for manufacturing a semiconductor device, and an electronic device
CN107527925B (zh) 2017-08-25 2019-11-05 京东方科技集团股份有限公司 显示基板及其制造方法、显示面板、显示装置
CN115128873B (zh) * 2021-03-29 2023-12-05 株式会社日本显示器 显示装置及显示装置的阵列基板

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08316310A (ja) * 1995-05-15 1996-11-29 Sony Corp 半導体装置の製造方法
JPH1048660A (ja) * 1996-08-06 1998-02-20 Toshiba Corp 液晶表示装置
JP2000284722A (ja) * 1999-01-29 2000-10-13 Semiconductor Energy Lab Co Ltd 半導体装置およびその作製方法
JP2004177892A (ja) * 2002-11-29 2004-06-24 Semiconductor Energy Lab Co Ltd 半導体装置及びその作製方法
JP2004221559A (ja) * 2002-12-25 2004-08-05 Semiconductor Energy Lab Co Ltd 半導体装置及び表示装置
JP2005072573A (ja) * 2003-08-05 2005-03-17 Semiconductor Energy Lab Co Ltd 配線基板及びその作製方法、並びに半導体装置及びその作製方法

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3520396B2 (ja) * 1997-07-02 2004-04-19 セイコーエプソン株式会社 アクティブマトリクス基板と表示装置
US6593592B1 (en) * 1999-01-29 2003-07-15 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device having thin film transistors
TW200304227A (en) * 2002-03-11 2003-09-16 Sanyo Electric Co Top gate type thin film transistor
JP2003338509A (ja) 2002-03-11 2003-11-28 Sanyo Electric Co Ltd トップゲート型薄膜トランジスタ
GB0219771D0 (en) * 2002-08-24 2002-10-02 Koninkl Philips Electronics Nv Manufacture of electronic devices comprising thin-film circuit elements
US7408196B2 (en) * 2002-12-25 2008-08-05 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and display device
KR100542986B1 (ko) * 2003-04-29 2006-01-20 삼성에스디아이 주식회사 박막 트랜지스터, 상기 박막 트랜지스터 제조 방법 및 이를 이용한 표시장치
US7423343B2 (en) * 2003-08-05 2008-09-09 Semiconductor Energy Laboratory Co., Ltd. Wiring board, manufacturing method thereof, semiconductor device and manufacturing method thereof
JP5040222B2 (ja) * 2005-12-13 2012-10-03 ソニー株式会社 表示装置
JP5090658B2 (ja) * 2006-04-06 2012-12-05 三菱電機株式会社 薄膜トランジスタ、及びその製造方法、並びにアクティブマトリクス型表示装置
JP4967631B2 (ja) * 2006-12-07 2012-07-04 三菱電機株式会社 表示装置

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08316310A (ja) * 1995-05-15 1996-11-29 Sony Corp 半導体装置の製造方法
JPH1048660A (ja) * 1996-08-06 1998-02-20 Toshiba Corp 液晶表示装置
JP2000284722A (ja) * 1999-01-29 2000-10-13 Semiconductor Energy Lab Co Ltd 半導体装置およびその作製方法
JP2004177892A (ja) * 2002-11-29 2004-06-24 Semiconductor Energy Lab Co Ltd 半導体装置及びその作製方法
JP2004221559A (ja) * 2002-12-25 2004-08-05 Semiconductor Energy Lab Co Ltd 半導体装置及び表示装置
JP2005072573A (ja) * 2003-08-05 2005-03-17 Semiconductor Energy Lab Co Ltd 配線基板及びその作製方法、並びに半導体装置及びその作製方法

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20150108478A1 (en) * 2009-10-21 2015-04-23 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and manufacturing method for the same
US10079307B2 (en) * 2009-10-21 2018-09-18 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and manufacturing method for the same
KR20130029040A (ko) 2010-03-04 2013-03-21 제온 코포레이션 반도체 소자 기판의 제조 방법
JP2021061410A (ja) * 2010-08-06 2021-04-15 株式会社半導体エネルギー研究所 半導体装置
WO2018147048A1 (ja) * 2017-02-13 2018-08-16 ソニー株式会社 表示装置、電子機器、および表示装置の製造方法
US11038140B2 (en) 2017-02-13 2021-06-15 Sony Corporation Display device, electronic device, and method of producing display device

Also Published As

Publication number Publication date
CN101796619A (zh) 2010-08-04
US20100193793A1 (en) 2010-08-05
CN101796619B (zh) 2013-03-06
US8692251B2 (en) 2014-04-08

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