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WO2008120286A1 - 半導体記憶装置、半導体記憶装置の製造方法、およびパッケージ樹脂形成方法 - Google Patents

半導体記憶装置、半導体記憶装置の製造方法、およびパッケージ樹脂形成方法 Download PDF

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Publication number
WO2008120286A1
WO2008120286A1 PCT/JP2007/053666 JP2007053666W WO2008120286A1 WO 2008120286 A1 WO2008120286 A1 WO 2008120286A1 JP 2007053666 W JP2007053666 W JP 2007053666W WO 2008120286 A1 WO2008120286 A1 WO 2008120286A1
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WO
WIPO (PCT)
Prior art keywords
layer
manufacturing
storage unit
same
semiconductor storage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/JP2007/053666
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English (en)
French (fr)
Inventor
Kouichi Nagai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Semiconductor Ltd
Original Assignee
Fujitsu Semiconductor Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Semiconductor Ltd filed Critical Fujitsu Semiconductor Ltd
Priority to CN200780051751.4A priority Critical patent/CN101617399B/zh
Priority to KR1020097015137A priority patent/KR101030765B1/ko
Priority to JP2009507280A priority patent/JP5163641B2/ja
Priority to PCT/JP2007/053666 priority patent/WO2008120286A1/ja
Publication of WO2008120286A1 publication Critical patent/WO2008120286A1/ja
Priority to US12/503,357 priority patent/US8582343B2/en
Anticipated expiration legal-status Critical
Priority to US13/442,217 priority patent/US8921125B2/en
Ceased legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B53/00—Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B53/00—Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors
    • H10B53/30—Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors characterised by the memory core region
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B53/00—Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors
    • H10B53/40—Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors characterised by the peripheral circuit region
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D1/00—Resistors, capacitors or inductors
    • H10D1/60—Capacitors
    • H10D1/68—Capacitors having no potential barriers
    • H10D1/682—Capacitors having no potential barriers having dielectrics comprising perovskite structures
    • H10W20/075—
    • H10W20/096—
    • H10W42/00—
    • H10W72/019—
    • H10W72/07251—
    • H10W72/20—
    • H10W72/242—
    • H10W72/252—
    • H10W72/29—
    • H10W72/932—
    • H10W72/934—
    • H10W72/9415—
    • H10W72/951—
    • H10W72/983—
    • H10W74/147—

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  • Semiconductor Memories (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Plasma & Fusion (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Formation Of Insulating Films (AREA)

Abstract

半導体基板上に形成されたトランジスタ層と、トランジスタ層の上方に形成された強誘電体キャパシタ層と、強誘電体キャパシタ層の上方に形成された配線層と、パシベーション膜と、を備える強誘電体キャパシタである。さらに、強誘電体キャパシタ層とパシベーション膜との間に、水分および水素の下層への透過を抑制するバリア膜が少なくとも１層形成され、パシベーション膜はノボラック樹脂を含むことを特徴とする。
PCT/JP2007/053666 2007-02-27 2007-02-27 半導体記憶装置、半導体記憶装置の製造方法、およびパッケージ樹脂形成方法 Ceased WO2008120286A1 (ja)

Priority Applications (6)

Application Number Priority Date Filing Date Title
CN200780051751.4A CN101617399B (zh) 2007-02-27 2007-02-27 半导体存储器件及其制造、测试方法、封装树脂形成方法
KR1020097015137A KR101030765B1 (ko) 2007-02-27 2007-02-27 반도체 기억 장치, 반도체 기억 장치의 제조 방법, 및 패키지 수지 형성 방법
JP2009507280A JP5163641B2 (ja) 2007-02-27 2007-02-27 半導体記憶装置、半導体記憶装置の製造方法、およびパッケージ樹脂形成方法
PCT/JP2007/053666 WO2008120286A1 (ja) 2007-02-27 2007-02-27 半導体記憶装置、半導体記憶装置の製造方法、およびパッケージ樹脂形成方法
US12/503,357 US8582343B2 (en) 2007-02-27 2009-07-15 Semiconductor storage device, semiconductor storage device manufacturing method and package resin forming method
US13/442,217 US8921125B2 (en) 2007-02-27 2012-04-09 Method of making ferroelectric memory device with barrier layer and novolac resin passivation layer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2007/053666 WO2008120286A1 (ja) 2007-02-27 2007-02-27 半導体記憶装置、半導体記憶装置の製造方法、およびパッケージ樹脂形成方法

Related Child Applications (1)

Application Number Title Priority Date Filing Date
US12/503,357 Continuation US8582343B2 (en) 2007-02-27 2009-07-15 Semiconductor storage device, semiconductor storage device manufacturing method and package resin forming method

Publications (1)

Publication Number Publication Date
WO2008120286A1 true WO2008120286A1 (ja) 2008-10-09

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Family Applications (1)

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PCT/JP2007/053666 Ceased WO2008120286A1 (ja) 2007-02-27 2007-02-27 半導体記憶装置、半導体記憶装置の製造方法、およびパッケージ樹脂形成方法

Country Status (5)

Country Link
US (2) US8582343B2 (ja)
JP (1) JP5163641B2 (ja)
KR (1) KR101030765B1 (ja)
CN (1) CN101617399B (ja)
WO (1) WO2008120286A1 (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2019083284A (ja) * 2017-10-31 2019-05-30 日本電信電話株式会社 化合物半導体集積回路

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2009001466A1 (ja) * 2007-06-28 2008-12-31 Fujitsu Microelectronics Limited 熱処理装置、及び半導体装置の製造方法
US9331019B2 (en) * 2012-11-29 2016-05-03 Infineon Technologies Ag Device comprising a ductile layer and method of making the same
CN104051450B (zh) * 2013-03-14 2017-08-01 联发科技股份有限公司 半导体封装
KR20140142032A (ko) * 2013-06-03 2014-12-11 삼성전자주식회사 반도체 장치 및 이의 제조 방법
KR102513764B1 (ko) * 2013-12-27 2023-03-24 가부시키가이샤 한도오따이 에네루기 켄큐쇼 발광 장치
US9318618B2 (en) * 2013-12-27 2016-04-19 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device
US9397149B2 (en) * 2013-12-27 2016-07-19 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device
US9472678B2 (en) * 2013-12-27 2016-10-18 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device
EP3507806B1 (en) 2016-08-31 2022-01-19 Micron Technology, Inc. Apparatuses and methods including ferroelectric memory and for accessing ferroelectric memory
EP3507804A4 (en) * 2016-08-31 2020-07-15 Micron Technology, INC. FERROELECTRIC MEMORY CELLS
EP3507807A4 (en) 2016-08-31 2020-04-29 Micron Technology, Inc. APPARATUSES AND METHODS COMPRISING AND ACCESSING A TWO-TRANSISTOR MEMORY AND A CAPACITOR
WO2018044486A1 (en) 2016-08-31 2018-03-08 Micron Technology, Inc. Apparatuses and methods including ferroelectric memory and for operating ferroelectric memory
US10867675B2 (en) 2017-07-13 2020-12-15 Micron Technology, Inc. Apparatuses and methods for memory including ferroelectric memory cells and dielectric memory cells

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63208228A (ja) * 1987-02-25 1988-08-29 Nippon Steel Chem Co Ltd 半導体封止用樹脂の成形方法
JP2004140186A (ja) * 2002-10-17 2004-05-13 Toray Ind Inc 半導体装置の製法
JP2004193400A (ja) * 2002-12-12 2004-07-08 Toshiba Corp 半導体装置の製造方法及びフォトマスク
JP2005183619A (ja) * 2003-12-18 2005-07-07 Canon Inc 不揮発メモリ装置
JP2007027514A (ja) * 2005-07-19 2007-02-01 Fujitsu Ltd 半導体装置及びその製造方法

Family Cites Families (40)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11103074A (ja) * 1997-09-29 1999-04-13 Tokai Rika Co Ltd シリコン基板の陽極化成方法及びそれを利用した加速度センサの製造方法
JPH11293089A (ja) 1998-04-15 1999-10-26 Sumitomo Bakelite Co Ltd エポキシ樹脂組成物及び強誘電体メモリー装置
KR100329781B1 (ko) * 1999-06-28 2002-03-25 박종섭 수소확산을 방지할 수 있는 강유전체 메모리 소자 제조 방법
JP3950290B2 (ja) * 1999-09-10 2007-07-25 三星電子株式会社 キャパシタ保護膜を含む半導体メモリ素子及びその製造方法
JP3907921B2 (ja) * 2000-06-19 2007-04-18 富士通株式会社 半導体装置の製造方法
JP4011334B2 (ja) * 2001-12-04 2007-11-21 富士通株式会社 強誘電体キャパシタの製造方法およびターゲット
JP2004296929A (ja) * 2003-03-27 2004-10-21 Seiko Epson Corp 強誘電体キャパシタの製造方法、強誘電体キャパシタ、記憶素子、電子素子、メモリ装置及び電子機器
JP2005062764A (ja) * 2003-08-20 2005-03-10 Kyocera Chemical Corp ポジ型感光性樹脂組成物
JP4659355B2 (ja) * 2003-12-11 2011-03-30 富士通セミコンダクター株式会社 半導体装置およびその製造方法
CN100505265C (zh) * 2003-12-26 2009-06-24 富士通微电子株式会社 半导体装置、半导体装置的制造方法
JP2005206737A (ja) 2004-01-26 2005-08-04 Mitsui Chemicals Inc 熱重合性及び放射性重合性接着シート並びにそれを用いた半導体装置
CN100521211C (zh) * 2004-06-04 2009-07-29 富士通微电子株式会社 半导体装置及其制造方法
KR101203090B1 (ko) * 2004-07-30 2012-11-20 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체장치의 제조방법
JP5041686B2 (ja) 2004-07-30 2012-10-03 株式会社半導体エネルギー研究所 薄膜集積回路の剥離方法および半導体装置の作製方法
JP2006073648A (ja) * 2004-08-31 2006-03-16 Fujitsu Ltd 半導体装置及びその製造方法
JP4610285B2 (ja) 2004-09-30 2011-01-12 株式会社半導体エネルギー研究所 液晶表示装置の作製方法
JP2006147771A (ja) * 2004-11-18 2006-06-08 Oki Electric Ind Co Ltd 強誘電体メモリ及びその製造方法
JP4589092B2 (ja) * 2004-12-03 2010-12-01 富士通セミコンダクター株式会社 半導体装置の製造方法
JP4968063B2 (ja) * 2005-03-01 2012-07-04 富士通セミコンダクター株式会社 半導体装置及びその製造方法
WO2006101241A1 (en) * 2005-03-25 2006-09-28 Semiconductor Energy Laboratory Co., Ltd. Memory element, memory device, and semiconductor device
JP4422644B2 (ja) * 2005-03-30 2010-02-24 富士通マイクロエレクトロニクス株式会社 半導体装置の製造方法
US7791066B2 (en) * 2005-05-20 2010-09-07 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and manufacturing method thereof and method for writing memory element
WO2006129366A1 (ja) * 2005-06-02 2006-12-07 Fujitsu Limited 半導体装置及びその製造方法
JP5005190B2 (ja) * 2005-06-08 2012-08-22 富士通セミコンダクター株式会社 半導体装置の製造方法
KR100973703B1 (ko) * 2005-06-17 2010-08-04 후지쯔 세미컨덕터 가부시키가이샤 반도체 장치 및 그 제조 방법
WO2006134663A1 (ja) * 2005-06-17 2006-12-21 Fujitsu Limited 半導体装置及びその製造方法
JP4998262B2 (ja) * 2005-07-05 2012-08-15 富士通セミコンダクター株式会社 半導体装置及びその製造方法
JP2007081378A (ja) * 2005-08-17 2007-03-29 Fujitsu Ltd 半導体装置とその製造方法、および薄膜装置
WO2007074529A1 (ja) * 2005-12-27 2007-07-05 Fujitsu Limited 半導体装置
KR101005028B1 (ko) * 2005-12-27 2010-12-30 후지쯔 세미컨덕터 가부시키가이샤 반도체 장치
KR101095408B1 (ko) * 2005-12-28 2011-12-19 후지쯔 세미컨덕터 가부시키가이샤 반도체 장치
US7968382B2 (en) * 2007-02-02 2011-06-28 Semiconductor Energy Laboratory Co., Ltd. Method of manufacturing semiconductor device
JP5399232B2 (ja) * 2007-02-21 2014-01-29 富士通セミコンダクター株式会社 半導体装置の製造方法
JP2008210893A (ja) * 2007-02-23 2008-09-11 Fujitsu Ltd 半導体装置とその製造方法
WO2008111199A1 (ja) * 2007-03-14 2008-09-18 Fujitsu Microelectronics Limited 半導体装置及びその製造方法
WO2008117426A1 (ja) * 2007-03-27 2008-10-02 Fujitsu Microelectronics Limited 半導体装置、および製造方法
WO2009001466A1 (ja) * 2007-06-28 2008-12-31 Fujitsu Microelectronics Limited 熱処理装置、及び半導体装置の製造方法
JP5502302B2 (ja) * 2008-09-26 2014-05-28 ローム株式会社 半導体装置およびその製造方法
US20110079878A1 (en) * 2009-10-07 2011-04-07 Texas Instruments Incorporated Ferroelectric capacitor encapsulated with a hydrogen barrier
JP5672832B2 (ja) * 2010-08-06 2015-02-18 富士通セミコンダクター株式会社 半導体装置とその製造方法

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63208228A (ja) * 1987-02-25 1988-08-29 Nippon Steel Chem Co Ltd 半導体封止用樹脂の成形方法
JP2004140186A (ja) * 2002-10-17 2004-05-13 Toray Ind Inc 半導体装置の製法
JP2004193400A (ja) * 2002-12-12 2004-07-08 Toshiba Corp 半導体装置の製造方法及びフォトマスク
JP2005183619A (ja) * 2003-12-18 2005-07-07 Canon Inc 不揮発メモリ装置
JP2007027514A (ja) * 2005-07-19 2007-02-01 Fujitsu Ltd 半導体装置及びその製造方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2019083284A (ja) * 2017-10-31 2019-05-30 日本電信電話株式会社 化合物半導体集積回路

Also Published As

Publication number Publication date
CN101617399B (zh) 2011-05-18
KR101030765B1 (ko) 2011-04-27
US20120195114A1 (en) 2012-08-02
KR20090094464A (ko) 2009-09-07
JP5163641B2 (ja) 2013-03-13
JPWO2008120286A1 (ja) 2010-07-15
CN101617399A (zh) 2009-12-30
US20090273963A1 (en) 2009-11-05
US8921125B2 (en) 2014-12-30
US8582343B2 (en) 2013-11-12

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