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WO2000016378A2 - Procede de fabrication de dispositifs a semi-conducteur a base de nitrure du groupe iii - Google Patents

Procede de fabrication de dispositifs a semi-conducteur a base de nitrure du groupe iii Download PDF

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Publication number
WO2000016378A2
WO2000016378A2 PCT/SG1999/000091 SG9900091W WO0016378A2 WO 2000016378 A2 WO2000016378 A2 WO 2000016378A2 SG 9900091 W SG9900091 W SG 9900091W WO 0016378 A2 WO0016378 A2 WO 0016378A2
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group
ultra
composite intermediate
film
intermediate layers
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WO2000016378A3 (fr
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Xiong Zhang
Soo-Jin Chua
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National University of Singapore
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National University of Singapore
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Publication of WO2000016378A3 publication Critical patent/WO2000016378A3/fr
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/01—Manufacture or treatment
    • H10H20/011—Manufacture or treatment of bodies, e.g. forming semiconductor layers
    • H10H20/013—Manufacture or treatment of bodies, e.g. forming semiconductor layers having light-emitting regions comprising only Group III-V materials
    • H10H20/0133—Manufacture or treatment of bodies, e.g. forming semiconductor layers having light-emitting regions comprising only Group III-V materials with a substrate not being Group III-V materials
    • H10H20/01335—Manufacture or treatment of bodies, e.g. forming semiconductor layers having light-emitting regions comprising only Group III-V materials with a substrate not being Group III-V materials the light-emitting regions comprising nitride materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/02373—Group 14 semiconducting materials
    • H01L21/02381—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02439—Materials
    • H01L21/02441—Group 14 semiconducting materials
    • H01L21/0245—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02439—Materials
    • H01L21/02455—Group 13/15 materials
    • H01L21/02458—Nitrides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02494—Structure
    • H01L21/02496—Layer structure
    • H01L21/02505—Layer structure consisting of more than two layers
    • H01L21/02507—Alternating layers, e.g. superlattice
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02538—Group 13/15 materials
    • H01L21/0254—Nitrides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD
    • H10P14/24—
    • H10P14/2905—
    • H10P14/3211—
    • H10P14/3216—
    • H10P14/3252—
    • H10P14/3416—

Definitions

  • the present invention relates to a method for fabricating group-Ill nitride-based compound semiconductor devices grown on a substrate consisting of, for example, silicon and, more particularly, to a method for growing epitaxial layers of group-Ill nitride-based compound semiconductors by means of metalorganic chemical vapor deposition (to be referred to as MOCVD hereinafter).
  • MOCVD metalorganic chemical vapor deposition
  • group-Ill nitride and related compound semiconductors have been researched and developed in recent years.
  • MOCVD is currently widely used as a method for growing group-Ill nitride and related compound semiconductors.
  • group-Ill nitride is grown hetero-epitaxially on a sapphire substrate which is most frequently used at present.
  • sapphire is an insulating material and extremely rigid, it is not easy to fabricate a group-Ill nitride-based semiconductor device on a sapphire substrate.
  • Silicon is one of the proposed substrate materials to overcome this shortcoming because of its high quality, large size, low cost, and the potential application to integrated opto-electronic devices.
  • due to the large differences in lattice constant and thermal expansion coefficient between the group- Ill nitride and silicon it is really difficult to grow high quality epitaxial layer of group-Ill nitride-based compound semiconductor on a silicon substrate.
  • the present invention has been made in consideration of the above situation and as one of its objectives, provides for a group-Ill nitride-based compound semiconductor- based device which emits and detects light with a wavelength covering from green to ultraviolet ranges, and is formed on a silicon substrate, having the above mentioned advantages, e.g. high crystal quality, large wafer size, low cost, well-established processing technology, and potential application to integrating optical devices with electronic devices on the same silicon chip.
  • a crystal growth method for group-Ill nitride and related compound semiconductors on silicon substrates comprising of the following steps:
  • MOCVD-growing at least one periodic or non-periodic multi-layered buffer on the top of the formed ultra-thin amorphous silicon film at a low temperature (preferably between 400-750 °C).
  • the layers alternate between two types of compound semiconductors different from each other in lattice constant, energy band gap, layer thickness, and composition;
  • the group-Ill nitride-based compound semiconductor layers can be doped n- or p-type as it is MOCVD-grown over the obtained composite intermediate layers on a silicon substrate with excellent characteristics so as to form an excellent p-n junction for fabricating group-Ill nitride-based opto-electronic devices.
  • FIG. 1 is a schematic sectional view showing p-GaN and n-GaN crystals grown over a conventional A1N intermediate layer on a silicon substrate.
  • FIG. 2 is a schematic sectional view showing a GaN-based semiconductor grown over composite intermediate layers consisting of an ultra-thin amorphous silicon film or any stress-relief film or a combination of them and a periodic and alternating GaN/Al x Ga ⁇ -x N
  • the full width at half maximum of the band-edge emission peak around 3.4 eV is 40 meV which is nearly 38 % narrower than the narrowest value reported so far 65 meV, indicating that the crystal quality of GaN-based semiconductor grown on a silicon substrate can be significantly improved by using the composite intermediate layers.
  • the full width at half maximum for the dominant (0002) diffraction peak at 34.6 arc-degrees is 40 arc-minutes. This peak corresponds to the (0002) diffraction from the wurtzite GaN film and is much more intense than that from the silicon substrate, indicating once again that the crystal quality of GaN-based semiconductor grown on a silicon substrate can be significantly improved by using the composite intermediate layers.
  • a silicon (001) or (111) substrate which can be a single crystal or coated on the surface with a thin amorphous silicon film or any stress-relief film or a combination of them is thermal-treated in a MOCVD reactor chamber under hydrogen ambient at a high temperature (preferably over- 900 °C) for at least 5 minutes in order to produce a clean, oxide-free surface.
  • the temperature is then reduced to a low temperature (preferably between 400- 750
  • an ultra-thin (preferably less than 500 nm) amorphous silicon film is deposited on a part of or the entirety of the surface of the above mentioned silicon (001) or (111) substrate using hydrogen-diluted silane as precursor in order to form a "soft" buffer on the silicon substrate.
  • a periodic or non-periodic multi-layered buffer in which the layers alternate between two types of group-Ill nitride-based compound semiconductors A and B different from each other in lattice constant, energy band gap, layer thickness, and solid composition, is grown on the top of the above-mentioned ultra-thin amorphous silicon film by atmospheric-pressure or low-pressure (60-100 Torr) MOCVD at a low temperature (preferably between 400-750 °C). Since the growth temperature for this multi-layered buffer is much lower than the temperature at which a Ill-nitride single crystal can be formed, the buffer layer is of an amorphous or polycrystalline state.
  • the growth temperature is then raised to a mediate temperature (preferably in the range of 750-900 °C), a single layer or multiple layers of group-Ill nitride-based compound semiconductors is/are grown by MOCVD over the composite intermediate layers to form a secondary multi-layered buffer and further accommodate the stress induced by the lattice mismatch between Ill-nitrides and a silicon substrate.
  • a mediate temperature preferably in the range of 750-900 °C
  • the growth temperature is raised to a high temperature (preferably higher than 900 °C), then at least one layer or multiple layers of group-Ill nitride-based compound semiconductors are grown over the surface of the composite intermediate layers consisting of the pre-grown ultra-thin amorphous silicon film or any stress-relief film or a combination of them and the multi-layered buffers.
  • a high temperature preferably higher than 900 °C
  • group-Ill nitride-based compound semiconductor layers can be doped n- or p- type as it is MOCVD-grown over the composite intermediate layers on a silicon substrate so as to form a p-n junction for fabricating group-Ill nitride-based opto-electronic devices.
  • both the ultra-thin amorphous silicon film and the amorphous or polycrystalline multi-layered buffer will partially change to single or polycrystalline state due to the recrystallizing effect, which serve as seed crystals for the subsequent growth of the nitride-based compound semiconductor films.
  • the composite intermediate layers of the present invention demonstrate the ability to accommodate the strain arising from the lattice mismatch between the group-Ill nitride-based compound semiconductors and the silicon substrate, and to form the seed crystal more effectively.
  • the strain-accommodating and recrystallizing effects are of crucial importance in improving the crystal quality of the group-Ill nitride-based compound semiconductors, and these effects serve better in the composite intermediate layers of the present invention than in the conventional AIN single buffer, the crystal quality of the group-Ill nitride-based compound semiconductors will be significantly improved by utilizing the composite intermediate layers. This is confirmed by the intense and narrow optical emission peak observed in the PL spectra of the GaN-based semiconductor films grown by using the composite intermediate layers of the present invention. The x-ray diffraction data provides additional evidence to this conclusion. The detailed description will be given below in Example 1.
  • the optimal values in total layer thickness and composition for the composite intermediate layers of the present invention apparently depend on the selection of the constituent semiconductors as well as the subsequently grown group-Ill nitrides and related compound semiconductors.
  • the optimal value for a special material combination can now only be determined by experiment.
  • the existence of the optimal layer thickness for the composite intermediate layers can be interpreted qualitatively as follows. Generally a buffer layer grown at a low temperature provides seed crystals which act as nucleation sites with low orientational fluctuation to promote the lateral growth of the group-Ill nitrides.
  • the composite intermediate layers of the present invention which consist of an ultra-thin amorphous silicon film and a multi-layered buffer provide more seed crystals as well as additional interfaces for the misfit dislocations to terminate than a conventional single buffer layer.
  • the composite intermediate layers may neither effectively accommodate the elastic strain due to the large lattice mismatch between the group-Ill nitride crystals and the silicon substrate nor provide sufficient amount of seed crystals for the subsequent growth of the group-Ill nitrides.
  • the composite intermediate layers are too thick, they tend to bring about excessive amount of the seed crystals with high orientational fluctuation. Therefore, there should be an optimal layer thickness for the composite intermediate layers.
  • the composite intermediate layers of the present invention which consist of an ultra-thin amorphous film or any stress-relief film or a combination of them and at least one multi-layered buffer can be formed not only on a silicon substrate but also on any substrate which are presently used or may be developed in the future, such as SiC, GaP, InP, and GaAs substrates if the constituent semiconductors for the composite intermediate layers are selected correspondingly.
  • the composite intermediate layers can even be formed on the surface of the epitaxial layers of group-Ill nitrides and related compound semiconductors. This characteristic implies that the composite intermediate layers of the present invention can be applied to the regrowth of group-Ill nitride-based compound semiconductors on the as-grown nitrides.
  • the optical properties of the GaN film grown over the composite intermediate layers of the present invention are compared with those of samples grown over conventional intermediate layers based on the characterization results obtained by PL spectroscopy and x-ray diffraction profile.
  • the silicon (001) substrate is thermal-treated in a MOCVD reactor chamber under hydrogen ambient at a high temperature (preferably over 900 °C) for at least 5 minutes in order to produce a clean, oxide-free surface.
  • the temperature is then reduced to a low temperature (preferably between 400-750 °C), and an ultra-thin (preferably less than 500 nm) amorphous silicon film is deposited on the surface of the above mentioned silicon (001) substrate using hydrogen-diluted silane as a precursor in order to form a "soft" buffer on the silicon substrate.
  • x N are set to 3 nm and 5 nm, respectively, corresponding to a total layer thickness of 24 nm for the multi-layered buffer.
  • a 1 ⁇ m-thick undoped GaN epitaxial layer is grown on the surface of the composite intermediate layers consisting of an ultra-thin amorphous silicon film and a multi-layered buffer at a high temperature (preferably higher than 900 °C).
  • PL room-temperature photoluminescence
  • XRD x-ray diffraction
  • the PL emission of the undoped GaN epitaxial layer grown over the composite intermediate layers of the present invention is much more intense than the defects-related yellow-band emissions centered around 2.26 eV.
  • the PL intensity of the GaN band-edge-related emission peak around 3.4 eV as seen in FIG. 4 is found to be comparable to or even slightly stronger than the corresponding value for the GaN grown in our laboratory on a sapphire substrate using the low-temperature-grown GaN thin film as the intermediate layer.
  • the full width at half maximum of the GaN band-edge-related emission peak is 40 meV which is nearly 38 % narrower than the best value achieved so far, 65 meV, recently reported by Oshinsky et al. (Appl. Phys. Lett. Vol. 72, 1998, pp. 551-553). This fact indicates that the crystal quality of GaN-based semiconductor grown on a silicon substrate can be significantly improved by using the composite intermediate layers.
  • the diffraction peak at 34.6 arc-degrees is dominant, and identified as the (0002) diffraction from the wurtzite GaN crystal.
  • FIG. 6 shows the schematic sectional view of a GaN-based light emitting diode fabricated on a silicon substrate according to Example 2 of the present invention.
  • the detailed fabrication process is as follows.
  • the n-type silicon (001) substrate on top of which a 150 nm-thick amorphous silicon film was pre-grown by chemical vapor deposition is heated in a MOCVD reactor chamber under hydrogen ambient at a high temperature (preferably over 900 °C) for at least 5 minutes in order to produce a clean, oxide-free surface.
  • the temperature is then reduced to a lower temperature (preferably between 400-750 °C), and an ultra-thin (preferably less than 500 nm) amorphous silicon film is deposited on the surface of the above mentioned silicon (001) substrate using hydrogen-diluted silane as a precursor in order to form a "soft" buffer on the silicon substrate.
  • the film thickness of GaN and Al ⁇ Ga ⁇ -x N are set to 3 nm and 5 nm, respectively, corresponding to a total layer thickness of 48 nm for the multi-layered buffer.
  • the temperature is then reduced to a lower temperature (preferably between 650-850 °C) and the carrier gas for the MOCVD growth is switched over from hydrogen to nitrogen simultaneously to grow a number of 5-15 nm-thick In y Ga ⁇ -y N (0 ⁇ y ⁇ 0.5) epitaxial layers to form the quantum well.
  • a Ni/Au contact is evaporated onto the Mg-doped p-GaN layer and a Ti/Au contact onto the Si- doped n-GaN layer to accomplish the fabrication of the p-n junction.

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Abstract

Dispositif à semi-conducteur à base de nitrure du groupe III, qui est cultivé sur la surface de couches composites intermédiaires constituées d'un film de silicium amorphe fin ou d'un film de relaxation des contraintes ou d'une combinaison des deux et d'au moins un tampon multicouche situé sur un substrat de silicium, et procédé de fabrication dudit dispositif. Les couches intermédiaires qui suppriment l'apparition de défauts cristallins et la propagation des dislocations induites par le décalage de réseau entre la couche épitaxiale et le substrat, peuvent être cultivées sur une partie ou sur toute la surface d'un substrat de silicium (001) ou (111) qui peut être monocristallin ou couvert d'un film de silicium fin amorphe. Ensuite, au moins une couche ou des couches multiples de semi-conducteurs à base de nitrure du groupe III de haute qualité sont cultivées sur les couches intermédiaires composites.
PCT/SG1999/000091 1998-09-15 1999-09-03 Procede de fabrication de dispositifs a semi-conducteur a base de nitrure du groupe iii Ceased WO2000016378A2 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US09/787,114 US6524932B1 (en) 1998-09-15 1999-09-03 Method of fabricating group-III nitride-based semiconductor device

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SG9803670A SG94712A1 (en) 1998-09-15 1998-09-15 Method of fabricating group-iii nitride-based semiconductor device
SG9803670-0 1998-09-15

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WO2000016378A2 true WO2000016378A2 (fr) 2000-03-23
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WO2001095380A1 (fr) * 2000-06-09 2001-12-13 Centre National De La Recherche Scientifique Procede de preparation d'une couche de nitrure de gallium
WO2002050879A1 (fr) * 2000-12-18 2002-06-27 Motorola, Inc. Structure a semi-conducteur comportant un film monocristallin
CN102790155A (zh) * 2011-05-16 2012-11-21 株式会社东芝 氮化物半导体器件和晶片以及制造氮化物半导体层的方法
US8969891B2 (en) 2011-05-16 2015-03-03 Kabushiki Kaisha Toshiba Nitride semiconductor device, nitride semiconductor wafer and method for manufacturing nitride semiconductor layer

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