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WO1992000196A1 - Imprimante a reseau de del - Google Patents

Imprimante a reseau de del Download PDF

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Publication number
WO1992000196A1
WO1992000196A1 PCT/US1991/004488 US9104488W WO9200196A1 WO 1992000196 A1 WO1992000196 A1 WO 1992000196A1 US 9104488 W US9104488 W US 9104488W WO 9200196 A1 WO9200196 A1 WO 9200196A1
Authority
WO
WIPO (PCT)
Prior art keywords
current
recording
image data
printer apparatus
driver
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/US1991/004488
Other languages
English (en)
Other versions
WO1992000196A9 (fr
Inventor
Martin Potucek
Mary Hadley
Jeffrey A. Small
Michael William Mattern
Keith W. Agar
Hieu T. Pham
Yee Seung Ng
Jeremy K. Chung
Kenneth D. Kieffer
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Eastman Kodak Co
Original Assignee
Eastman Kodak Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US07/543,929 external-priority patent/US5253934A/en
Priority claimed from US07/543,930 external-priority patent/US5126759A/en
Application filed by Eastman Kodak Co filed Critical Eastman Kodak Co
Priority to EP91912735A priority Critical patent/EP0487715B1/fr
Priority to DE69122718T priority patent/DE69122718T2/de
Publication of WO1992000196A1 publication Critical patent/WO1992000196A1/fr
Anticipated expiration legal-status Critical
Publication of WO1992000196A9 publication Critical patent/WO1992000196A9/fr
Ceased legal-status Critical Current

Links

Classifications

    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B41—PRINTING; LINING MACHINES; TYPEWRITERS; STAMPS
    • B41J—TYPEWRITERS; SELECTIVE PRINTING MECHANISMS, i.e. MECHANISMS PRINTING OTHERWISE THAN FROM A FORME; CORRECTION OF TYPOGRAPHICAL ERRORS
    • B41J2/00—Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed
    • B41J2/435—Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed characterised by selective application of radiation to a printing material or impression-transfer material
    • B41J2/447—Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed characterised by selective application of radiation to a printing material or impression-transfer material using arrays of radiation sources
    • B41J2/45—Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed characterised by selective application of radiation to a printing material or impression-transfer material using arrays of radiation sources using light-emitting diode [LED] or laser arrays
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B41—PRINTING; LINING MACHINES; TYPEWRITERS; STAMPS
    • B41J—TYPEWRITERS; SELECTIVE PRINTING MECHANISMS, i.e. MECHANISMS PRINTING OTHERWISE THAN FROM A FORME; CORRECTION OF TYPOGRAPHICAL ERRORS
    • B41J2202/00—Embodiments of or processes related to ink-jet or thermal heads
    • B41J2202/01—Embodiments of or processes related to ink-jet heads
    • B41J2202/17—Readable information on the head

Definitions

  • the present invention relates to non-impact printer apparatus for recording, and more specifically, to circuitry thereon for controlling current uniformity to the recording elements.
  • an L.E.D. (light emitting diode) printhead wherein control of current to the LED's during recording is provided by a current mirror circuit.
  • This circuit features an adjustable resistor and voltage supply to allow the respective currents to the LED's to be. controlled so that adjustments may be provided to have the outputs of the LED's be more uniform.
  • each driver chip is separately adjustable so that LED's driven from this driver chip receive sufficient current so that their respective intensities are similar to that of LED's driven by other driver chips on this printhead.
  • Another aspect of adjustability requires the LED's to put out sufficient light to expose the recording medium such as a photoconductor.
  • a non-impact printer apparatus that includes a recording head having a plurality of recording elements for recording on a recording medium; driving means including a plurality of current driving channels for selectively driving said plurality of recording elements in accordance with respective image data signals; the driving means further including an extra current driving channel not associated with a recording element for generating a current related to that sent to said recording elements; and means for monitoring a parameter related to said current in said extra channel.
  • a non-impact printer apparatus in accordance with another aspect of the invention, includes a recording head having a plurality of recording elements for recording on a recording medium; driving means for selectively driving said plurality of recording elements in accordance with respective image data signals; and means including data bus means for carrying on said data bus means multibit image data signals determining a recording duration for a recording element and for carrying on one line of said data bus means also used for carrying image data signals, a multibit digital signal used for regulating a level of current to said recording element.
  • a non-impact printer apparatus comprising: a recording head having a plurality of recording elements for recording on a recording medium; driving means for selectively driving said plurality of recording elements in accordance with respective image data signals; said driving means including a plurality of data register means with respective data register means associated with each recording element for storing said image data signals; data bus means for carrying image data signals; means for commonly connecting said data bus means to said plurality of data register means; means for generating a token bit signal; a multistage shift register means for outputting sequentially at respective stages the token bit signal for sequentially selecting a respective data -4- register means for accepting image data signals; said driving means further including current regulating means for regulating a level of electrical current to each recording element, the current regulating means being characterized by means for adjusting a level of electrical current to each recording element in response to a multibit digital signal; and wherein the current regulating means further includes first register means including a plurality of registers for storing digital signals related to a
  • a non-impact printer apparatus used for recording comprising: a plurality of groups of recording elements, a plurality of integrated circuit driver chips for driving respective groups of recording elements; a) first digitally addressable current-conducting means for selectively establishing a first bias voltage in response to a first multibit digital signal; b) second digitally addressable current-conducting means responsive to the first bias voltage and to a second multibit digital signal for generating a bias current and establishing a second bias voltage; c) means for selectively causing current to flow through recording elements selected for energization; and d) current mirror driver means for regulating levels of currents through said selected recording elements, the level of current being related to said second bias voltage, and characterized by wherein elements a), b), c) and d) are all on each of said driver chips.
  • a non-impact printer apparatus comprising: a series of point-like energizable radiation sources arranged in a row; means providing data signals representing data to be printed; logic means responsive to the data signals for determining which of the point-like radiation sources are to be selected for energization; current driver means responsive to the logic means for providing electrical current to the radiation sources selected for energization, the current driver means including a master circuit including a first transistor for generating a reference current through said first transistor and a plurality of slave circuits for providing respective slave driver currents to the radiation sources selected for energization, means including (a) a plurality of individually selectively addressable current-conducting devices coupled to the master circuit, (b) first control means for selectively determining which of said plurality of devices are to be current conducting, and characterized by (c) current source means responsive to increases in temperature on the printhead for providing increased current generated by said current source means, (d) adjustable bias means coupling said current source means to said first
  • the invention also provides a non-impact printer apparatus, comprising: a plurality of energizable recording elements; driving means for energizing said recording elements, said driving means including current mirror means having a master circuit means for generating a reference current and a plurality of slave circuit means for providing respective driver currents to the recording elements selected for energization; each slave circuit means including:
  • transistor switching means in series with a respective recording lement and switchable from one state to another in response to a signal and having a control eankrode for controlling driver current to its respective recording element in response to the signal;
  • each of said slave circuit means further including its own additional slave circuit means for providing a current path for facilitating changing of the signal at the control electrode from one voltage level to another.
  • FIG. 1 is a perspective view illustrating the general arrangement of a prior art non-impact printer
  • FIG. 2 is a block diagram of a circuit for providing signals to a non-impact printhead made in accordance with the invention
  • FIG. 3 is a block diagram of a printhead according to the invention, the printhead including a plurality of driver chips for driving the LED's formed on chip arrays;
  • FIG. 4 is a block diagram of a driver chip made according to one embodiment of the invention and used on the printhead of FIG. 3;
  • FIG. 5 is a circuit diagram of one circuit incorporated on the driver chip of FIG. 4 in accordance with the invention.
  • FIGS. 6A, 6B, 6C, and 6D comprise a schematic of a current driving circuit incorporated on the driver chip of FIG. 4.
  • FIG. 7 is a block diagram of another embodiment of a printhead made according to the invention.
  • FIG. 8 is a block diagram of a driver chip for use on the printhead of FIG. 7;
  • FIG. 9 is a block diagram of an extra driver channel or current monitor channel for the driver chip of FIG. 8;
  • FIG. 10 is a schematic of a token bit register incorporated on the driver chip of FIG. 8;
  • FIG. 11 is a schematic of a token bit register incorporated on another embodiment of a driver chip that is a modification of that of FIG. 8;
  • FIG. 12 is a time line illustrating the occurrence of various pulses on the driver chip of FIG. 11.
  • FIG. 13 is a truth table illustrating operation of the modified driver chip of FIG. 11.
  • the apparatus for the herein disclosed invention is typified by the diagram of FIG. 1; a linear array 10 of say 3584 triggerable recording elements; e.g. LED's, is disposed to expose selectively a photosensitive image-receiver medium 12 that is movable relative to the array by suitable conventional means (not shown). While the embodiments of the invention will be described in terms of LED printheads, other recording elements may also make use of this invention. Optical means for focusing the LED's onto the medium may also be provided. In this regard, gradient index optical fiber devices such as Selfoc (trademark of Nippon Sheet Glass Co., Ltd.) arrays are highly suited. The LED's of the array are triggered into operation by means of image processing electronics 14 that are responsive to image signal information.
  • image processing electronics 14 that are responsive to image signal information.
  • the exposure effected by such LED is more or less made.
  • the medium 12 is, say, photographic film
  • the latent image formed line by line by selective exposure of said LED's may be subsequently developed by conventional means to form a visible image.
  • the medium 12 is an electrophotographic receptor
  • the LED's may be used to form an electrostatic image on a uniformly electrostatically charged photoconductor and this image developed using opaque toner particles and perhaps transferred to a copy sheet, see U.S. Patent 3,850,517 and 4,831,395.
  • a data source 15 such as a computer, word processor, image scanner or other source of digitized image data, provides image data signals to a data processor 16 which may comprise a raster image processor.
  • the data processor under control of clock pulses from a logic and control device (LCU) 13 provides a plurality of outputs including rasterized data outputs and control signals which are fed to the printhead.
  • Data for each pixel may be represented by a multibit signal of say 4 bits representing a grey level for exposure for recording that pixel.
  • a programmable ROM (PROM) 16a may be provided either on or off the printhead to modify the data to provide for uniformity correction from LED to LED.
  • the PROM transforms the 4-bit signal into a 6-bit grey level signal that is adjusted or corrected for the light-emitting characteristics of the respective LED. This balance in light output from LED to LED can be corrected by modifying the data bit signals in accordance with empirical determinations.
  • the PROM has stored therein correction factors associated with each LED for modifying that LED's respective data. As will be described below, this PROM may be modified in accordance with age and/or temperature changes to the printhead.
  • the LCU provides exposure clock pulses to a down/up counter 18 (FIG.
  • the comparators 19 all compare the output of the counter 18 with the value of the respective data.
  • the image data signals provided to each comparator relates to a desired ON time or period of enablement for a respective LED 30 for the recording of a particular pixel.
  • the LED's are alternately divided into odd and even-numbered LED's so that respective integrated circuit driver chips 40 therefor are located on opposite sides of the line of LED's.
  • the discussion herein will be made as to one of these driver chips.
  • the image data signals provided to each comparator 19 during the printing of a single line of dots by the row of LED's is related to the desired pixel or dot size to be exposed onto the image receiver medium by that LED for that particular line of dots.
  • six independent lines of data DI0 through DI5 provide a six bit digital image data signal that allows for grey-scale variation of the output of each LED during each cycle of operation.
  • the data to each comparator may comprise six binary bits representing an amount from decimal 0 to decimal 63.
  • the data lines DIO through DI5 are shown passing through the data registers 24 in FIG. 4, it will be appreciated that this is for the convenience of this illustration and that actually such lines comprise a plurality of data lines that are simultaneously available to all latches as will be described below.
  • an LED, LED* is to be enabled for a time period equal to 20 clock periods plus T M , M .
  • T M - N represents a pre-established minimum LED on time.
  • the counter 18 is enabled and commences to count exposure clock pulses from line 17 from decimal 63 to 0. Note that the clock pulses may be generated to have a variable programmable period.
  • the six bit output of counter 18 is coupled to one set of inputs at terminal X of each of the comparators. This count is now compared with the data input at another set of inputs at terminal Y of this comparator which represents in binary form decimal ten.
  • a programmable read only memory device or PROM or other programmable device may store the characteristics of each LED and data for that LED can be modified to provide an input count at terminal Y that represents data modified by the exposure characteristics of the LED. For example, for an LED that is a relatively strong light emitter the PROM would modify data bits for that LED to reduce the count that otherwise would be provided at terminal Y based solely on the data. Still other circuitry for balancing the driving current to the LED's is described below.
  • the driving circuitry for the LED's are provided on opposite sides of the line of LED's 20. This is a known desirable arrangement for permitting LED's to be packed closer together to provide greater image resolution capabilities for the printer.
  • the circuit arrangement is an alternating one such that what may be called the even-numbered LED's have their respective driving circuitry located to one side of the line of LED's and what may be called the odd-numbered LED's have their respective driving circuitry located to the other side of the line of LED's.
  • groups of, say, 64 of the odd numbered LED's (in a chip array 31 having 128 LED's arranged in a row) will have their respective driver circuitry formed in a single integrated circuit chip 40 and thus, for a printhead having 3584 LED's on the printhead, there may be 28 driver chips located on each side of the line of LED's.
  • driver chips it is desirable that they be identical.
  • the driver chips it is desirable for design simplicity that signals traversing the length of the printhead be programmably movable in either direction; see in this regard U.S. Patent 4,746,941.
  • LED chip arrays having more than 128 LED's are also known but the invention will be described with reference to those having 128 LED's.
  • the image data signals are output by the data processor 16 in accordance with image data signals for the odd-numbered LED's and image data signals for the even-numbered LED's. Discussion will now be made with regard to the image data signals for the -14- odd-numbered LED's, since operation and circuitry for driving the even-numbered LED's is identical.
  • data lines DIO - DI5 are independent lines each carrying a signal representing a digital bit (0 or 1) so that together their respective signals define a digital six bit number from decimal 0 to decimal 63.
  • This image data signal is passed along lines DIO - DI5 on the printhead which comprise an image data signal bus.
  • a data register means 24 for latching data from this bus during each cycle of operation for printing a single line of dots or pixels.
  • a token bit is used to enable a data register means associated with a particular LED to accept the data while other data register means associated with other LED's await their respective data.
  • the use of a token bit in a printer apparatus for controlling latching of multibit data is described in U.S. Patent 4,746,941.
  • the data register means 24 for each LED comprises a pair of latches 25, 26 or bi-stable multivibrators (msff - master-slave flip flops) for each of the six data lines.
  • the pair of latches are connected in a master-slave relationship wherein in response to a token bit signal at the enable input terminal of the master latch 25, an image data signal at the data input terminal of the master latch 25 will cause the output of the master latch to either change or remain the same depending upon the image data signal.
  • the six master latches 25 in the data register means of each LED are commonly connected to a line 27 to simultaneously receive the token bit signal from the token bit shift register 28.
  • the token bit shift register 28 comprises a series of flip-flops 29 which have clock pulses (SHFTCLK) applied to the clock terminals thereof and the signal representing the token bit input to the data input terminal of each.
  • each of these flip-flops 29 is connected to the data input terminal of the next flip-flop 29 in the series.
  • Buffers 31 with enable inputs and direction controls are coupled to the token bit shift register 28 so that programmable control may be made of the direction for shifting the token bit along the token bit shift register 28. In the example where the token bit is to be shifted from left to right in FIG. 4 for the
  • the signal line TDIR (token direction) is made at an appropriate logic level to allow the token bit on line LTOKEN to pass from left to right.
  • the token bit is passed from stage to stage (left to right in FIG. 4) of the token bit shift register 28 and accordingly outputted sequentially over respective lines 21 through OR gates 11 to lines 27 for enablement of all the master latches 25 of a respective data register 24.
  • the data bits occurring on lines DI0-DI5 are accepted by the data registers 24 in turn from left to right until all the 1792 data registers on this side of the printhead have acquired their respective six bits of data.
  • a latch enable signal is then pulsed low on line LLATCHN to cause the respective slave latches 26 to latch the data at their respective outputs and to reset the toggle flip-flops 22.
  • the respective outputs of the slave latches 26 are now communicated to the data input terminals Y of the respective comparators 19 for determining the duration of exposure for each LED in accordance with the techniques described above.
  • the master latches 25 are now free to receive the image data signals for the next line of dots to be recorded.
  • the comparators 19 each have at an output an AND gate 19' and a D type flip-flop 19" in order to prevent the propagation of extraneous logic glitches from the comparator outputs to the toggle flip-flop inputs.
  • each driver chip 40 the current driving circuit 23 portion of each driver chip 40 is shown.
  • the respective outputs of the toggle flip-flops 22 are fed over respective lines 45 1 , 45 3 , and the following lines not shown
  • each of these lines is actually a double line one of which carries an enable signal to turn the respective LED on and the other carries a complement of this signal.
  • the lines 45 1 are input to respective control electrodes of transistors Q 426 » 0 27 - These transistors act as switches and form a part of a current mirror driving circuit that includes a master circuit formed by transistors Q 241 Q 425 and a series of digitally controlled transistors. More details concerning the digitally controlled transistors will be found below with reference to the discussion of FIGS. 6A and 6B.
  • these digitally controlled transistors may be selectively turned on to establish a signal I (CHIP BIAS) to thereby regulate a desired current level for the LED's driven by this driver chip.
  • I CHIP BIAS
  • circuitry for driving two LED's, i.e., LED, and LEU 3 are illustrated; it being understood that the driver chip would have appropriate circuits typified by those described below for driving say 64 of the odd-numbered LED's in an LED chip array having, for example, 128 LED's. Another driver chip on the other side of the LED chip array would be used to drive the 64 even-numbered LED's.
  • the current through the master circuit establishes a potential V G1 on line 117.
  • the gate or control electrode of transistor 429 is coupled to the drain-source connection of transistors Q 426.
  • transistor Q 427 When LED, is to be turned on, transistor Q 27 is made conductive and when LED t is to be turned off, transistor Q 2 i- s ma e conductive.
  • the gate of transistor Q 426 receives a logic signal that is the inverse of that to gate Q 27 from a data driven enabling means 22 that is the circuitry of FIG. 4 which controls whether or not an LED is to be turned on and for how long. As noted above in a grey level printhead, the LED is to be turned on for a duration determined by the grey level data signals input to the printhead.
  • an additional current mirror that includes two slave circuits.
  • One slave circuit comprises transistors 0 4 20 > Q4 21 ax ⁇ & Q 30- Th* 3 other slave circuit comprises transistors 0* 221 Q 23 and Q 31 .
  • Transistors Q ⁇ o » Q ⁇ are N-channel MOSFETS while the other transistors noted above are P-channel MOSFETS.
  • the two additional slave circuits associated with LED ! are on continuously and assuming a nominal driving current of say ILED,-4 ma to LED, , the current through transistor Q 21 might be 1/80 ILED, and the current through transistor Q 423 might be 1/800 x ILED, .
  • the currents through these slave circuits establishes a voltage level V G2 on line 114, which is the potential of the drain electrode of transistor
  • transistor 0 ⁇ 6 In operation with transistor Q 29 turned off, transistor 0 ⁇ 6 is on and impresses approximately the voltage V cc at the gate of transistor Q 429 •
  • a signal is provided by the data enabling means 22 to the gate of transistor Q 427 to turn same on, while an inverse signal turns transistor Q 426 off-
  • transistor Q 427 the charge on the gate terminal of transistor Q* 29 discharges through transistors Q 27 and Q 30 • This path for discharge of the gate capacitive load at transistor 0* 2 thereby provides a turn-on time not affected by the number of LED's that are sought to be simultaneously energized.
  • each control transistor corresponding to transistor Q 29 has its own respective path for discharge of its respective capacitive load. While the illustrated embodiment shows use of the additional current mirror circuit containing transistor Q 3 o for use in discharging the control electrode of the driving transistor, it will be understood that in some circuit arrangements, charging, rather than discharging, of the control electrode may be facilitated.
  • the current through the circuit comprised of transistors Q 422 « Q 423 anc _- Q 31 is mirrored by that through the slave circuit comprised of transistors Q 420 > Q 21 and Q 430 due to the identical gate to source biasing of transistors Q 30 , Q 431 •
  • the potential difference between the gate and source terminals of transistor Q 20 remains fixed as does that of transistor Q 21 thereby establishing a voltage level V G2 on line 114 which varies with -20- V cc although the potential difference V CC -V G2 remains constant.
  • the voltage level V G2 is established at the gate of transistor 0* 2 v ⁇ a now conducting transistor Q 27 .
  • the voltage level at the source terminal of transistor Q 29 is now at a fixed threshold value above that of V G2 .
  • Transistor Q 429 acting as a cascode transistor and having its source terminal connected to the drain terminal of transistor Q 428. thereby establishes the drain potential of the transistor Q 28 as varying with changes in V cc .
  • the potential difference V G s is constant even though V cc itself varies.
  • the voltage relationships between the various terminals of transistor Q 28 are not affected by variations in V cc and the current to LED, during a period for recording a pixel stays constant.
  • transistor Q 42 conducts current to LED, for a time period controlled by the data bits for recording an appropriate pixel.
  • the level of current for recording this pixel is controlled by the current mirror which is responsive to the current level I(CHIP BIAS).
  • the circuit for generating I(CHIP BIAS) will now be described. Page missing at the time of publication
  • the LCU may calculate a new correction program based on the fall off of intensity with temperature for the LED's. This new program is then input to the PROM 16a to adjust the corrected data sent to the printhead. Note that the 65th channels on the even driver chips are also commonly connected to the input of the A/D converter 89 (FIG. 3).
  • a reading of the voltage generated by a respective 65th driver channel on say an even-numbered driver chip is determined by having a logic high signal on the DI5 line on the even side with a corresponding low level signal on the DI5 line on the odd side since logic AND gate 101 (FIG. 5) on each driver chip passes the token bit only when the respective (odd or even) DI5 line is logic high.
  • FIGS. 7-9 wherein similar numbers to that of the prior embodiment relate to similar structures.
  • image data and recording of same is handled in a similar way to that described above and is in accordance also with the description of U.S. Patent 4,746,941.
  • the next line of data is sent down the data bus D 0 -D 7 and is latched in consecutive order by the respective master-slave latch registers 24 in accordance with the presence of a token bit in a respective register.
  • the token bit is shifted down the 64-bit bidirectional token bit shift register 28 and image data on lines D 0 -D 7 is latched in a respective latch register 24. The token bit then exits the shift register and is shifted into the shift register of the next driver chip.
  • a signal from the LCU is used to generate current in the 65th driver channel.
  • the means for activation of the 65th driver channel will now be described further with reference also to FIG. 9.
  • a latch 111 coupled with the extra, or in this example the 65th, driver channel has its output enabled or say placed logic high in response to the location of the token bit in a specific stage (N) of the token bit shift register 28.
  • the output of token bit register stage N is coupled via the logic gates 186, 190 and 187, 191, respectively, to the preset and clear inputs of latch 111.
  • the outputs of all the current monitors or 65th channels of all the odd-numbered driver chips are connected in parallel to a current to voltage converter which may be similar to that described above. These outputs are multiplexed by multiplexer 106 with the similar outputs of the current monitors to the even- umbered driver chips.
  • An A/D converter 89 converts the analog signal which is also related to the temperature of that driver chip (and approximates the temperature of the LED's driven by that driver chip) to a digital signal that is communicated over appropriate lines to the LCU.
  • the LCU by keeping track of the counts of the token clock for use in shifting image data, knows which driver chip the token bit is located in and thus which driver chip's 65th channel is being activated at this time.
  • the LCU recognizes that for a certain part of the period for which a token bit is resident within a driver chip (and for which the 65th channel monitoring is activated) the monitored current input to the multiplexer 106 must be odd. For example, and with reference to FIG. 7, when the token bit is within registers #2 through #32 of the bi-directional 64 token bit shift register 28 of say driver chip #1, the LCU is programmed to consider the current monitored signal from the A/D converter 89 as representing the current in driver chip #1, even though the token bit is simultaneously also in the driver chip #2.
  • the LCU recognizes that when the token has moved 33 clock pulses into a token shift register of a driver chip (but less than 64 clock pulses) the signals generated by the A/D converter to the LCU represent current to the LED's in a driver chip that is the even-numbered driver chip of the pair of driver chips having the token bit. Additionally, a select signal is provided by the LCU to multiplexer 106, which controls which of the current signals, odd or even, is to be sent to the LCU. The overall clock token count determines which odd and even pair of driver chips the token is in. If desired, the extra current to voltage converter and analog multiplexer may be omitted as in the printhead of FIG. 3.
  • a token direction signal biases line 220 at one logic level and through inverter 221, biases line 222 at an opposite logic level.
  • Tdir biases line 220 for transmission of the token bit that travels from lef to right (Lbit) in FIG. 10.
  • the tristate inverters 31 used for transmission of the right to left going token bit are disabled.
  • the token bit is synchronized with pulses of the token clock (TCLK) and upon entering the driver chip, triggers the D input of the first token register of the token bit shift register to switch its outputs so that the Q output of the register is changed to enable the eight-bit latch 24 (FIG.
  • the current is monitored by the LCU via A/D converter 89 and in accordance with a program in the LCU the current is related to the temperature of the driver chip. This current is monitored until the token bit reaches the 32nd token register upon which event the Q output of this register resets latch 111. With movement of the token bit into the 33rd token register of driver chip #1, the LCU commences' to monitor the current in the 65 driver channel of driver chip #2 as described above. As noted above, monitoring of the current is done first in driver chip #1 and then driver chip #2. The token bit then passes into driver chips #3 and #4 for monitoring the current in these chips as well as for latching of image data for these chips on lines D 0 -D 7 .
  • FIGS. 11-13 an improvement over the circuit of FIG. 10 is illustrated wherein in addition to use of the token bit for simultaneously controlling distribution of image data and use in monitoring current on driver chip temperature, there is also provided the use of the token bit for controlling the change of digital current regulation data in the driver chip just prior to recording each line of pixel data.
  • R R E F or V REF digital current regulation data was provided during interframe or other non-production periods when no printing was occurring.
  • the digital current regulation data is provided during printing. This allows current not only to be monitored in real time but also to be changed more promptly as required.
  • a logic circuit 246 is provided in each driver chip to allow the circuit to discriminate between image data signals that control the pulsewidth time duration exposures used for recording the next row of image pixels or current regulation data signals which control the level of current to each LED activated during recording of the next row of pixels.
  • Data for adjusting R ⁇ p is provided by the LCU based upon the temperature-related current signals generated by each of the respective current drivers for the 65th current channel of each driver chip.
  • the LCU calculates a new 8-bit digital word for each driver chip to control the respective level of current in that driver chip.
  • a token bit is also generated on line Lbit and a control line labelled LD/Run is adjusted to a logic low level.
  • the line T d j r is made a logic high level so that the logic circuit 246 has the four output lines thereof at suitable logic levels to disable the tristate inverters 31 associated with the image data token registers as well as disable the register 111 for disenabling the 65th current driver circuit.
  • the Q output of this register changes to provide a load signal to the latch register 113
  • FIG. 8 for loading current regulation data carried on lines D 0 -D 7 .
  • the Q output of latch 112 is output to the Lbit input of the next driver chip so that with the next operation of the token clock, the output of Q changes. This provides the needed token pulse to the D input of the register 112 of the next driver chip.
  • the LCU at this time has also changed the current regulation data upon lines D 0 -D 7 to be appropriate for proper regulations of current in this next driver chip. Note that because there are separate data lines for odd and even-numbered driver chips, the token bit is simultaneously applied to odd and even-numbered driver chips so that current regulation data is provided simultaneously to an odd-numbered driver chip as well as to an even-numbered driver chip.
  • the LCU After respective current regulation data is distributed to all the driver chips, the LCU changes the LD/Run line to a logic high level and a new token bit is sent by the LCU to the first driver chips (odd and even) on the printhead for latching the image data signals on data bus lines D 0 -D 7 .
  • the register 111 With this token bit the register 111 will be set by the token bit to commence operation of the 65th channel current driver as described for the embodiment of FIGS. 7-9.
  • Another difference in the embodiment of FIG. 11 is the use of the first token register (rather than the second token register) to commence drive to the 65th channel current driver.
  • Other token registers may be designed for determining when the 65th channel is to be operated. It may be desirable for the LCU to have a small programmed delay as to when the LCU actually reviews the current data from the A/D converter 89 (FIG. ' 7). This delay will allow the driver current in the 65th current channel to stabilize.
  • ADVANTAGES An improved printer apparatus has been described which provides for fine control over adjustments of current to the recording elements as well as for correction of pulsewidth durations as required for temperature compensation. There is also ensured that destructive current levels will not be generated when current to the recording elements are adjusted.
  • this multibit data signal may be adjusted to correct for say the decrease in light output by the LED's driven by this driver chip due to the higher temperatures of the LED array chip driven by this driver chip.
  • the odd and even data from RIP 16 may be first modified by a correction PROM 16a before this data is sent to the printhead.
  • the correction PROM stores correction information so that an 8-bit word from RIP 16 is converted to a new 8-bit word that is corrected based on the temperature of the printhead to adjust pulsewidth duration.
  • the LCU signals the PROM as to the correction factor based on the temperature related data provided in reading the 65th driver current channels.
  • adjustability of the printhead to provide for uniformity is advantageously provided in several ways namely adjustment of current through use of current regulation data signals (V REF and/or R REF ) b using an image data bus during say an interframe to adjust a bias current I CHIP BIAS (FIGS. 6A, B, C and D) to the constant current driver circuits and by use of the adjustment to image data during production periods.
  • V REF and/or R REF current regulation data signals
  • R REF bias current regulation data signals
  • I CHIP BIAS bias current regulation data signals
  • the driver chip may also receive a global bias signal V REF that is received commonly by all driver chips.
  • This signal V REF may be analog or digital.
  • a further improvement is provided in the embodiment of FIGS. 11-13 demonstrating that data for providing further fine tune adjustment of current can be provided during each line of recording.
  • the described driver circuit retains the desirable feature of two-way addressability described in the prior art. That is, provision is made for digitally addressing each chip to correct for differences in light output by LED's driven by one chip versus those driven by another chip on the same printhead. These differences can arise due to processing condition differences arising during manufacture of the driver chips and for their respective driven LED's as well as nonuniformities arising from temperature differences.
  • a second provision for digital addressability is retained to provide for global changes due to aging. By providing both addressable portions on each driver chip problems associated with noise are minimized.
  • providing a non-digitally controlled transistor on each addressability portion simplifies calibration and allows for more accuracy in control of uniformity.
  • a temperature compensated current source 172 advantageously and promptly increases current on a real-time basis by altering current to a series of digitally addressable transistors. This provides for instantaneous changes in current levels to the LED's for providing at least some correction for temperature excursions and thus provides an additional device for complementing the main temperature control which is provided through selection of transistors in one series of digitally addressable transistors.
  • a printhead has also been described which provides efficient use of the electrical lines provided thereon.
  • Multibit image data is effectively latched into appropriate registers in accordance with a token bit.
  • Current regulation is effectively controlled using digitally addressed current regulation. Data for the image signals and current regulations are carried over the same lines, thereby reducing the need for additional lines. This reduces the number of bonding pads and connections required to be made in fabricating the printhead. While an embodiment of the invention has been described employing a single data line D15 (for say the odd-numbered driver chips) for carrying current regulating signals, it will be appreciated that multiple lines of the image data bus may be used for carrying current regulation data in parallel.
  • an LED printhead having an improved driving circuit for generating driving current to the recording elements that provides for turn-on times that are relatively independent of the number of recording elements turned on and further provides for constancy in light output by making the driving current insulated from changes in the driver voltage.
  • Modifications to the circuit may, of course, be made.
  • transistors Q425 and Q423 are used effectively as resistors and may be also eliminated.

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  • Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Health & Medical Sciences (AREA)
  • General Health & Medical Sciences (AREA)
  • Toxicology (AREA)
  • Printers Or Recording Devices Using Electromagnetic And Radiation Means (AREA)

Abstract

Imprimante sans impact comprenant une tête d'enregistrement dotée d'une pluralité d'éléments d'enregistrement (30) tels que des DEL permettant un enregistrement sur un support d'enregistrement (12). Une pluralité de puces de commande (40) est disposée sur la tête et elles comprennent chacune une pluralité de canaux conducteurs de courant destinés à commander une pluralité d'éléments d'enregistrement en fonction de signaux de données d'image respectifs. Les puces de commande (40) comprennent également chacune un canal conducteur de courant supplémentaire non associé à un élément d'enregistrement (30) afin de produire un courant apparenté à celui transmis auxdits éléments d'enregistrement. Le contrôle du courant dans le canal supplémentaire est assuré afin de permettre à des changements de courant transmis aux éléments d'enregistrement (30) et/ou à des données d'image corrigées de procédér à un réglage fin de l'uniformité des éléments d'enregistrement. Un miroir de courant à réglage numérique commande le niveau de courant transmis à chaque DEL pendant l'enregistrement. Des signaux de données de courant numérique destinés à commander ce niveau de courant sont également transmis par une des lignes du bus de données. On utilise des signaux binaires de jeton afin de réguler le verrouillage à la fois des signaux de données de courant et des signaux de données d'image dans des registres respectifs stockant les données numériques utilisées dans la régulation du courant et les données d'image utilisées dans la régulation des temps d'alimentation. Chaque puce de commande (40) comprend deux ensembles de transistors à adressage numérique. Cet agencement permet la régulation par puces individuelles de courant transmis aux DEL respectives afin de corriger la non-uniformité de la sortie de lumière de puce à puce due à des gradients de température, ainsi que la régulation de la sortie de lumière due au vieillisement de la tête d'impression. Le miroir de courant comporte un circuit pilote destiné à générer un courant de référence ainsi qu'une pluralité de circuits asservis destinés à fournir des courants de commande respectifs aux éléments d'enregistrement (30) sélectionnés pour recevoir une alimentation. Un commutateur à transistor est en série avec un élément d'enregistrement respectif (30) et peut être commuté d'un état à un autre en réponse à un signal au niveau de son électrode de commande. Chacun des circuits asservis comprend un circuit asservi supplémentaire formant un chemin de courant facilitant le changement du signal au niveau de l'électrode de commande d'un niveau de tension à un autre, par exemple en permettant à une charge capacitive au niveau de l'électrode de commande de se dissiper.
PCT/US1991/004488 1990-06-26 1991-06-25 Imprimante a reseau de del Ceased WO1992000196A1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
EP91912735A EP0487715B1 (fr) 1990-06-26 1991-06-25 Imprimante a reseau de del
DE69122718T DE69122718T2 (de) 1990-06-26 1991-06-25 Drucker mit leuchtdiodenanordnung

Applications Claiming Priority (8)

Application Number Priority Date Filing Date Title
US54350790A 1990-06-26 1990-06-26
US54389290A 1990-06-26 1990-06-26
US543,930 1990-06-26
US07/543,929 US5253934A (en) 1990-06-26 1990-06-26 L.E.D. array printer with extra driver channel
US543,507 1990-06-26
US543,892 1990-06-26
US07/543,930 US5126759A (en) 1990-06-26 1990-06-26 Non-impact printer with token bit control of data and current regulation signals
US543,929 1990-06-26

Publications (2)

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WO1992000196A1 true WO1992000196A1 (fr) 1992-01-09
WO1992000196A9 WO1992000196A9 (fr) 1995-04-13

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EP (1) EP0487715B1 (fr)
JP (1) JP3256225B2 (fr)
DE (1) DE69122718T2 (fr)
WO (1) WO1992000196A1 (fr)

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0573936A1 (fr) * 1992-06-08 1993-12-15 Eastman Kodak Company Modulateur puce à circuit intégré de tête d'impression avec circuit d'addresse de SRAM
EP0936509A3 (fr) * 1998-02-10 2000-01-05 Oki Data Corporation Circuit de commande et tête à LED avec temps constant de mise en circuit
WO2000048840A1 (fr) * 1999-02-17 2000-08-24 Matsushita Electric Industrial Co., Ltd. Dispositif de formation d'images
GB2308664B (en) * 1995-12-28 2000-11-01 Eastman Kodak Co Led printhead and driver chip for use therewith having boundary scan test architecture
EP1076880A4 (fr) * 1998-05-01 2001-11-07 Zbe Inc Procede d'enregistrement d'images numeriques sur un materiau photosensible et appareil correspondant
US7309120B2 (en) 2004-06-02 2007-12-18 Canon Kabushiki Kaisha Head substrate, printhead, head cartridge, printing apparatus, and method for inputting/outputting information
US9781800B2 (en) 2015-05-21 2017-10-03 Infineon Technologies Ag Driving several light sources
US9918367B1 (en) 2016-11-18 2018-03-13 Infineon Technologies Ag Current source regulation
US9974130B2 (en) 2015-05-21 2018-05-15 Infineon Technologies Ag Driving several light sources

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JPH11126186A (ja) 1997-10-22 1999-05-11 Sony Corp コンピュータシステム、及び記録媒体
JP3906535B2 (ja) 1997-11-07 2007-04-18 ソニー株式会社 ダウンロードシステム、及び記録媒体
JP4081858B2 (ja) 1998-06-04 2008-04-30 ソニー株式会社 コンピュータシステム、コンピュータ端末装置、及び記録媒体
JP3968875B2 (ja) 1998-06-24 2007-08-29 ソニー株式会社 ダウンロード装置、及び記録媒体
JP4194580B2 (ja) 2004-06-02 2008-12-10 キヤノン株式会社 ヘッド基板、記録ヘッド、ヘッドカートリッジ、及び記録装置
CN120315266A (zh) * 2019-08-23 2025-07-15 佳能株式会社 具有顶部发射发光设备的图像形成装置

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Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0573936A1 (fr) * 1992-06-08 1993-12-15 Eastman Kodak Company Modulateur puce à circuit intégré de tête d'impression avec circuit d'addresse de SRAM
GB2308664B (en) * 1995-12-28 2000-11-01 Eastman Kodak Co Led printhead and driver chip for use therewith having boundary scan test architecture
EP0936509A3 (fr) * 1998-02-10 2000-01-05 Oki Data Corporation Circuit de commande et tête à LED avec temps constant de mise en circuit
US6400349B1 (en) 1998-02-10 2002-06-04 Oki Data Corporation Driving circuit and LED head with constant turn-on time
EP1076880A4 (fr) * 1998-05-01 2001-11-07 Zbe Inc Procede d'enregistrement d'images numeriques sur un materiau photosensible et appareil correspondant
WO2000048840A1 (fr) * 1999-02-17 2000-08-24 Matsushita Electric Industrial Co., Ltd. Dispositif de formation d'images
US7309120B2 (en) 2004-06-02 2007-12-18 Canon Kabushiki Kaisha Head substrate, printhead, head cartridge, printing apparatus, and method for inputting/outputting information
US9781800B2 (en) 2015-05-21 2017-10-03 Infineon Technologies Ag Driving several light sources
US9974130B2 (en) 2015-05-21 2018-05-15 Infineon Technologies Ag Driving several light sources
US10321533B2 (en) 2015-05-21 2019-06-11 Infineon Technologies Ag Driving several light sources
US9918367B1 (en) 2016-11-18 2018-03-13 Infineon Technologies Ag Current source regulation

Also Published As

Publication number Publication date
JPH05501684A (ja) 1993-04-02
DE69122718D1 (de) 1996-11-21
JP3256225B2 (ja) 2002-02-12
EP0487715B1 (fr) 1996-10-16
EP0487715A1 (fr) 1992-06-03
DE69122718T2 (de) 1997-04-03

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