TWI812628B - Printed circuit board - Google Patents
Printed circuit board Download PDFInfo
- Publication number
- TWI812628B TWI812628B TW107124712A TW107124712A TWI812628B TW I812628 B TWI812628 B TW I812628B TW 107124712 A TW107124712 A TW 107124712A TW 107124712 A TW107124712 A TW 107124712A TW I812628 B TWI812628 B TW I812628B
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- TW
- Taiwan
- Prior art keywords
- metal pillar
- metal
- solder resist
- layer
- electroless plating
- Prior art date
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- 229910052751 metal Inorganic materials 0.000 claims abstract description 355
- 239000002184 metal Substances 0.000 claims abstract description 355
- 238000007772 electroless plating Methods 0.000 claims abstract description 127
- 229910000679 solder Inorganic materials 0.000 claims abstract description 124
- 230000007423 decrease Effects 0.000 claims description 14
- 238000002844 melting Methods 0.000 claims description 5
- 230000008018 melting Effects 0.000 claims description 5
- 239000010410 layer Substances 0.000 description 274
- 238000000034 method Methods 0.000 description 44
- 239000010949 copper Substances 0.000 description 21
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 16
- 229910052802 copper Inorganic materials 0.000 description 16
- 239000003822 epoxy resin Substances 0.000 description 14
- 229920000647 polyepoxide Polymers 0.000 description 14
- 238000009713 electroplating Methods 0.000 description 12
- 238000004519 manufacturing process Methods 0.000 description 12
- 239000010936 titanium Substances 0.000 description 11
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 9
- 229910052719 titanium Inorganic materials 0.000 description 9
- 238000012545 processing Methods 0.000 description 8
- 229920005989 resin Polymers 0.000 description 8
- 239000011347 resin Substances 0.000 description 8
- 238000005202 decontamination Methods 0.000 description 7
- 230000003588 decontaminative effect Effects 0.000 description 7
- 239000002893 slag Substances 0.000 description 7
- 239000000463 material Substances 0.000 description 6
- 238000011161 development Methods 0.000 description 5
- 238000005516 engineering process Methods 0.000 description 5
- 238000005530 etching Methods 0.000 description 5
- 238000000206 photolithography Methods 0.000 description 5
- 238000007747 plating Methods 0.000 description 5
- 239000002356 single layer Substances 0.000 description 5
- 235000001674 Agaricus brunnescens Nutrition 0.000 description 4
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 4
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 4
- 238000010521 absorption reaction Methods 0.000 description 4
- 238000006243 chemical reaction Methods 0.000 description 4
- 239000010931 gold Substances 0.000 description 4
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 3
- KDLHZDBZIXYQEI-UHFFFAOYSA-N Palladium Chemical compound [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 description 3
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 3
- 229910052737 gold Inorganic materials 0.000 description 3
- 239000011295 pitch Substances 0.000 description 3
- UFWIBTONFRDIAS-UHFFFAOYSA-N Naphthalene Chemical compound C1=CC=CC2=CC=CC=C21 UFWIBTONFRDIAS-UHFFFAOYSA-N 0.000 description 2
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 2
- IISBACLAFKSPIT-UHFFFAOYSA-N bisphenol A Chemical compound C=1C=C(O)C=CC=1C(C)(C)C1=CC=C(O)C=C1 IISBACLAFKSPIT-UHFFFAOYSA-N 0.000 description 2
- PXKLMJQFEQBVLD-UHFFFAOYSA-N bisphenol F Chemical compound C1=CC(O)=CC=C1CC1=CC=C(O)C=C1 PXKLMJQFEQBVLD-UHFFFAOYSA-N 0.000 description 2
- 239000011256 inorganic filler Substances 0.000 description 2
- 229910003475 inorganic filler Inorganic materials 0.000 description 2
- 238000009413 insulation Methods 0.000 description 2
- 239000000155 melt Substances 0.000 description 2
- 150000002739 metals Chemical class 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
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- 229910052757 nitrogen Inorganic materials 0.000 description 2
- 229920003986 novolac Polymers 0.000 description 2
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- 239000011574 phosphorus Substances 0.000 description 2
- 239000000377 silicon dioxide Substances 0.000 description 2
- QTWJRLJHJPIABL-UHFFFAOYSA-N 2-methylphenol;3-methylphenol;4-methylphenol Chemical compound CC1=CC=C(O)C=C1.CC1=CC=CC(O)=C1.CC1=CC=CC=C1O QTWJRLJHJPIABL-UHFFFAOYSA-N 0.000 description 1
- 239000004593 Epoxy Substances 0.000 description 1
- 239000004642 Polyimide Substances 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- 238000002835 absorbance Methods 0.000 description 1
- 239000000654 additive Substances 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- -1 and specifically Polymers 0.000 description 1
- 238000013459 approach Methods 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000005253 cladding Methods 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 229930003836 cresol Natural products 0.000 description 1
- 239000011353 cycloaliphatic epoxy resin Substances 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 229920001971 elastomer Polymers 0.000 description 1
- 239000004744 fabric Substances 0.000 description 1
- 239000000835 fiber Substances 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- LNEPOXFFQSENCJ-UHFFFAOYSA-N haloperidol Chemical compound C1CC(O)(C=2C=CC(Cl)=CC=2)CCN1CCCC(=O)C1=CC=C(F)C=C1 LNEPOXFFQSENCJ-UHFFFAOYSA-N 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 239000004843 novolac epoxy resin Substances 0.000 description 1
- 229910052763 palladium Inorganic materials 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 229920001296 polysiloxane Polymers 0.000 description 1
- 238000007639 printing Methods 0.000 description 1
- 230000002787 reinforcement Effects 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 235000012239 silicon dioxide Nutrition 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
- 229920005992 thermoplastic resin Polymers 0.000 description 1
- 229920001187 thermosetting polymer Polymers 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/115—Via connections; Lands around holes or via connections
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/4007—Surface contacts, e.g. bumps
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
- Structure Of Printed Boards (AREA)
Abstract
Description
以下說明是有關於一種印刷電路板。 The following instructions are for a printed circuit board.
近來,用於在印刷電路板上安裝晶片的凸塊已以精密的間距(pitch)形成。形成凸塊的技術有藍色模板印刷(Blue Stencil Printing;BSP)或u-ball技術,但由於該些技術中的技術限制,凸塊間距的形成受到限制。為減小凸塊間距,需要一種與傳統方法不同的方法。因此,在將凸塊形成為包括金屬柱(metal column)在內的形狀方面作出了嘗試。 Recently, bumps for mounting chips on printed circuit boards have been formed at precise pitches. Technologies for forming bumps include blue stencil printing (BSP) or u-ball technology, but due to technical limitations in these technologies, the formation of bump pitches is limited. To reduce bump pitch, a different approach than traditional methods is required. Therefore, attempts have been made to form bumps into shapes including metal columns.
韓國10-2013-0135214(2013.12.10) South Korea 10-2013-0135214(2013.12.10)
本發明的目標是提供一種包括具有極佳匹配的柱(post)的印刷電路板。 It is an object of the present invention to provide a printed circuit board including posts with excellent matching.
根據本發明的態樣,提供一種印刷電路板,所述印刷電路板包括:金屬墊,形成於絕緣層上;阻焊層,具有用於暴露出 所述金屬墊的至少一部分的開口部,且形成於所述絕緣層上;以及第一金屬柱,在所述開口部中形成於所述金屬墊上,且具有突出於所述阻焊層的表面上方的上表面,其中在所述第一金屬柱的整個側表面及下表面上形成有無電鍍覆層(electroless plating layer)。 According to an aspect of the present invention, a printed circuit board is provided. The printed circuit board includes: a metal pad formed on an insulating layer; a solder resist layer for exposing an opening of at least a portion of the metal pad formed on the insulating layer; and a first metal pillar formed on the metal pad in the opening and having a surface protruding from the solder resist layer The upper surface of the upper part has an electroless plating layer formed on the entire side surface and lower surface of the first metal pillar.
100、100”:絕緣層 100, 100”: Insulation layer
100’:核心 100’:Core
110:金屬墊 110:Metal pad
120:電路 120:Circuit
120’:最外層電路 120’: Outermost circuit
130:通孔 130:Through hole
200、200’:阻焊層 200, 200’: solder mask
210:開口部 210: opening
300:第一金屬柱 300:The first metal pillar
310、S:無電鍍覆層 310. S: electroless plating layer
400:第二金屬柱 400: Second metal pillar
500:焊球 500: Solder ball
A、B、C、D:寬度 A, B, C, D: Width
P:電鍍層 P: electroplated layer
圖1示出根據本發明實施例的印刷電路板。 Figure 1 shows a printed circuit board according to an embodiment of the invention.
圖2示出根據本發明第一實施例的印刷電路板。 Figure 2 shows a printed circuit board according to a first embodiment of the invention.
圖3示出根據本發明第二實施例的印刷電路板。 Figure 3 shows a printed circuit board according to a second embodiment of the invention.
圖4示出根據本發明第三實施例的印刷電路板。 Figure 4 shows a printed circuit board according to a third embodiment of the invention.
圖5示出根據本發明第四實施例的印刷電路板。 Figure 5 shows a printed circuit board according to a fourth embodiment of the invention.
圖6示出根據本發明第五實施例的印刷電路板。 Figure 6 shows a printed circuit board according to a fifth embodiment of the invention.
圖7至圖13是示出製造根據本發明第一實施例的印刷電路板的方法中所使用的各製程的剖視圖。 7 to 13 are cross-sectional views showing each process used in the method of manufacturing a printed circuit board according to the first embodiment of the present invention.
圖14至圖20是示出製造根據本發明第二實施例的印刷電路板的方法中所使用的各製程的剖視圖。 14 to 20 are cross-sectional views showing each process used in the method of manufacturing a printed circuit board according to the second embodiment of the present invention.
圖21至圖27是示出製造根據本發明第三實施例的印刷電路板的方法中所使用的各製程的剖視圖。 21 to 27 are cross-sectional views showing each process used in the method of manufacturing a printed circuit board according to the third embodiment of the present invention.
圖28至圖34是示出製造根據本發明第四實施例的印刷電路板的方法中所使用的各製程的剖視圖。 28 to 34 are cross-sectional views showing each process used in the method of manufacturing a printed circuit board according to the fourth embodiment of the present invention.
圖35至圖41是示出製造根據本發明第五實施例的印刷電路板的方法中所使用的各製程的剖視圖。 35 to 41 are cross-sectional views showing each process used in the method of manufacturing a printed circuit board according to the fifth embodiment of the present invention.
圖42示出根據本發明第六實施例的印刷電路板。 Figure 42 shows a printed circuit board according to a sixth embodiment of the present invention.
在所有圖式及詳細說明通篇中,相同的參考編號指代相同的元件。各圖式可能並非按比例繪製,且為清晰、示出及方便起見,可誇大圖式中的元件的相對大小、比例及繪示。 Throughout the drawings and detailed description, the same reference numbers refer to the same elements. The drawings may not be drawn to scale, and the relative sizes, proportions, and illustrations of elements in the drawings may be exaggerated for clarity, illustration, and convenience.
提供以下詳細說明是為了幫助讀者獲得對本文中所述方法、設備及/或系統的全面理解。然而,對於此項技術中具有通常知識者而言,本文中所述方法、設備及/或系統的各種改變、潤飾及等效形式將顯而易見。本文中所述操作順序僅為實例,且並非僅限於本文中所提及的該些操作順序,而是如對於此項技術中具有通常知識者而言將顯而易見,除必定以特定次序出現的操作以外,均可有所改變。此外,為提高清晰性及明確性,可省略對對於此項技術中具有通常知識者而言眾所習知的功能及構造的說明。 The following detailed description is provided to assist the reader in obtaining a comprehensive understanding of the methods, apparatus, and/or systems described herein. However, various modifications, modifications, and equivalents of the methods, apparatus, and/or systems described herein will be apparent to those of ordinary skill in the art. The sequences of operations described herein are examples only, and are not limited to those mentioned herein, but as will be apparent to one of ordinary skill in the art, except for operations that necessarily occur in a specific order. Other than that, it can be changed. In addition, descriptions of functions and constructions that are well known to those of ordinary skill in the art may be omitted to enhance clarity and clarity.
本文中所述特徵可被實施為不同形式,且不應被解釋為僅限於本文中所述實例。確切而言,提供本文中所述實例是為了使此揭露內容將透徹及完整,並將向此項技術中具有通常知識者傳達本發明的全部範圍。 Features described herein may be implemented in different forms and should not be construed as limited to the examples set forth herein. Rather, the examples described herein are provided so that this disclosure will be thorough and complete, and will convey the full scope of the invention to those skilled in the art.
除非另有定義,否則本文中所使用的全部用語(包括技 術用語及科學用語)的含義均與其被本發明所屬技術中具有通常知識者所通常理解的含義相同。在常用字典中所定義的任何用語應被解釋為具有與在相關技術的上下文中的含義相同的含義,且除非另有明確定義,否則不應將其解釋為具有理想化或過於正式的含義。 Unless otherwise defined, all terms used in this article (including technical The meanings of technical terms and scientific terms) are the same as those commonly understood by those with ordinary knowledge in the art to which this invention belongs. Any term defined in a commonly used dictionary shall be construed to have the same meaning as in the context of the relevant technology and shall not be construed to have an idealized or overly formal meaning unless otherwise expressly defined.
無論圖號如何,將對相同的或對應的組件給定相同的參考編號,且將不再對相同的或對應的組件予以贅述。在本發明的說明通篇中,當闡述特定相關傳統技術確定與本發明的觀點無關時,將省略有關詳細說明。在闡述各種組件時可使用例如「第一(first)」及「第二(second)」等用語,但以上組件不應僅限於以上用語。以上用語僅用於區分各個組件。在附圖中,可誇大、省略或簡要示出一些組件,且組件的尺寸未必反映該些組件的實際尺寸。 Regardless of the figure number, the same or corresponding components will be given the same reference numbers and will not be described again. Throughout the description of the present invention, when specific related conventional techniques are described that are determined to be irrelevant to the viewpoint of the present invention, the relevant detailed description will be omitted. Terms such as "first" and "second" may be used when describing various components, but the above components should not be limited to the above terms. The above terms are only used to distinguish between the various components. In the drawings, some components may be exaggerated, omitted, or simplified, and the sizes of components do not necessarily reflect the actual sizes of the components.
在下文中,將參照附圖來詳細闡述本發明的特定實施例。 Hereinafter, specific embodiments of the invention will be explained in detail with reference to the accompanying drawings.
圖1示出根據本發明實施例的印刷電路板。 Figure 1 shows a printed circuit board according to an embodiment of the invention.
參照圖1,根據本發明實施例的印刷電路板包括絕緣層100、金屬墊110、阻焊層200及第一金屬柱300。印刷電路板可更包括第二金屬柱400。 Referring to FIG. 1 , a printed circuit board according to an embodiment of the present invention includes an insulating layer 100 , a metal pad 110 , a solder resist layer 200 and a first metal pillar 300 . The printed circuit board may further include second metal pillars 400 .
印刷電路板可以多個層形成。印刷電路板可以包括位於印刷電路板的中心處的核心100’以及形成於所述核心100’上方及下方的絕緣層100及100”的構成層(build-up layer)形成。第一金屬柱300及第二金屬柱400形成於層疊(laminated)於核心100’ 的上方的絕緣層100上,且第一金屬柱300及第二金屬柱400上安裝有例如晶片等組件。例如焊球500等添加劑形成於層疊於核心100’的下方的絕緣層100”之下,且印刷電路板與主板被結合於一起。 Printed circuit boards can be formed in multiple layers. The printed circuit board may be formed by a build-up layer including a core 100' located at the center of the printed circuit board and insulating layers 100 and 100" formed above and below the core 100'. The first metal pillar 300 and the second metal pillar 400 is formed laminated on the core 100' On the insulating layer 100 above, components such as chips are mounted on the first metal pillar 300 and the second metal pillar 400 . Additives such as solder balls 500 are formed under the insulating layer 100" laminated below the core 100' and the printed circuit board and motherboard are bonded together.
印刷電路板可為不具有核心的無核心基板。此外,在此種情形中,在位於印刷電路板的最上層上的絕緣層上形成有金屬柱以安裝晶片,且在位於印刷電路板的最下層上的絕緣層上形成有焊球以結合至主板。 The printed circuit board may be a coreless substrate without a core. Furthermore, in this case, metal pillars are formed on the insulating layer located on the uppermost layer of the printed circuit board to mount the chip, and solder balls are formed on the insulating layer located on the lowermost layer of the printed circuit board to bond to motherboard.
核心100’及/或絕緣層100可由例如樹脂等絕緣材料形成,且呈薄板狀。核心100’的樹脂及/或絕緣層100的樹脂可為例如熱固性樹脂、熱塑性樹脂等各種材料,且具體而言可為環氧樹脂(epoxy resin)或聚醯亞胺(polyimide)。環氧樹脂的實例包括萘環氧樹脂(naphthalene epoxy resin)、雙酚A型環氧樹脂(bisphenol A type epoxy resin)、雙酚F型環氧樹脂(bisphenol F type epoxy resin)、酚醛清漆環氧樹脂(novolac epoxy resin)、甲酚酚醛清漆環氧樹脂(cresol novolak epoxy resin)、橡膠改質環氧樹脂(rubber modified epoxy resin)、脂環族環氧樹脂(cycloaliphatic epoxy resin)、矽系環氧樹脂(silicon-based epoxy resin)、氮系環氧樹脂(nitrogen-based epoxy resin)、磷系環氧樹脂(phosphorus-based epoxy resin)等。然而,其並非僅限於此。 The core 100' and/or the insulating layer 100 may be formed of an insulating material such as resin, and may be in a thin plate shape. The resin of the core 100' and/or the resin of the insulating layer 100 may be various materials such as thermosetting resin, thermoplastic resin, and specifically, epoxy resin or polyimide. Examples of epoxy resins include naphthalene epoxy resin, bisphenol A type epoxy resin, bisphenol F type epoxy resin, novolac epoxy Novolac epoxy resin, cresol novolak epoxy resin, rubber modified epoxy resin, cycloaliphatic epoxy resin, silicone epoxy Resin (silicon-based epoxy resin), nitrogen-based epoxy resin (nitrogen-based epoxy resin), phosphorus-based epoxy resin (phosphorus-based epoxy resin), etc. However, it is not limited to this.
核心100’及/或絕緣層100可為例如將玻璃布(glass cloth)等纖維加強材料(fiber reinforcement material)包含於樹脂 中的預浸體(prepreg,PPG)。絕緣層100可為例如利用二氧化矽(silica)等無機填料填充樹脂的構成膜(build-up film)。可使用味之素構成膜(Ajinomoto Build-up Film,ABF)等作為此種構成膜。 The core 100' and/or the insulating layer 100 may be, for example, fiber reinforcement material such as glass cloth contained in resin. Prepreg (PPG) in . The insulating layer 100 may be, for example, a build-up film filled with resin using an inorganic filler such as silica. Ajinomoto Build-up Film (ABF) or the like can be used as such a build-up film.
絕緣層100可以多個層形成。在每一絕緣層100中形成有電路120。電路120是被圖案化以傳輸電性訊號的導體。電路120可經由通孔130進行電性連接。最上絕緣層100上形成有最外層電路120’且最外層電路120’經由通孔130電性連接至另一電路120。此種最外層電路120’的位置並無限制,且最外層電路120’的一部分可位於隨後欲闡述的多個第一金屬柱300之間。 The insulating layer 100 may be formed in multiple layers. A circuit 120 is formed in each insulating layer 100 . Circuit 120 is a conductor patterned to transmit electrical signals. The circuit 120 may be electrically connected via the via 130 . An outermost circuit 120' is formed on the uppermost insulating layer 100, and the outermost circuit 120' is electrically connected to another circuit 120 through a through hole 130. The location of the outermost circuit 120' is not limited, and a part of the outermost circuit 120' may be located between a plurality of first metal pillars 300 to be described later.
電路120及最外層電路120’可由例如銅(Cu)、鈀(Pd)、鋁(Al)、鎳(Ni)、鈦(Ti)、金(Au)、鈦(Pt)、或其合金等金屬形成。 The circuit 120 and the outermost circuit 120' may be made of metals such as copper (Cu), palladium (Pd), aluminum (Al), nickel (Ni), titanium (Ti), gold (Au), titanium (Pt), or alloys thereof. form.
金屬墊110可形成於最外層電路120’的端部處(end part)且可具有較最外層電路120’的寬度大的寬度。金屬墊110可形成於通孔130上且電性連接至形成於另一層中的電路120。 The metal pad 110 may be formed at an end part of the outermost circuit 120' and may have a width larger than that of the outermost circuit 120'. Metal pad 110 may be formed on via 130 and electrically connected to circuit 120 formed in another layer.
阻焊層200形成於絕緣層100上且具有用於暴露出金屬墊110的至少一部分的開口部210(如後續圖7所示)。亦即,阻焊層200的開口部210形成於金屬墊110上,且金屬墊110經由開口部210暴露出的區域的寬度可小於金屬墊110的寬度。在此種情形中,隨後將闡述的第一金屬柱300的下部寬度小於金屬墊110的寬度。 The solder resist layer 200 is formed on the insulating layer 100 and has an opening 210 for exposing at least a part of the metal pad 110 (as shown in subsequent FIG. 7 ). That is, the opening 210 of the solder resist layer 200 is formed on the metal pad 110 , and the width of the area of the metal pad 110 exposed through the opening 210 may be smaller than the width of the metal pad 110 . In this case, the width of the lower portion of the first metal pillar 300 , which will be explained later, is smaller than the width of the metal pad 110 .
阻焊層200可為含有例如二氧化矽等無機填料的感光性 樹脂,且所述感光性樹脂可為環氧樹脂。然而,所述材料並不限於該些材料,且可使用在印刷電路板中使用的常用材料中的任一者。 The solder resist layer 200 may be a photosensitive material containing inorganic fillers such as silicon dioxide. Resin, and the photosensitive resin may be epoxy resin. However, the materials are not limited to these materials, and any of commonly used materials used in printed circuit boards may be used.
阻焊層200可為正型(positive type)或負型(negative type),且以下說明主要闡述負型,但並不排除正型。 The solder resist layer 200 may be a positive type or a negative type, and the following description mainly describes the negative type, but does not exclude the positive type.
在印刷電路板中,阻焊層200’亦層疊於在核心100’的下部上層疊的絕緣層100”之下。 In the printed circuit board, the solder mask layer 200' is also laminated under the insulating layer 100" laminated on the lower part of the core 100'.
第一金屬柱300是在阻焊層200的開口部210中形成於金屬墊110上的柱狀金屬。第一金屬柱300用於安裝組件,且可形成多個。 The first metal pillar 300 is a pillar-shaped metal formed on the metal pad 110 in the opening 210 of the solder resist layer 200 . The first metal pillar 300 is used to install components, and can be formed in plurality.
第一金屬柱300的上表面突出於阻焊層200的表面(上表面)上方。亦即,阻焊層200被形成為低於第一金屬柱300。 The upper surface of the first metal pillar 300 protrudes above the surface (upper surface) of the solder resist layer 200 . That is, the solder resist layer 200 is formed lower than the first metal pillar 300 .
第一金屬柱300可不接觸阻焊層200的表面(上表面)。第一金屬柱300相對於阻焊層200的表面的側斜率(side slope)大於零度。亦即,第一金屬柱300的側表面不具有其中相對於阻焊層200的表面的斜率變為零的區段(與阻焊層200的表面平行的區段)。 The first metal pillar 300 may not contact the surface (upper surface) of the solder resist layer 200 . The side slope of the first metal pillar 300 relative to the surface of the solder resist layer 200 is greater than zero degrees. That is, the side surface of the first metal pillar 300 does not have a section in which the slope with respect to the surface of the solder resist 200 becomes zero (a section parallel to the surface of the solder resist 200 ).
第一金屬柱300的整個側表面及下表面上形成無電鍍覆層310。亦即,無電鍍覆層310形成於第一金屬柱300的整個外圓周表面上,且無電鍍覆層310亦形成於第一金屬柱300的下表面上。 An electroless plating layer 310 is formed on the entire side surface and lower surface of the first metal pillar 300 . That is, the electroless plating layer 310 is formed on the entire outer circumferential surface of the first metal pillar 300 , and the electroless plating layer 310 is also formed on the lower surface of the first metal pillar 300 .
形成於第一金屬柱300的側表面上的無電鍍覆層310接 觸阻焊層200。因此,阻焊層200的開口部210在阻焊層200的表面上的寬度(面積)等於包括無電鍍覆層310的第一金屬柱300的寬度(面積)。 The electroless plating layer 310 formed on the side surface of the first metal pillar 300 is connected to Contact solder resist layer 200. Therefore, the width (area) of the opening portion 210 of the solder resist layer 200 on the surface of the solder resist layer 200 is equal to the width (area) of the first metal pillar 300 including the electroless plating layer 310 .
在第一金屬柱300的下表面上形成的無電鍍覆層310形成於金屬墊110的上表面上。亦即,無電鍍覆層310形成於第一金屬柱300與金屬墊110之間。此處,第一金屬柱300可以無電鍍覆層310為引入線(lead-in wire)而由電鍍層形成。 The electroless plating layer 310 formed on the lower surface of the first metal pillar 300 is formed on the upper surface of the metal pad 110 . That is, the electroless plating layer 310 is formed between the first metal pillar 300 and the metal pad 110 . Here, the first metal pillar 300 may be formed of an electroplating layer with the electroless plating layer 310 being a lead-in wire.
第一金屬柱300突出超過阻焊層200。由於無電鍍覆層310形成於第一金屬柱300的整個側表面上,因此形成於第一金屬柱300的側表面上的無電鍍覆層310暴露於外部。 The first metal pillar 300 protrudes beyond the solder resist layer 200 . Since the electroless plating layer 310 is formed on the entire side surface of the first metal pillar 300, the electroless plating layer 310 formed on the side surface of the first metal pillar 300 is exposed to the outside.
無電鍍覆層310可由與第一金屬柱300相同的金屬形成。舉例而言,第一金屬柱300與無電鍍覆層310二者均可由銅(Cu)形成。另一方面,無電鍍覆層310未必一定由與第一金屬柱300相同的金屬形成,而是可以兩個層形成。無電鍍覆層310可由包括與第一金屬柱300相同的金屬在內的金屬以兩個層形成。舉例而言,第一金屬柱300可由銅(Cu)形成,且無電鍍覆層310可由鈦(Ti)層與銅(Cu)層所構成的兩層式結構形成。此處,鈦的無電鍍覆層310可形成於最外層上且可暴露於外部。然而,其不排除無電鍍覆層310的最外層上形成有銅(Cu)層的情形。 The electroless plating layer 310 may be formed of the same metal as the first metal pillar 300 . For example, both the first metal pillar 300 and the electroless plating layer 310 may be formed of copper (Cu). On the other hand, the electroless plating layer 310 is not necessarily formed of the same metal as the first metal pillar 300, but may be formed of two layers. The electroless plating layer 310 may be formed of metal including the same metal as the first metal pillar 300 in two layers. For example, the first metal pillar 300 may be formed of copper (Cu), and the electroless plating layer 310 may be formed of a two-layer structure composed of a titanium (Ti) layer and a copper (Cu) layer. Here, the electroless plating layer 310 of titanium may be formed on the outermost layer and may be exposed to the outside. However, it does not exclude the case where a copper (Cu) layer is formed on the outermost layer of the electroless plating layer 310 .
無電鍍覆層310是藉由無電鍍覆形成且可形成為具有2微米(μm)或小於2微米的厚度。 The electroless plating layer 310 is formed by electroless plating and may be formed to have a thickness of 2 micrometers (μm) or less.
第一金屬柱300上可形成有第二金屬柱400。形成第二金屬柱400的金屬的熔點低於形成第一金屬柱300的金屬的熔點。舉例而言,第一金屬柱300可由銅形成且第二金屬柱400可由錫(Sn)形成。 A second metal pillar 400 may be formed on the first metal pillar 300 . The melting point of the metal forming the second metal pillar 400 is lower than the melting point of the metal forming the first metal pillar 300 . For example, the first metal pillar 300 may be formed of copper and the second metal pillar 400 may be formed of tin (Sn).
第二金屬柱400用於使第一金屬柱300與組件結合。第二金屬柱400是由熔點相對較第一金屬柱300低的金屬形成,以使第二金屬柱400在迴焊製程(reflow process)中在第一金屬柱300熔化之前熔化。 The second metal pillar 400 is used to combine the first metal pillar 300 with the component. The second metal pillar 400 is formed of a metal with a relatively lower melting point than the first metal pillar 300 , so that the second metal pillar 400 melts before the first metal pillar 300 melts during the reflow process.
第二金屬柱400可藉由鍍覆而形成為具有較第一金屬柱300薄的厚度。藉由迴焊製程,第二金屬柱400向左右流動,且第二金屬柱400的上表面可為朝上凸出的彎曲表面。 The second metal pillar 400 may be formed by plating to have a thickness thinner than that of the first metal pillar 300 . Through the reflow process, the second metal pillar 400 flows left and right, and the upper surface of the second metal pillar 400 can be an upwardly convex curved surface.
在下文中,將根據第一金屬柱300的形狀及第二金屬柱400的位置來闡述第一實施例至第五實施例。圖2至圖41中示出位於印刷電路板的最上層上的絕緣層100,且省略了形成於絕緣層100之下的層。 In the following, the first to fifth embodiments will be explained according to the shape of the first metal pillar 300 and the position of the second metal pillar 400 . The insulating layer 100 on the uppermost layer of the printed circuit board is shown in FIGS. 2 to 41 , and layers formed below the insulating layer 100 are omitted.
圖2示出根據本發明第一實施例的印刷電路板。 Figure 2 shows a printed circuit board according to a first embodiment of the invention.
參照圖2,在根據第一實施例的印刷電路板中,第一金屬柱300的橫截面積(area)自第一金屬柱300的上表面至第一金屬柱300的下表面實質上恆定不變。第一金屬柱300的寬度亦自第一金屬柱300的上表面至第一金屬柱300的下表面實質上恆定不變。此處,「實質上恆定不變」意指所述寬度在包括容差(tolerance)的條件下恆定不變。第一金屬柱300可形成為圓柱形或多邊形。 Referring to FIG. 2 , in the printed circuit board according to the first embodiment, the cross-sectional area (area) of the first metal pillar 300 is substantially constant from the upper surface of the first metal pillar 300 to the lower surface of the first metal pillar 300 . change. The width of the first metal pillar 300 is also substantially constant from the upper surface of the first metal pillar 300 to the lower surface of the first metal pillar 300 . Here, "substantially constant" means that the width is constant including tolerance. The first metal pillar 300 may be formed in a cylindrical shape or a polygonal shape.
當A是金屬墊110的寬度,B是第一金屬柱300在阻焊層200的表面上的寬度,C是第一金屬柱300的上表面的寬度,且D是第一金屬柱300的下表面的寬度時,以下公式成立,且即使當以面積替換寬度時亦成立。 When A is the width of the metal pad 110 , B is the width of the first metal pillar 300 on the surface of the solder resist layer 200 , C is the width of the upper surface of the first metal pillar 300 , and D is the lower surface of the first metal pillar 300 The following formula holds for the width of a surface, and holds true even when width is replaced by area.
A>B=C=D A>B=C=D
若B、C及D中包括無電鍍覆層310的厚度,則以下公式可成立。 If B, C and D include the thickness of the electroless plating layer 310, the following formula can be established.
第二金屬柱400形成於第一金屬柱300上,且形成於第一金屬柱300的側表面上的無電鍍覆層310延伸至第二金屬柱400的側表面。然而,形成於第一金屬柱300的側表面上的無電鍍覆層310可覆蓋第二金屬柱400的側表面的至少一部分。亦即,如圖2中所示,形成於第一金屬柱300的側表面上的無電鍍覆層310可覆蓋第二金屬柱400的側表面的僅一部分。在此種情形中,第二金屬柱400的一部分位於無電鍍覆層310上方,以使第二金屬柱400突出超過無電鍍覆層310。此處,第二金屬柱400具有蘑菇形。 The second metal pillar 400 is formed on the first metal pillar 300 , and the electroless plating layer 310 formed on the side surface of the first metal pillar 300 extends to the side surface of the second metal pillar 400 . However, the electroless plating layer 310 formed on the side surface of the first metal pillar 300 may cover at least a part of the side surface of the second metal pillar 400 . That is, as shown in FIG. 2 , the electroless plating layer 310 formed on the side surface of the first metal pillar 300 may cover only a portion of the side surface of the second metal pillar 400 . In this case, a portion of the second metal pillar 400 is located above the electroless plating layer 310 so that the second metal pillar 400 protrudes beyond the electroless plating layer 310 . Here, the second metal pillar 400 has a mushroom shape.
作為另一選擇,形成於第一金屬柱300的側表面上的無電鍍覆層310可覆蓋第二金屬柱400的整個側表面。在此種情形中,第二金屬柱400可不突出超過形成於金屬柱300的側表面上的無電鍍覆層310。 Alternatively, the electroless plating layer 310 formed on the side surface of the first metal pillar 300 may cover the entire side surface of the second metal pillar 400 . In this case, the second metal pillar 400 may not protrude beyond the electroless plating layer 310 formed on the side surface of the metal pillar 300 .
圖3示出根據本發明第二實施例的印刷電路板。 Figure 3 shows a printed circuit board according to a second embodiment of the invention.
參照圖3,在根據第二實施例的印刷電路板中,第一金屬柱300的橫截面積自第一金屬柱300的上表面至第一金屬柱300的下表面變小。第一金屬柱300的寬度亦自第一金屬柱300的上表面至第一金屬柱300的下表面變小。第一金屬柱300的截面可為倒梯形柱。在此種情形中,組件安裝區域被擴寬以使得能夠達成穩定的組件安裝。 Referring to FIG. 3 , in the printed circuit board according to the second embodiment, the cross-sectional area of the first metal pillar 300 becomes smaller from the upper surface of the first metal pillar 300 to the lower surface of the first metal pillar 300 . The width of the first metal pillar 300 also becomes smaller from the upper surface of the first metal pillar 300 to the lower surface of the first metal pillar 300 . The cross section of the first metal pillar 300 may be an inverted trapezoidal pillar. In this case, the component mounting area is widened so that stable component mounting can be achieved.
當A是金屬墊110的寬度,B是第一金屬柱300在阻焊層200的表面上的寬度,C是第一金屬柱300的上表面的寬度,且D是第一金屬柱300的下表面的寬度時,以下公式可成立,且即使以面積替換寬度時亦成立。 When A is the width of the metal pad 110 , B is the width of the first metal pillar 300 on the surface of the solder resist layer 200 , C is the width of the upper surface of the first metal pillar 300 , and D is the lower surface of the first metal pillar 300 The following formula holds true for the width of a surface, and it holds true even when width is replaced by area.
C>B>D,A>D C>B>D,A>D
A與C之間的關係並無限制,所以A=C、A<C或A>C。 There is no restriction on the relationship between A and C, so A=C, A<C or A>C.
即使以上B、C及D中包括無電鍍覆層310的厚度,公式仍一樣。 Even if the thickness of the electroless plating layer 310 is included in B, C, and D above, the formula remains the same.
第二金屬柱400形成於第一金屬柱300上,且形成於第一金屬柱300的側表面上的無電鍍覆層310延伸至第二金屬柱400的側表面。然而,形成於第一金屬柱300的側表面上的無電鍍覆層310可覆蓋第二金屬柱400的側表面的至少一部分。亦即,如圖3中所示,形成於第一金屬柱300的側表面上的無電鍍覆層310可覆蓋第二金屬柱400的側表面的僅一部分。在此種情形中,第二金屬柱400的一部分位於無電鍍覆層310上方,以使第二金屬柱400突出超過無電鍍覆層310。此處,第二金屬柱400具有蘑菇 形。 The second metal pillar 400 is formed on the first metal pillar 300 , and the electroless plating layer 310 formed on the side surface of the first metal pillar 300 extends to the side surface of the second metal pillar 400 . However, the electroless plating layer 310 formed on the side surface of the first metal pillar 300 may cover at least a part of the side surface of the second metal pillar 400 . That is, as shown in FIG. 3 , the electroless plating layer 310 formed on the side surface of the first metal pillar 300 may cover only a part of the side surface of the second metal pillar 400 . In this case, a portion of the second metal pillar 400 is located above the electroless plating layer 310 so that the second metal pillar 400 protrudes beyond the electroless plating layer 310 . Here, the second metal pillar 400 has a mushroom shape.
作為另一選擇,形成於第一金屬柱300的側表面上的無電鍍覆層310可覆蓋第二金屬柱400的整個側表面。在此種情形中,第二金屬柱400可不突出超過形成於金屬柱300的側表面上的無電鍍覆層310。 Alternatively, the electroless plating layer 310 formed on the side surface of the first metal pillar 300 may cover the entire side surface of the second metal pillar 400 . In this case, the second metal pillar 400 may not protrude beyond the electroless plating layer 310 formed on the side surface of the metal pillar 300 .
圖4示出根據本發明第三實施例的印刷電路板。 Figure 4 shows a printed circuit board according to a third embodiment of the invention.
參照圖4,在根據第三實施例的印刷電路板中,第一金屬柱300的橫截面積自第一金屬柱300的上表面至第一金屬柱300的下表面增大。第一金屬柱300的寬度亦自第一金屬柱300的上表面至第一金屬柱300的下表面增大。第一金屬柱300的截面可為梯形柱。在此種情形中,第一金屬柱300與金屬墊110之間的結合面積增大而使得能夠達成穩定的結合。 Referring to FIG. 4 , in the printed circuit board according to the third embodiment, the cross-sectional area of the first metal pillar 300 increases from the upper surface of the first metal pillar 300 to the lower surface of the first metal pillar 300 . The width of the first metal pillar 300 also increases from the upper surface of the first metal pillar 300 to the lower surface of the first metal pillar 300 . The cross section of the first metal pillar 300 may be a trapezoidal pillar. In this case, the bonding area between the first metal pillar 300 and the metal pad 110 is increased so that a stable bonding can be achieved.
當A是金屬墊110的寬度,B是第一金屬柱300在阻焊層200的表面上的寬度,C是第一金屬柱300的上表面的寬度,且D是第一金屬柱300的下表面的寬度時,以下公式可成立,且即使以面積替換寬度時亦成立。 When A is the width of the metal pad 110 , B is the width of the first metal pillar 300 on the surface of the solder resist layer 200 , C is the width of the upper surface of the first metal pillar 300 , and D is the lower surface of the first metal pillar 300 The following formula holds true for the width of a surface, and it holds true even when width is replaced by area.
A>D>B>C A>D>B>C
即使以上B、C及D中包括無電鍍覆層310的厚度,公式仍一樣。 Even if the thickness of the electroless plating layer 310 is included in B, C, and D above, the formula remains the same.
AD>B>C A D>B>C
第二金屬柱400形成於第一金屬柱300上,且形成於第一金屬柱300的側表面上的無電鍍覆層310延伸至第二金屬柱400 的側表面。然而,形成於第一金屬柱300的側表面上的無電鍍覆層310可覆蓋第二金屬柱400的側表面的至少一部分。亦即,如圖4中所示,形成於第一金屬柱300的側表面上的無電鍍覆層310可覆蓋第二金屬柱400的側表面的僅一部分。在此種情形中,第二金屬柱400的一部分位於無電鍍覆層310上方,以使第二金屬柱400突出超過無電鍍覆層310。此處,第二金屬柱400具有蘑菇形。 The second metal pillar 400 is formed on the first metal pillar 300 , and the electroless plating layer 310 formed on the side surface of the first metal pillar 300 extends to the second metal pillar 400 side surface. However, the electroless plating layer 310 formed on the side surface of the first metal pillar 300 may cover at least a part of the side surface of the second metal pillar 400 . That is, as shown in FIG. 4 , the electroless plating layer 310 formed on the side surface of the first metal pillar 300 may cover only a portion of the side surface of the second metal pillar 400 . In this case, a portion of the second metal pillar 400 is located above the electroless plating layer 310 so that the second metal pillar 400 protrudes beyond the electroless plating layer 310 . Here, the second metal pillar 400 has a mushroom shape.
作為另一選擇,形成於第一金屬柱300的側表面上的無電鍍覆層310可覆蓋第二金屬柱400的整個側表面。在此種情形中,第二金屬柱400可不突出超過形成於金屬柱300的側表面上的無電鍍覆層310。 Alternatively, the electroless plating layer 310 formed on the side surface of the first metal pillar 300 may cover the entire side surface of the second metal pillar 400 . In this case, the second metal pillar 400 may not protrude beyond the electroless plating layer 310 formed on the side surface of the metal pillar 300 .
圖5示出根據本發明第四實施例的印刷電路板。 Figure 5 shows a printed circuit board according to a fourth embodiment of the invention.
參照圖5,在根據第四實施例的印刷電路板中,第一金屬柱300的橫截面積自第一金屬柱300的上表面至第一金屬柱300的下表面增大並接著減小。第一金屬柱300的寬度亦自第一金屬柱300的上表面至第一金屬柱300的下表面增大並接著減小。此處,在阻焊層200的表面上,第一金屬柱300的橫截面積(寬度)的增大及減小可有所變化。亦即,第一金屬柱300的橫截面積(寬度)自第一金屬柱300的上表面至阻焊層200的表面增大,並接著自阻焊層200的表面至第一金屬柱300的下表面減小。 Referring to FIG. 5 , in the printed circuit board according to the fourth embodiment, the cross-sectional area of the first metal pillar 300 increases from the upper surface of the first metal pillar 300 to the lower surface of the first metal pillar 300 and then decreases. The width of the first metal pillar 300 also increases from the upper surface of the first metal pillar 300 to the lower surface of the first metal pillar 300 and then decreases. Here, on the surface of the solder resist layer 200, the cross-sectional area (width) of the first metal pillar 300 may increase and decrease. That is, the cross-sectional area (width) of the first metal pillar 300 increases from the upper surface of the first metal pillar 300 to the surface of the solder resist layer 200 , and then increases from the surface of the solder resist layer 200 to the surface of the first metal pillar 300 The lower surface is reduced.
然而,第一金屬柱300的橫截面(寬度)從增大至減小的變化不一定須發生在阻焊層200的表面上。變化點(第一金屬 柱300的橫截面積(寬度)的增大/減小出現變化的點)可高於或低於阻焊層200的表面。 However, the change in the cross-section (width) of the first metal pillar 300 from increasing to decreasing does not necessarily occur on the surface of the solder resist layer 200 . change point(first metal The point at which the increase/decrease in cross-sectional area (width) of pillar 300 occurs) may be above or below the surface of solder mask 200 .
在此實施例中,可在實施第一金屬柱300的精密間距的同時確保第一金屬柱300的體積。 In this embodiment, the volume of the first metal pillars 300 can be ensured while implementing precise spacing of the first metal pillars 300 .
當A是金屬墊110的寬度,B是第一金屬柱300在阻焊層200的表面上的寬度,C是第一金屬柱300的上表面的寬度,且D是第一金屬柱300的下表面的寬度時,以下公式可成立,且即使以面積替換寬度時亦成立。 When A is the width of the metal pad 110 , B is the width of the first metal pillar 300 on the surface of the solder resist layer 200 , C is the width of the upper surface of the first metal pillar 300 , and D is the lower surface of the first metal pillar 300 The following formula holds true for the width of a surface, and it holds true even when width is replaced by area.
B>C,B>D B>C,B>D
第一金屬柱300在變化點處的寬度可等於或大於金屬墊110的寬度。亦即,B>A。 The width of the first metal pillar 300 at the change point may be equal to or greater than the width of the metal pad 110 . That is, B>A.
第一金屬柱300可在上表面上具有橫截面積的最小值。亦即,B>D>C。 The first metal pillar 300 may have a minimum cross-sectional area on the upper surface. That is, B>D>C.
即使B、C及D中包括無電鍍覆層310的厚度,以上公式仍一樣。 Even if B, C, and D include the thickness of the electroless plating layer 310, the above formula remains the same.
若阻焊層200的表面上存在變化點,則B是第一金屬柱在阻焊層200的表面上的寬度。 If there is a change point on the surface of the solder resist layer 200 , B is the width of the first metal pillar on the surface of the solder resist layer 200 .
第二金屬柱400形成於第一金屬柱300上,且形成於第一金屬柱300的側表面上的無電鍍覆層310延伸至第二金屬柱400的側表面。然而,形成於第一金屬柱300的側表面上的無電鍍覆層310可覆蓋第二金屬柱400的側表面的至少一部分。亦即,如圖5中所示,形成於第一金屬柱300的側表面上的無電鍍覆層310 可覆蓋第二金屬柱400的側表面的僅一部分。在此種情形中,第二金屬柱400的一部分位於無電鍍覆層310上方,以使第二金屬柱400突出超過無電鍍覆層310。此處,第二金屬柱400具有蘑菇形。 The second metal pillar 400 is formed on the first metal pillar 300 , and the electroless plating layer 310 formed on the side surface of the first metal pillar 300 extends to the side surface of the second metal pillar 400 . However, the electroless plating layer 310 formed on the side surface of the first metal pillar 300 may cover at least a part of the side surface of the second metal pillar 400 . That is, as shown in FIG. 5 , the electroless plating layer 310 formed on the side surface of the first metal pillar 300 Only a portion of the side surface of the second metal pillar 400 may be covered. In this case, a portion of the second metal pillar 400 is located above the electroless plating layer 310 so that the second metal pillar 400 protrudes beyond the electroless plating layer 310 . Here, the second metal pillar 400 has a mushroom shape.
作為另一選擇,形成於第一金屬柱300的側表面上的無電鍍覆層310可覆蓋第二金屬柱400的整個側表面。在此種情形中,第二金屬柱400可不突出超過形成於金屬柱300的側表面上的無電鍍覆層310。 Alternatively, the electroless plating layer 310 formed on the side surface of the first metal pillar 300 may cover the entire side surface of the second metal pillar 400 . In this case, the second metal pillar 400 may not protrude beyond the electroless plating layer 310 formed on the side surface of the metal pillar 300 .
圖6示出根據本發明第五實施例的印刷電路板。 Figure 6 shows a printed circuit board according to a fifth embodiment of the invention.
參照圖6,在根據第五實施例的印刷電路板中,第二金屬柱400形成於第一金屬柱300上。第二金屬柱400形成於在第一金屬柱300的側表面上形成的無電鍍覆層310上。亦即,與以上所述其他實施例不同,形成於第一金屬柱300的側表面上的無電鍍覆層310不覆蓋第二金屬柱400的側表面。 Referring to FIG. 6 , in the printed circuit board according to the fifth embodiment, the second metal pillar 400 is formed on the first metal pillar 300 . The second metal pillar 400 is formed on the electroless plating layer 310 formed on the side surface of the first metal pillar 300 . That is, unlike other embodiments described above, the electroless plating layer 310 formed on the side surface of the first metal pillar 300 does not cover the side surface of the second metal pillar 400 .
圖6示出第一金屬柱300的橫截面積自第一金屬柱300的上表面至第一金屬柱300的下表面實質上恆定不變,但並不限於此種形狀。如在第二實施例至第四實施例中所述,第一金屬柱300的橫截面可有所變化。 FIG. 6 shows that the cross-sectional area of the first metal pillar 300 is substantially constant from the upper surface of the first metal pillar 300 to the lower surface of the first metal pillar 300 , but is not limited to this shape. As described in the second to fourth embodiments, the cross section of the first metal pillar 300 may vary.
圖42示出根據本發明第六實施例的印刷電路板。 Figure 42 shows a printed circuit board according to a sixth embodiment of the present invention.
參照圖42,在根據第六實施例的印刷電路板中,阻焊層200的高度可不為恆定不變。阻焊層200在第一金屬柱300周圍區域中的高度可大於阻焊層200在其他區域中的高度。亦即,阻焊 層200在其中阻焊層200接觸第一金屬柱300的無電鍍覆層310的區域中的高度可大於阻焊層200的平均高度。此乃因位於第一金屬柱300周圍的區域中的阻焊層200在隨後將闡述的製造印刷電路板的製程期間在用於降低阻焊層200的高度的去污製程(desmearing process)或去渣製程(descum process)中相對上被移除得少,或者第一金屬柱300的無電鍍覆層310與阻焊層200之間的黏合力可為大的。然而,本發明並非僅限於此。 Referring to FIG. 42 , in the printed circuit board according to the sixth embodiment, the height of the solder resist layer 200 may not be constant. The height of the solder resist layer 200 in the area around the first metal pillar 300 may be greater than the height of the solder resist layer 200 in other areas. That is, solder mask The height of layer 200 in a region where solder resist 200 contacts electroless plating layer 310 of first metal pillar 300 may be greater than the average height of solder resist 200 . This is because the solder resist layer 200 in the area around the first metal pillar 300 is desmeared or removed during the desmearing process for lowering the height of the solder resist layer 200 during the process of manufacturing a printed circuit board to be described later. Relatively little is removed in the descum process, or the adhesion force between the electroless plating layer 310 of the first metal pillar 300 and the solder resist layer 200 may be large. However, the present invention is not limited to this.
圖42中以與第一實施例中相同的方式示出第一金屬柱300的形狀及第二金屬柱400的位置。然而,在此種情形中,第一金屬柱300的形狀及第二金屬柱400的位置並不限於與第一實施例相同,而是可改變成第一實施例至第五實施例等。 The shape of the first metal pillar 300 and the position of the second metal pillar 400 are shown in FIG. 42 in the same manner as in the first embodiment. However, in this case, the shape of the first metal pillar 300 and the position of the second metal pillar 400 are not limited to the same as the first embodiment, but may be changed to the first to fifth embodiments and so on.
在下文中,將闡述製造根據第一實施例至第五實施例的印刷電路板的方法。 Hereinafter, a method of manufacturing the printed circuit board according to the first to fifth embodiments will be explained.
圖7至圖13是示出製造根據本發明第一實施例的印刷電路板的方法中所使用的各製程的剖視圖。 7 to 13 are cross-sectional views showing each process used in the method of manufacturing a printed circuit board according to the first embodiment of the present invention.
參照圖7,在絕緣層100上形成最外層電路120’及金屬墊110,且在絕緣層100上形成阻焊層200以覆蓋最外層電路120’及金屬墊110。阻焊層200設置有開口部210。阻焊層200是感光性的,且可藉由微影製程(photolithography process)的曝光製程及顯影製程形成開口部210。當阻焊層200為負型時,可將遮罩放置於欲形成開口部210的區域中,且可僅選擇性地曝光除欲形成開口部210的區域以外的區域。開口部210形成於金屬墊110上 且金屬墊110的至少一部分可經由開口部210暴露出。 Referring to Figure 7, the outermost circuit 120' and the metal pad 110 are formed on the insulating layer 100, and the solder resist layer 200 is formed on the insulating layer 100 to cover the outermost circuit 120' and the metal pad 110. The solder resist layer 200 is provided with an opening 210 . The solder resist layer 200 is photosensitive, and the opening 210 can be formed through an exposure process and a development process of a photolithography process. When the solder resist 200 is a negative type, the mask can be placed in the area where the opening 210 is to be formed, and only the area other than the area where the opening 210 is to be formed can be selectively exposed. The opening 210 is formed on the metal pad 110 And at least a part of the metal pad 110 may be exposed through the opening 210 .
參照圖8,在開口部210中及阻焊層200上形成無電鍍覆層S。可藉由無電鍍覆將無電鍍覆層S形成為具有2微米或小於2微米的厚度。無電鍍覆層S可以例如銅的單層形成或以例如鈦與銅的雙層形成,但並不限於此種金屬。 Referring to FIG. 8 , an electroless plating layer S is formed in the opening 210 and on the solder resist layer 200 . The electroless plating layer S may be formed to have a thickness of 2 microns or less by electroless plating. The electroless plating layer S may be formed as a single layer of copper or as a double layer of titanium and copper, but is not limited to such metals.
參照圖9,在開口部210中形成第一金屬柱300。第一金屬柱300以無電鍍覆層S為引入線而由電鍍層P形成。第一金屬柱300的高度低於阻焊層200的高度。 Referring to FIG. 9 , a first metal pillar 300 is formed in the opening 210 . The first metal pillar 300 is formed of the electroplating layer P using the electroless plating layer S as a lead-in line. The height of the first metal pillar 300 is lower than the height of the solder resist layer 200 .
參照圖10,在第一金屬柱300的電鍍層P上形成第二金屬柱400。亦可藉由以無電鍍覆層S為引入線進行電鍍來形成第二金屬柱400。可將第二金屬柱400形成為不超過阻焊層200的高度。 Referring to FIG. 10 , a second metal pillar 400 is formed on the plating layer P of the first metal pillar 300 . The second metal pillar 400 can also be formed by electroplating using the electroless plating layer S as a lead-in line. The second metal pillar 400 may be formed not to exceed the height of the solder resist layer 200 .
參照圖11,移除形成於阻焊層200上的無電鍍覆層S。可藉由蝕刻移除無電鍍覆層S。此處,剩餘的無電鍍覆層310覆蓋第二金屬柱400的側表面。 Referring to FIG. 11 , the electroless plating layer S formed on the solder resist layer 200 is removed. The electroless plating layer S can be removed by etching. Here, the remaining electroless plating layer 310 covers the side surface of the second metal pillar 400 .
參照圖12,減小阻焊層200的高度。可藉由例如去污或去渣等方法局部地移除阻焊層200,以使阻焊層200的高度可降低。隨著阻焊層200的高度變低,第一金屬柱300的無電鍍覆層310被暴露於外部。此處,可藉由調整去污或去渣的功率來調整所欲移除的阻焊層200的高度。 Referring to Figure 12, the height of the solder resist layer 200 is reduced. The solder resist layer 200 can be partially removed by methods such as decontamination or slag removal, so that the height of the solder resist layer 200 can be reduced. As the height of the solder resist layer 200 becomes lower, the electroless plating layer 310 of the first metal pillar 300 is exposed to the outside. Here, the height of the solder resist layer 200 to be removed can be adjusted by adjusting the power of decontamination or slag removal.
參照圖13,使第二金屬柱400的上表面朝上彎曲,且第二金屬柱400的一部分藉由迴焊製程在水平方向上流動至無電鍍覆層310上。因此,無電鍍覆層310覆蓋第二金屬柱400的側表 面的一部分,且第二金屬柱400的一部分位於無電鍍覆層310上。 Referring to FIG. 13 , the upper surface of the second metal pillar 400 is bent upward, and a part of the second metal pillar 400 flows horizontally onto the electroless plating layer 310 through a reflow process. Therefore, the electroless plating layer 310 covers the side surface of the second metal pillar 400 A part of the surface, and a part of the second metal pillar 400 is located on the electroless plating layer 310 .
在此實施例中,阻焊層的開口部210的橫截面積(寬度)自上表面至下表面實質上恆定不變。第一金屬柱300的橫截面積(寬度)亦自上表面至下表面實質上恆定不變。 In this embodiment, the cross-sectional area (width) of the opening 210 of the solder resist layer is substantially constant from the upper surface to the lower surface. The cross-sectional area (width) of the first metal pillar 300 is also substantially constant from the upper surface to the lower surface.
圖14至圖20是示出製造根據本發明第二實施例的印刷電路板的方法中所使用的各製程的剖視圖。 14 to 20 are cross-sectional views showing each process used in the method of manufacturing a printed circuit board according to the second embodiment of the present invention.
參照圖14,在絕緣層100上形成最外層電路120’及金屬墊110,且在絕緣層100上形成阻焊層200以覆蓋最外層電路120’及金屬墊110。阻焊層200設置有開口部210。阻焊層200是感光性的,且可藉由微影製程的曝光製程及顯影製程形成開口部210。當阻焊層200為負型時,可將遮罩放置於欲形成開口部210的區域中,且可僅選擇性地曝光除欲形成開口部210的區域以外的區域。開口部210形成於金屬墊110上且金屬墊110的至少一部分可經由開口部210暴露出。 Referring to Figure 14, the outermost circuit 120' and the metal pad 110 are formed on the insulating layer 100, and the solder resist layer 200 is formed on the insulating layer 100 to cover the outermost circuit 120' and the metal pad 110. The solder resist layer 200 is provided with an opening 210 . The solder resist layer 200 is photosensitive, and the opening 210 can be formed through the exposure process and development process of the photolithography process. When the solder resist 200 is a negative type, the mask can be placed in the area where the opening 210 is to be formed, and only the area other than the area where the opening 210 is to be formed can be selectively exposed. The opening 210 is formed on the metal pad 110 and at least a part of the metal pad 110 may be exposed through the opening 210 .
開口部210的橫截面積及寬度自上表面至下表面減小。可藉由調整用於曝光的光的波長來施作開口部210的此種形狀。舉例而言,用於曝光的光的波長可使得加工表面處的吸收較差。具體而言,常用的光可由以下構成:在加工表面上具有高吸收速率以有效地在所述加工表面上引起光反應的I線(I-line),及在所述加工表面上引起較少的光反應的H線(H-line)。在此實施例中,用於曝光的光的主要波長可包括H線。 The cross-sectional area and width of the opening 210 decrease from the upper surface to the lower surface. Such a shape of the opening 210 can be implemented by adjusting the wavelength of light used for exposure. For example, the wavelength of light used for exposure may result in poor absorption at the machined surface. Specifically, commonly used light can be composed of: an I-line that has a high absorption rate on the processing surface to effectively cause a photoreaction on the processing surface, and an I-line that causes less light reaction on the processing surface. H-line of photoreaction. In this embodiment, the dominant wavelength of light used for exposure may include H lines.
參照圖15,在開口部210中及阻焊層200上形成無電鍍 覆層S。可藉由無電鍍覆將無電鍍覆層S形成為具有2微米或小於2微米的厚度。無電鍍覆層S可以例如銅的單層形成或以例如鈦與銅的雙層形成。 Referring to FIG. 15, electroless plating is formed in the opening 210 and on the solder resist layer 200. Cladding S. The electroless plating layer S may be formed to have a thickness of 2 microns or less by electroless plating. The electroless plating layer S may be formed as a single layer of, for example, copper or as a double layer of, for example, titanium and copper.
參照圖16,在開口部210中形成第一金屬柱300。第一金屬柱300以無電鍍覆層S為引入線而由電鍍層P形成。第一金屬柱300的高度低於阻焊層200的高度。 Referring to FIG. 16 , a first metal pillar 300 is formed in the opening 210 . The first metal pillar 300 is formed of the electroplating layer P using the electroless plating layer S as a lead-in line. The height of the first metal pillar 300 is lower than the height of the solder resist layer 200 .
參照圖17,在第一金屬柱300的電鍍層P上形成第二金屬柱400。亦可藉由以無電鍍覆層S為引入線進行電鍍來形成第二金屬柱400。可將第二金屬柱400形成為不超過阻焊層200的高度。 Referring to FIG. 17 , a second metal pillar 400 is formed on the plating layer P of the first metal pillar 300 . The second metal pillar 400 can also be formed by electroplating using the electroless plating layer S as a lead-in line. The second metal pillar 400 may be formed not to exceed the height of the solder resist layer 200 .
參照圖18,移除形成於阻焊層200上的無電鍍覆層S。可藉由蝕刻移除無電鍍覆層S。此處,剩餘的無電鍍覆層310覆蓋第二金屬柱400的側表面。 Referring to FIG. 18 , the electroless plating layer S formed on the solder resist layer 200 is removed. The electroless plating layer S can be removed by etching. Here, the remaining electroless plating layer 310 covers the side surface of the second metal pillar 400 .
參照圖19,減小阻焊層200的高度。可藉由例如去污或去渣等方法局部地移除阻焊層200,以使阻焊層200的高度可降低。隨著阻焊層200的高度變低,第一金屬柱300的無電鍍覆層310被暴露於外部。 Referring to Figure 19, the height of the solder resist layer 200 is reduced. The solder resist layer 200 can be partially removed by methods such as decontamination or slag removal, so that the height of the solder resist layer 200 can be reduced. As the height of the solder resist layer 200 becomes lower, the electroless plating layer 310 of the first metal pillar 300 is exposed to the outside.
參照圖20,使第二金屬柱400的上表面朝上彎曲,且第二金屬柱400的一部分藉由迴焊製程在水平方向上流動至無電鍍覆層310上。因此,無電鍍覆層310覆蓋第二金屬柱400的側表面的一部分,且第二金屬柱400的一部分位於無電鍍覆層310上。 Referring to FIG. 20 , the upper surface of the second metal pillar 400 is bent upward, and a part of the second metal pillar 400 flows horizontally onto the electroless plating layer 310 through a reflow process. Therefore, the electroless plating layer 310 covers a portion of the side surface of the second metal pillar 400 , and a portion of the second metal pillar 400 is located on the electroless plating layer 310 .
在此實施例中,阻焊層的開口部210的橫截面積(寬度)自上表面至下表面減小,且第一金屬柱300的橫截面積(寬度) 亦自上表面至下表面減小。 In this embodiment, the cross-sectional area (width) of the opening 210 of the solder resist layer decreases from the upper surface to the lower surface, and the cross-sectional area (width) of the first metal pillar 300 It also decreases from the upper surface to the lower surface.
圖21至圖27是示出製造根據本發明第三實施例的印刷電路板的方法中所使用的各製程的剖視圖。 21 to 27 are cross-sectional views showing each process used in the method of manufacturing a printed circuit board according to the third embodiment of the present invention.
參照圖21,在絕緣層100上形成最外層電路120’及金屬墊110,且在絕緣層100上形成阻焊層200以覆蓋最外層電路120’及金屬墊110。阻焊層200設置有開口部210。阻焊層200是負型感光性的,且可藉由微影製程的曝光製程及顯影製程形成開口部210。開口部210形成於金屬墊110上且金屬墊110的至少一部分可經由開口部210暴露出。 Referring to Figure 21, the outermost circuit 120' and the metal pad 110 are formed on the insulating layer 100, and the solder resist layer 200 is formed on the insulating layer 100 to cover the outermost circuit 120' and the metal pad 110. The solder resist layer 200 is provided with an opening 210 . The solder resist layer 200 is negative photosensitive, and the opening 210 can be formed through the exposure process and development process of the photolithography process. The opening 210 is formed on the metal pad 110 and at least a part of the metal pad 110 may be exposed through the opening 210 .
開口部210的橫截面積及寬度自上表面至下表面減小。可藉由調整用於曝光的光的波長來施作開口部210的此種形狀。舉例而言,用於曝光的光的波長可使得加工表面處的吸收為最佳。具體而言,常用的光可由以下構成:在加工表面上具有高吸收速率以有效地在所述加工表面上引起光反應的I線,及在所述加工表面上引起較少的光反應的H線。在此實施例中,用於曝光的光的主要波長可包括I線。 The cross-sectional area and width of the opening 210 decrease from the upper surface to the lower surface. Such a shape of the opening 210 can be implemented by adjusting the wavelength of light used for exposure. For example, the wavelength of light used for exposure can optimize absorption at the machined surface. Specifically, the commonly used light may be composed of: I line that has a high absorption rate on the processing surface to effectively cause a light reaction on the processing surface, and H line that causes less light reaction on the processing surface. String. In this embodiment, the dominant wavelength of light used for exposure may include the I line.
參照圖22,在開口部210中及阻焊層200上形成無電鍍覆層S。可藉由無電鍍覆將無電鍍覆層S形成為具有2微米或小於2微米的厚度。無電鍍覆層S可以例如銅的單層形成或以例如鈦與銅的雙層形成。 Referring to FIG. 22 , an electroless plating layer S is formed in the opening 210 and on the solder resist layer 200 . The electroless plating layer S may be formed to have a thickness of 2 microns or less by electroless plating. The electroless plating layer S may be formed as a single layer of, for example, copper or as a double layer of, for example, titanium and copper.
參照圖23,在開口部210中形成第一金屬柱300。第一金屬柱300以無電鍍覆層S為引入線而由電鍍層P形成。第一金 屬柱300的高度低於阻焊層200的高度。 Referring to FIG. 23 , a first metal pillar 300 is formed in the opening 210 . The first metal pillar 300 is formed of the electroplating layer P using the electroless plating layer S as a lead-in line. first gold The height of the pillar 300 is lower than the height of the solder resist layer 200 .
參照圖24,在第一金屬柱300的電鍍層P上形成第二金屬柱400。亦可藉由以無電鍍覆層S為引入線進行電鍍來形成第二金屬柱400。可將第二金屬柱400形成為不超過阻焊層200的高度。 Referring to FIG. 24 , a second metal pillar 400 is formed on the plating layer P of the first metal pillar 300 . The second metal pillar 400 can also be formed by electroplating using the electroless plating layer S as a lead-in line. The second metal pillar 400 may be formed not to exceed the height of the solder resist layer 200 .
參照圖25,移除形成於阻焊層200上的無電鍍覆層S。可藉由蝕刻移除無電鍍覆層S。此處,剩餘的無電鍍覆層310覆蓋第二金屬柱400的側表面。 Referring to FIG. 25 , the electroless plating layer S formed on the solder resist layer 200 is removed. The electroless plating layer S can be removed by etching. Here, the remaining electroless plating layer 310 covers the side surface of the second metal pillar 400 .
參照圖26,減小阻焊層200的高度。可藉由例如去污或去渣等方法局部地移除阻焊層200,以使阻焊層200的高度可降低。隨著阻焊層200的高度變低,第一金屬柱300的無電鍍覆層310被暴露於外部。 Referring to Figure 26, the height of the solder resist layer 200 is reduced. The solder resist layer 200 can be partially removed by methods such as decontamination or slag removal, so that the height of the solder resist layer 200 can be reduced. As the height of the solder resist layer 200 becomes lower, the electroless plating layer 310 of the first metal pillar 300 is exposed to the outside.
參照圖27,使第二金屬柱400的上表面朝上彎曲,且第二金屬柱400的一部分藉由迴焊製程在水平方向上流動至無電鍍覆層310上。因此,無電鍍覆層310覆蓋第二金屬柱400的側表面的一部分,且第二金屬柱400的一部分位於無電鍍覆層310上。 Referring to FIG. 27 , the upper surface of the second metal pillar 400 is bent upward, and a part of the second metal pillar 400 flows horizontally onto the electroless plating layer 310 through a reflow process. Therefore, the electroless plating layer 310 covers a portion of the side surface of the second metal pillar 400 , and a portion of the second metal pillar 400 is located on the electroless plating layer 310 .
在此實施例中,阻焊層的開口部210的橫截面積(寬度)自上表面至下表面增大,且第一金屬柱300的橫截面積(寬度)亦自上表面至下表面增大。 In this embodiment, the cross-sectional area (width) of the opening 210 of the solder resist layer increases from the upper surface to the lower surface, and the cross-sectional area (width) of the first metal pillar 300 also increases from the upper surface to the lower surface. big.
圖28至圖34是示出製造根據本發明第四實施例的印刷電路板的方法中所使用的各製程的剖視圖。 28 to 34 are cross-sectional views showing each process used in the method of manufacturing a printed circuit board according to the fourth embodiment of the present invention.
參照圖28,在絕緣層100上形成最外層電路120’及金屬墊110,且在絕緣層100上形成阻焊層200以覆蓋最外層電路120’ 及金屬墊110。阻焊層200設置有開口部210。阻焊層200是負型感光性的,且可藉由微影製程的曝光製程及顯影製程形成開口部210。開口部210形成於金屬墊110上且金屬墊110的至少一部分可經由開口部210暴露出。 Referring to Figure 28, an outermost circuit 120' and a metal pad 110 are formed on the insulating layer 100, and a solder resist layer 200 is formed on the insulating layer 100 to cover the outermost circuit 120' and metal pad 110. The solder resist layer 200 is provided with an opening 210 . The solder resist layer 200 is negative photosensitive, and the opening 210 can be formed through the exposure process and development process of the photolithography process. The opening 210 is formed on the metal pad 110 and at least a part of the metal pad 110 may be exposed through the opening 210 .
開口部210的橫截面積及寬度自上表面至下表面增大並接著減小。可藉由調整用於曝光的光的波長來施作開口部210的此種形狀。 The cross-sectional area and width of the opening 210 increase from the upper surface to the lower surface and then decrease. Such a shape of the opening 210 can be implemented by adjusting the wavelength of light used for exposure.
舉例而言,可使用具有在特定點處改變光的波長或者在阻焊層200的中點處引起較少的光反應的波長的光。作為另一選擇,可使用具有將有效地在加工表面上引起光反應的I線與在加工表面上引起較小光反應的H線以1:1的比率進行混合的波長的光。 For example, light having a wavelength that changes the light at a specific point or causes less light reaction at a midpoint of the solder resist layer 200 may be used. Alternatively, light having a wavelength that mixes an I-line that effectively causes a photoreaction on the processing surface and an H-line that causes a smaller photoreaction on the processing surface in a ratio of 1:1 may be used.
作為另一選擇,可根據波長而使用具有不同光吸收率的兩個阻焊層200來施作開口部210的形狀。 As another option, two solder resist layers 200 with different light absorbances may be used to shape the opening 210 according to the wavelength.
參照圖29,在開口部210中及阻焊層200上形成無電鍍覆層S。可藉由無電鍍覆將無電鍍覆層S形成為具有2微米或小於2微米的厚度。無電鍍覆層S可以例如銅的單層形成或以例如鈦與銅的雙層形成。 Referring to FIG. 29 , an electroless plating layer S is formed in the opening 210 and on the solder resist layer 200 . The electroless plating layer S may be formed to have a thickness of 2 microns or less by electroless plating. The electroless plating layer S may be formed as a single layer of, for example, copper or as a double layer of, for example, titanium and copper.
參照圖30,在開口部210中形成第一金屬柱300。第一金屬柱300以無電鍍覆層S為引入線而由電鍍層P形成。第一金屬柱300的高度低於阻焊層200的高度。 Referring to FIG. 30 , a first metal pillar 300 is formed in the opening 210 . The first metal pillar 300 is formed of the electroplating layer P using the electroless plating layer S as a lead-in line. The height of the first metal pillar 300 is lower than the height of the solder resist layer 200 .
參照圖31,在第一金屬柱300的電鍍層P上形成第二金 屬柱400。亦可藉由以無電鍍覆層S為引入線進行電鍍來形成第二金屬柱400。可將第二金屬柱400形成為不超過阻焊層200的高度。 Referring to Figure 31, a second gold layer is formed on the electroplating layer P of the first metal pillar 300. The column is 400. The second metal pillar 400 can also be formed by electroplating using the electroless plating layer S as a lead-in line. The second metal pillar 400 may be formed not to exceed the height of the solder resist layer 200 .
參照圖32,移除形成於阻焊層200上的無電鍍覆層S。可藉由蝕刻移除無電鍍覆層S。此處,剩餘的無電鍍覆層310覆蓋第二金屬柱400的側表面。 Referring to FIG. 32 , the electroless plating layer S formed on the solder resist layer 200 is removed. The electroless plating layer S can be removed by etching. Here, the remaining electroless plating layer 310 covers the side surface of the second metal pillar 400 .
參照圖33,減小阻焊層200的高度。可藉由例如去污或去渣等方法局部地移除阻焊層200,以使阻焊層200的高度可降低。隨著阻焊層200的高度變低,第一金屬柱300的無電鍍覆層310被暴露於外部。 Referring to Figure 33, the height of the solder resist layer 200 is reduced. The solder resist layer 200 can be partially removed by methods such as decontamination or slag removal, so that the height of the solder resist layer 200 can be reduced. As the height of the solder resist layer 200 becomes lower, the electroless plating layer 310 of the first metal pillar 300 is exposed to the outside.
經歷去污或去渣處理的阻焊層200的高度可降低至第一金屬柱300的橫截面積為最大的點(變化點),但並非僅限於此。最終的阻焊層200的高度可高於或低於第一金屬柱300的橫截面積為最大的點。 The height of the solder resist layer 200 that undergoes decontamination or slag removal treatment may be reduced to a point (change point) where the cross-sectional area of the first metal pillar 300 is the largest, but is not limited thereto. The height of the final solder mask layer 200 may be higher or lower than the point where the cross-sectional area of the first metal pillar 300 is the largest.
參照圖34,使第二金屬柱400的上表面朝上彎曲,且第二金屬柱400的一部分藉由迴焊製程在水平方向上流動至無電鍍覆層310上。因此,無電鍍覆層310覆蓋第二金屬柱400的側表面的一部分,且第二金屬柱400的一部分位於無電鍍覆層310上。 Referring to FIG. 34 , the upper surface of the second metal pillar 400 is bent upward, and a part of the second metal pillar 400 flows horizontally onto the electroless plating layer 310 through a reflow process. Therefore, the electroless plating layer 310 covers a portion of the side surface of the second metal pillar 400 , and a portion of the second metal pillar 400 is located on the electroless plating layer 310 .
在此實施例中,阻焊層的開口部210的橫截面積(寬度)自上表面至下表面增大並接著減小,且第一金屬柱300的橫截面積(寬度)亦自上表面至下表面增大並接著減小。 In this embodiment, the cross-sectional area (width) of the opening 210 of the solder resist increases from the upper surface to the lower surface and then decreases, and the cross-sectional area (width) of the first metal pillar 300 also increases from the upper surface to the lower surface. increases to the lower surface and then decreases.
圖35至圖41是示出製造根據本發明第五實施例的印刷電路板的方法中所使用的各製程的剖視圖。 35 to 41 are cross-sectional views showing each process used in the method of manufacturing a printed circuit board according to the fifth embodiment of the present invention.
參照圖35,在絕緣層100上形成最外層電路120’及金屬墊110,且在絕緣層100上形成阻焊層200以覆蓋最外層電路120’及金屬墊110。阻焊層200設置有開口部210。阻焊層200是負型感光性的,且可藉由微影製程的曝光製程及顯影製程形成開口部210。開口部210形成於金屬墊110上且金屬墊110的至少一部分可經由開口部210暴露出。 Referring to Figure 35, the outermost circuit 120' and the metal pad 110 are formed on the insulating layer 100, and the solder resist layer 200 is formed on the insulating layer 100 to cover the outermost circuit 120' and the metal pad 110. The solder resist layer 200 is provided with an opening 210 . The solder resist layer 200 is negative photosensitive, and the opening 210 can be formed through the exposure process and development process of the photolithography process. The opening 210 is formed on the metal pad 110 and at least a part of the metal pad 110 may be exposed through the opening 210 .
在圖35中,開口部210的橫截面積及寬度被示為自上表面至下表面恆定不變。然而,開口部210的形狀並非僅限於此,且開口部210的所述形狀可替換為第二實施例至第四實施例中所述的形狀。 In FIG. 35 , the cross-sectional area and width of the opening 210 are shown to be constant from the upper surface to the lower surface. However, the shape of the opening 210 is not limited to this, and the shape of the opening 210 may be replaced by the shapes described in the second to fourth embodiments.
參照圖36,在開口部210中及阻焊層200上形成無電鍍覆層S。可藉由無電鍍覆將無電鍍覆層S形成為具有2微米或小於2微米的厚度。無電鍍覆層S可以例如銅的單層形成或以例如鈦與銅的雙層形成。 Referring to FIG. 36 , an electroless plating layer S is formed in the opening 210 and on the solder resist layer 200 . The electroless plating layer S may be formed to have a thickness of 2 microns or less by electroless plating. The electroless plating layer S may be formed as a single layer of, for example, copper or as a double layer of, for example, titanium and copper.
參照圖37,在開口部210中形成第一金屬柱300。第一金屬柱300以無電鍍覆層S為引入線而由電鍍層P形成。第一金屬柱300的高度等於或高於阻焊層200的高度。 Referring to FIG. 37 , a first metal pillar 300 is formed in the opening 210 . The first metal pillar 300 is formed of the electroplating layer P using the electroless plating layer S as a lead-in line. The height of the first metal pillar 300 is equal to or higher than the height of the solder resist layer 200 .
參照圖38,在第一金屬柱300的電鍍層P上形成第二金屬柱400。亦可藉由以無電鍍覆層S為引入線進行電鍍來形成第二金屬柱400。可將第二金屬柱400形成為高於阻焊層200的高度。 Referring to FIG. 38 , a second metal pillar 400 is formed on the plating layer P of the first metal pillar 300 . The second metal pillar 400 can also be formed by electroplating using the electroless plating layer S as a lead-in line. The second metal pillar 400 may be formed to a height higher than the solder resist layer 200 .
參照圖39,移除形成於阻焊層200上的無電鍍覆層S。可藉由蝕刻移除無電鍍覆層S。 Referring to FIG. 39 , the electroless plating layer S formed on the solder resist layer 200 is removed. The electroless plating layer S can be removed by etching.
參照圖40,減小阻焊層200的高度。可藉由例如去污或去渣等方法局部地移除阻焊層200,以使阻焊層200的高度可降低。隨著阻焊層200的高度變低,第一金屬柱300的無電鍍覆層310被暴露於外部。第二金屬柱400的側表面亦被暴露於外部。 Referring to Figure 40, the height of the solder resist layer 200 is reduced. The solder resist layer 200 can be partially removed by methods such as decontamination or slag removal, so that the height of the solder resist layer 200 can be reduced. As the height of the solder resist layer 200 becomes lower, the electroless plating layer 310 of the first metal pillar 300 is exposed to the outside. The side surface of the second metal pillar 400 is also exposed to the outside.
參照圖41,使第二金屬柱400的上表面朝上彎曲,且第二金屬柱400藉由迴焊製程在水平方向上流動至無電鍍覆層310上。 Referring to FIG. 41 , the upper surface of the second metal pillar 400 is bent upward, and the second metal pillar 400 flows horizontally onto the electroless plating layer 310 through a reflow process.
在此實施例中,無電鍍覆層310不覆蓋第二金屬柱400的側表面,且整個第二金屬柱400被形成為突出超過無電鍍覆層310。 In this embodiment, the electroless plating layer 310 does not cover the side surface of the second metal pillar 400 , and the entire second metal pillar 400 is formed to protrude beyond the electroless plating layer 310 .
儘管本發明包括特定實例,然而對於此項技術中具有通常知識者而言將顯而易見,在不背離申請專利範圍及其等效範圍的精神及範圍的條件下,可在該些實例中作出各種形式及細節上的變化。本文中所述實例應被視作僅用於說明意義,而非用於限制。對每一實例中的特徵或態樣的說明應被視作適用於其他實例中的相似特徵或態樣。若以不同的次序執行所述技術及/或若以不同的方式對所述系統、架構、裝置或電路中的組件加以組合及/或以其他組件或其等效組件進行替換或補充,則可達成適合的結果。因此,本發明的範圍並非由詳細說明界定,而是由申請專利範圍及其等效範圍界定,且處於申請專利範圍及其等效範圍的範圍內的所有變動皆應被視作包含於本發明中。 Although this invention includes specific examples, it will be apparent to those of ordinary skill in the art that various forms may be made in these examples without departing from the spirit and scope of the claimed scope and its equivalents. and changes in details. The examples set forth herein should be considered illustrative only and not limiting. Descriptions of features or aspects in each instance should be deemed to apply to similar features or aspects in other instances. The techniques may be performed in a different order and/or if components in the systems, architectures, devices or circuits are combined in a different manner and/or replaced or supplemented by other components or their equivalents. Achieve appropriate results. Therefore, the scope of the present invention is not defined by the detailed description, but by the patent application scope and its equivalent range, and all changes within the scope of the patent application scope and its equivalent range shall be deemed to be included in the present invention. middle.
100、100”‧‧‧絕緣層 100, 100”‧‧‧Insulation layer
100’‧‧‧核心 100’‧‧‧Core
110‧‧‧金屬墊 110‧‧‧Metal Pad
120‧‧‧電路 120‧‧‧Circuit
120’‧‧‧最外層電路 120’‧‧‧Outermost circuit
130‧‧‧通孔 130‧‧‧through hole
200、200’‧‧‧阻焊層 200, 200’‧‧‧Solder mask
300‧‧‧第一金屬柱 300‧‧‧First Metal Pillar
400‧‧‧第二金屬柱 400‧‧‧Second Metal Pillar
500‧‧‧焊球 500‧‧‧Solder balls
Claims (15)
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR10-2017-0139526 | 2017-10-25 | ||
| KR1020170139526A KR20190046214A (en) | 2017-10-25 | 2017-10-25 | Printed circuit board |
| ??10-2017-0139526 | 2017-10-25 |
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| Publication Number | Publication Date |
|---|---|
| TW201933958A TW201933958A (en) | 2019-08-16 |
| TWI812628B true TWI812628B (en) | 2023-08-21 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW107124712A TWI812628B (en) | 2017-10-25 | 2018-07-18 | Printed circuit board |
Country Status (3)
| Country | Link |
|---|---|
| JP (1) | JP2019080042A (en) |
| KR (1) | KR20190046214A (en) |
| TW (1) | TWI812628B (en) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP7411354B2 (en) * | 2019-08-30 | 2024-01-11 | イビデン株式会社 | Printed wiring board and its manufacturing method |
| JP2022015758A (en) * | 2020-07-09 | 2022-01-21 | イビデン株式会社 | Wiring board |
| KR20230095591A (en) | 2021-12-22 | 2023-06-29 | 삼성전기주식회사 | Printed Circuit Board |
| CN115348749B (en) * | 2022-08-12 | 2025-04-25 | 深圳市景旺电子股份有限公司 | Method for manufacturing solder mask layer of circuit board, method for surface treatment of circuit board and circuit board |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI499012B (en) * | 2011-10-25 | 2015-09-01 | 日本特殊陶業股份有限公司 | Wiring substrate and method of manufacturing same |
| US20170213804A1 (en) * | 2014-08-08 | 2017-07-27 | Taiwan Semiconductor Manufacturing Company Ltd. | Semiconductor structure and manufacturing method of the same |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103053228B (en) * | 2010-08-02 | 2016-10-05 | 安美特德国有限公司 | Method for forming solder deposits and non-melted bump structures on substrates |
| JP6081044B2 (en) | 2010-09-16 | 2017-02-15 | 富士通株式会社 | Manufacturing method of package substrate unit |
| US9706652B2 (en) * | 2010-12-24 | 2017-07-11 | Lg Innotek Co., Ltd. | Printed circuit board and method for manufacturing same |
| JP2014078551A (en) * | 2012-10-09 | 2014-05-01 | Ngk Spark Plug Co Ltd | Wiring board, wiring board manufacturing method |
| JP6413831B2 (en) * | 2015-02-24 | 2018-10-31 | 味の素株式会社 | Circuit board and manufacturing method thereof |
| JP6715618B2 (en) * | 2016-02-23 | 2020-07-01 | イビデン株式会社 | Printed wiring board |
-
2017
- 2017-10-25 KR KR1020170139526A patent/KR20190046214A/en not_active Ceased
-
2018
- 2018-07-18 TW TW107124712A patent/TWI812628B/en active
- 2018-07-25 JP JP2018139460A patent/JP2019080042A/en active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI499012B (en) * | 2011-10-25 | 2015-09-01 | 日本特殊陶業股份有限公司 | Wiring substrate and method of manufacturing same |
| US20170213804A1 (en) * | 2014-08-08 | 2017-07-27 | Taiwan Semiconductor Manufacturing Company Ltd. | Semiconductor structure and manufacturing method of the same |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2019080042A (en) | 2019-05-23 |
| TW201933958A (en) | 2019-08-16 |
| KR20190046214A (en) | 2019-05-07 |
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