TWI898845B - Light emitting element and manufacturing method thereof - Google Patents

Abstract

This disclosure relates to a light-emitting device possessing superior luminous efficiency and a method for its manufacture. According to an embodiment of the present invention, the light-emitting device comprises: a substrate; an n-type cladding layer deposited on the substrate and consisting of a semiconductor material doped with n-type dopants; an active layer deposited on the n-type cladding layer, where electrons provided from the n-type cladding layer recombine with holes to generate light; a p-type semiconductor layer deposited on the active layer, which supplies holes to the active layer; a protective layer deposited on the p-type semiconductor to protect it from external environments; and electrodes formed respectively on the n-type cladding layer and the protective layer. The p-type semiconductor layer is implemented with a material having a predetermined first threshold of optical transmittance and a predetermined second threshold of electrical conductivity that are both within the visible light wavelength range.

Description

Light-emitting element and manufacturing method thereof

The present invention relates to a light-emitting element with excellent light efficiency and a method for manufacturing the same.

Cross-references to related applications

*This patent is the result of research conducted with funding from the Korean government (Ministry of Science and ICT) and support from the Korea Research Foundation (Project Number: 1711195422, Detailed Project Number: 2022M3H4A3A01082883, Project Title: Development of Core Technology for 5μm-Class InGaN Red Micro-LEDs with a Breakthrough External Quantum Efficiency of 30%).

*This patent application claims priority under 35 U.S.C. 119(a) of the U.S. Patent Act to Korean Patent Application No. 10-2023-0096662, filed on July 25, 2023; Korean Patent Application No. 10-2023-0106792, filed on August 16, 2023; Korean Patent Application No. 10-2023-0128003, filed on September 25, 2023; and Korean Patent Application No. 10-2024-0046343, filed on April 5, 2024, the disclosures of which are hereby incorporated by reference in their entireties. Furthermore, this patent application claims priority to other applications filed in other countries, the disclosures of which are also hereby incorporated by reference in their entireties.

The details described in this section merely provide background information about the present embodiment and do not constitute prior art.

LEDs, as inorganic light sources, are widely used in various fields, including display devices, automotive lighting, and general lighting. Due to their advantages such as long life, low power consumption, and fast response time, LEDs are rapidly replacing existing light sources.

Light-emitting diodes (LEDs) can typically produce a variety of colors using a mixture of blue, green, and red. LEDs used in various devices contain multiple pixels to produce various images or colors. Each pixel consists of blue, green, and red sub-pixels. The combination of these sub-pixels determines the color of the associated pixel, and the combination of these sub-pixels creates an image.

Existing LEDs are typically manufactured based on nitride semiconductors. Compared to other existing materials, nitride semiconductor-based LEDs exhibit relatively superior light efficiency.

However, existing nitride semiconductor-based LEDs have the following structural problems.

First, nitride semiconductor-based LEDs experience internal pressure, either compression or expansion, due to differences in the material's lattice constant. This internal pressure (strain) generates a piezoelectric field within the active layer, significantly reducing the device's internal luminous efficiency.

Another problem arises because the density and mobility of holes injected through the p-semiconductor layer are significantly lower than those of electrons injected through the n-semiconductor layer. Therefore, the number of holes injected into the active layer is significantly smaller than the number of electrons. This causes excess electrons injected into the active layer to accumulate at the interface between the active layer and the p-semiconductor layer. These accumulated electrons generate another piezoelectric field, significantly reducing the probability of electron-hole combination to generate light. Furthermore, as the injected current increases, more electrons accumulate in the active layer compared to holes, causing the internal quantum efficiency of light generation to gradually decrease.

As mentioned above, the lattice constant mismatch and the imbalance between hole and electron particles generate internal pressure, which in turn generates an electric field within the active layer. This electric field disrupts the flow of injected hole and electron particles and prevents them from combining, resulting in a reduced probability of light generation.

One embodiment of the present invention provides a light-emitting device and a method for manufacturing the same. The light-emitting device reduces internal stress in the active layer caused by density imbalance and lattice constant mismatch between holes and electrons, thereby improving light efficiency by adjusting the lattice constant and increasing the hole density.

One embodiment of the present invention provides a light-emitting device and a method for manufacturing the same. The light-emitting device utilizes a hybrid cladding layer made of different materials to reduce internal pressure and increase hole density, thereby improving light efficiency.

One embodiment of the present invention provides a light-emitting device and a method for manufacturing the same. The light-emitting device utilizes a cladding layer made of a different material, such as zinc oxide (ZnO), to reduce internal stress and increase hole density, thereby improving light efficiency.

An embodiment of the present invention provides a light-emitting element and a method for manufacturing the same. The light-emitting element includes a reflective electrode having excellent reflectivity, thereby having excellent light output.

An embodiment of the present invention provides a light-emitting device and a method for manufacturing the same, which improves light output by making the current flow uniform and minimizing interference with the output light caused by electrodes.

According to one aspect of the present invention, a light-emitting element is provided, comprising: a substrate; an n-type cladding layer, deposited on the substrate, and made of a semiconductor material doped with an n-type dopant; an active layer, deposited on the n-type cladding layer, wherein holes and electrons provided from the n-type cladding layer meet and recombine to generate light; and a p-type semiconductor layer, deposited on the active layer. and provides holes to the active layer; a protective layer, made of a material having a transmittance and conductivity in the visible light band equal to or greater than a preset first reference value and a preset second reference value, and deposited on the p-type semiconductor layer to protect the p-type semiconductor layer from external influences; and electrodes, respectively formed on the n-type cladding layer and the protective layer.

According to one aspect of the present invention, a method for manufacturing a light-emitting device is provided, comprising: a deposition process of sequentially depositing an n-type cladding layer, an active layer, a p-type semiconductor layer, and a protective layer on a substrate; an etching process of etching a portion of the n-type cladding layer, the active layer, the p-type semiconductor layer, and the protective layer, and etching vertically from the protective layer to a portion of the n-type cladding layer; and a formation process of forming a first electrode on the protective layer and a second electrode on the portion of the n-type cladding layer exposed to the outside by the etching process.

According to one aspect of the present invention, a light-emitting element is provided, comprising: a substrate; an n-type cladding layer, deposited on the substrate and made of a semiconductor material doped with an n-type dopant; an active layer, deposited on the n-type cladding layer, wherein holes and electrons provided from the n-type cladding layer meet and recombine to generate light; and a p-type cladding layer, made of a semiconductor material different from that of the n-type cladding layer. A protective layer is deposited on the active layer and provides holes to the active layer; a protective layer is made of a material having a transmittance and conductivity in the visible light band equal to or higher than a preset first reference value and a preset second reference value, respectively, and is deposited on the p-type cladding layer to protect the p-type cladding layer from external influences; and electrodes are formed on the n-type cladding layer and the protective layer, respectively.

According to one aspect of the present invention, a method for manufacturing a light-emitting device is provided, comprising: a deposition process of sequentially depositing an n-type cladding layer, an active layer, a p-type cladding layer, and a protective layer on a substrate; an etching process of etching a portion of the n-type cladding layer, the active layer, the p-type cladding layer, and the protective layer, and etching vertically from the protective layer to a portion of the n-type cladding layer; and a formation process of forming a first electrode on the protective layer and a second electrode on the portion of the n-type cladding layer exposed to the outside by the etching process; the p-type cladding layer is formed of a semiconductor made of a different material from the n-type cladding layer.

According to one aspect of the present invention, a light-emitting element is provided, comprising: a substrate; an n-type cladding layer, deposited on the substrate and made of a semiconductor material doped with an n-type dopant; an active layer, deposited on the n-type cladding layer, generating light by the combination of holes and electrons supplied from the n-type cladding layer; a p-type semiconductor layer, deposited on the active layer, supplying holes to the active layer; a first electrode, deposited on the p-type semiconductor layer, supplying current to the p-type semiconductor layer and reflecting light generated by the active layer toward the n-type cladding layer; and a second electrode, deposited on the n-type cladding layer, supplying electrons to the n-type cladding layer to improve light extraction efficiency.

According to one aspect of the present invention, a light-emitting element is provided, comprising: a substrate; an n-type cladding layer, deposited on the substrate, and made of a semiconductor material doped with an n-type dopant; an active layer, deposited on the n-type cladding layer, wherein holes and electrons provided from the n-type cladding layer meet and recombine to generate light; a p-type semiconductor layer, deposited on the active layer, and providing holes to the active layer; and a first electrode, deposited on the p-type semiconductor layer, and providing holes to the p-type semiconductor layer. The conductive layer supplies current and reflects light generated by the active layer toward the n-type cladding layer. The second electrode, deposited on the n-type cladding layer, supplies electrons to the n-type cladding layer, thereby improving light extraction efficiency. The first and second electrodes comprise metal electrodes that function as electrodes and reflect incident light, and protective layers deposited on the metal electrodes to protect them from the external environment.

According to one aspect of the present invention, a light-emitting element is provided, comprising: a substrate; an n-type cladding layer, deposited on the substrate and made of a semiconductor material doped with an n-type dopant; an active layer, deposited on the n-type cladding layer, wherein holes and electrons supplied from the n-type cladding layer meet and recombine to generate light; a p-type semiconductor layer, deposited on the active layer, and supplying holes to the active layer; and a first electrode, deposited on the p-type semiconductor layer, supplying a current to the p-type semiconductor layer and transmitting light generated by the active layer to the n-type semiconductor layer. The first electrode and the second electrode each comprise a metal electrode that reflects light incident on the p-type semiconductor layer or the n-type cladding layer; and a second electrode deposited on the p-type semiconductor layer or the n-type cladding layer to supply electrons to the n-type cladding layer, thereby improving light extraction efficiency. The first electrode and the second electrode each comprise a metal electrode that acts as an electrode and reflects light incident on the metal electrode; a protective layer deposited on the metal electrode to protect the metal electrode from the external environment; and a metal electrode layer deposited between the p-type semiconductor layer or the n-type cladding layer and the metal electrode to improve contact strength between the metal electrode and the p-type semiconductor layer.

According to one aspect of the present invention, a light-emitting element is provided, comprising: a substrate; an n-type cladding layer, deposited on the substrate, and made of a semiconductor material doped with an n-type dopant; an active layer, deposited on the n-type cladding layer, wherein holes and electrons provided from the n-type cladding layer meet and recombine to generate light; a p-type semiconductor layer, deposited on the active layer, and providing holes to the active layer; and a first electrode, deposited on the p-type semiconductor layer. The first electrode supplies current to the p-type semiconductor layer and reflects light generated by the active layer toward the n-type cladding layer. The second electrode is deposited on the n-type cladding layer and supplies electrons to the n-type cladding layer to improve light extraction efficiency. The insulating film is laminated on the side surfaces of the n-type cladding layer, the active layer, and the p-type semiconductor layer, as well as the side surfaces and a portion of the top surface of the first electrode and the second electrode to protect each component from external influences.

According to one aspect of the present invention, a method for manufacturing a light-emitting device is provided, comprising: an etching process, using a wafer having a layer structure composed of an n-type cladding layer, an active layer, and a p-type semiconductor layer on a substrate, etching to a certain position of the n-type cladding layer to form a p-n junction surface structure; a deposition process , forming a first electrode on the upper surface of the countertop structure, and forming a second electrode on the n-type cladding layer exposed to the outside by the etching process; and laminating an insulating film layer on the side surfaces of the n-type cladding layer, the active layer, and the p-type semiconductor layer, as well as the side surfaces and a portion of the top surface of the first electrode and the second electrode.

According to one aspect of the present invention, in a method for manufacturing a light-emitting element, unlike the above-mentioned method, the first electrode and the second electrode can be formed through different processes. That is, a method for manufacturing a light-emitting element is provided, which includes: a first deposition process, in which the first electrode is deposited on the upper surface of an n-type cladding layer, an active layer, a p-type semiconductor layer, and a specific region of the surface of the p-type semiconductor layer where a p-n junction will be formed, which is sequentially formed on a substrate; an etching process, in which the first electrode is deposited on the upper surface of the n-type cladding layer, the active layer, the p-type semiconductor layer, and the first electrode; and an etching process, in which the first electrode is deposited on the upper surface of the n-type cladding layer, the active layer, the p-type semiconductor layer, and the first electrode. A first electrode and a certain position of the n-type cladding layer are formed to form a countertop structure shape; a second deposition process is performed to form a second electrode on the n-type cladding layer exposed to the outside by the etching process; and a lamination process is performed to laminate an insulating film layer on the side surfaces of the n-type cladding layer, the active layer, and the p-type semiconductor layer, as well as the side surfaces and a portion of the top surface of the first electrode and the second electrode.

According to one aspect of the present invention, a light-emitting element is provided, comprising: a substrate; an n-type cladding layer, deposited on the substrate, and made of a semiconductor material doped with an n-type dopant; an active layer, deposited on the n-type cladding layer, wherein holes and electrons provided from the n-type cladding layer meet and recombine to generate light; and a p-type semiconductor layer, deposited on the substrate. A first electrode is formed on the transparent electrode; and a second electrode is deposited on the n-type cladding layer to supply electrons to the n-type cladding layer.

According to one aspect of the present invention, a light-emitting element is provided, comprising: a substrate; an n-type cladding layer, deposited on the substrate, and made of a semiconductor material doped with an n-type dopant; an active layer, deposited on the n-type cladding layer, wherein holes and electrons provided from the n-type cladding layer meet and recombine to generate light; a p-type semiconductor layer, deposited on the active layer, and providing holes to the active layer but suppressing or blocking the supply of holes to a certain region; and a transparent electrode, deposited on the p-type semiconductor layer, and providing light to the p-type semiconductor layer. supplying holes; a first electrode formed on the transparent electrode; and a second electrode deposited on the n-type cladding layer and supplying electrons to the n-type cladding layer. The p-type semiconductor layer comprises: a p-type cladding layer made of a semiconductor material doped with a p-type dopant, deposited on the active layer, and comprising a current flow barrier, wherein the current flow barrier blocks current, more specifically, blocks the flow of holes; and a p-type oxide layer made of a zinc oxide (ZnO)-based compound, deposited on the p-type cladding layer.

According to one aspect of the present invention, a light-emitting element is provided, comprising: a substrate; an n-type cladding layer, deposited on the substrate and made of a semiconductor material doped with an n-type dopant; an active layer, deposited on the n-type cladding layer, wherein holes and electrons provided from the n-type cladding layer meet and recombine to generate light; a p-type semiconductor layer, deposited on the active layer, which provides holes to the active layer but suppresses or blocks the supply of holes to a certain region; a transparent electrode, deposited on the p-type semiconductor layer, which supplies holes to the p-type semiconductor layer; a first electrode; The p-type semiconductor layer comprises a first electrode formed on the transparent electrode; a second electrode deposited on the n-type cladding layer and supplying electrons to the n-type cladding layer; wherein the p-type semiconductor layer comprises: a p-type cladding layer made of a semiconductor material doped with a p-type dopant and deposited on the active layer, comprising a current flow blocking portion and a leakage current preventing portion, the current flow blocking portion blocking the flow of current or holes, and the leakage current preventing portion preventing the generation of leakage current; and a p-type oxide layer made of a zinc oxide (ZnO)-based compound and deposited on the p-type cladding layer.

According to one aspect of the present invention, a method for manufacturing a light-emitting element is provided, comprising: a first deposition process of sequentially depositing an n-type cladding layer, an active layer, and a p-type cladding layer on a substrate; a treatment process of plasma treatment or ion/electron implantation using oxygen or an oxygen-containing gas in a predetermined region within the p-type cladding layer; a second deposition process of depositing a p-type oxide layer and a transparent electrode on the p-type cladding layer; an etching process of etching from the transparent electrode to a certain position within the n-type cladding layer to form a countertop structure; and a metal electrode formation process of forming a first electrode on the transparent electrode and a second electrode on the exposed portion of the n-type cladding layer.

According to one aspect of the present invention, a method for manufacturing a light-emitting element is provided, comprising: a first deposition process, in which an n-type cladding layer, an active layer, and a p-type cladding layer are sequentially deposited on a substrate; a first treatment process, in which a predetermined area within the p-type cladding layer is subjected to a plasma treatment or an ion/electron implantation process using oxygen or an oxygen-containing gas; a second deposition process, in which an active layer is deposited on a predetermined area within the p-type cladding layer; A p-type oxide layer and a transparent electrode are deposited on the first layer; an etching process is performed from the transparent electrode to a certain position on the n-type cladding layer to form a countertop structure; a second treatment process is performed using a plasma treatment using oxygen or an oxygen-containing gas; and a formation process is performed to form a first electrode on the transparent electrode and a second electrode on the exposed portion of the n-type cladding layer.

As described above, according to one aspect of the present invention, there is an advantage in that the generation of internal pressure is reduced and the hole density is increased, thereby being able to improve light efficiency.

According to one aspect of the present invention, a hybrid cladding layer made of different semiconductor materials can reduce internal stress and increase hole density, thereby improving light efficiency.

According to one aspect of the present invention, there is an advantage in that the generation of internal pressure is reduced and the density of holes is increased by using a cladding layer made of a different material such as zinc oxide (ZnO), thereby improving light efficiency.

According to one aspect of the present invention, there is an advantage in that excellent light output can be achieved by making the current flow uniform and including a reflective electrode with excellent reflectivity.

In addition, according to one aspect of the present invention, there is an advantage in that light output can be improved by minimizing the obstruction of light output caused by the opaque metal electrode.

100, 1100, 1900, 2700, 3800: Light-emitting element

110, 2710: Substrate

1110, 130, 2730: Active layer

1120, 210, 2810: p-type cladding layer

120, 2720: n-type cladding layer

1210: First barrier layer

1220, 1220a, 1220b, 1220c, 1220n: Well layers

1230: Second barrier layer

1310a, 1310b, 1310c, 1310n: Barrier layer

140, 2740: p-type semiconductor layer

1410, 220: Internal pressure relief layer

1420, 230: Hole transport efficiency enhancement layer

150: Electrode, protective layer

155, 160, 165, 2760, 2765: Electrodes

1910: Insulation Film

2010: Metal Electrode

2020: Protective layer

2030: Metal contact layer

2750: Transparent Electrode

2820: p-type oxide layer

2830: Current flow resistance

3810: Leakage current prevention unit

FIG1 is a diagram showing the structure of a light-emitting element according to the first embodiment of the present invention.

FIG2 is a diagram showing the structure of a p-type semiconductor layer according to the first embodiment of the present invention.

FIG3 is a graph showing the internal quantum efficiency of the light-emitting element according to the first embodiment of the present invention and a conventional light-emitting element.

FIG4 is a graph comparing the internal characteristics of the active layer of the light-emitting element according to the first embodiment of the present invention and a conventional light-emitting element.

Figures 5 to 10 are diagrams illustrating the manufacturing process of the light-emitting element according to the first embodiment of the present invention.

FIG11 is a diagram showing the structure of a light-emitting element according to a second embodiment of the present invention.

Figures 12 and 13 are diagrams showing the structure and energy band characteristics of the active layer according to the second embodiment of the present invention.

FIG14 is a diagram showing the structure of a p-type cladding layer according to the second embodiment of the present invention.

Figures 15 to 17 are diagrams illustrating the manufacturing process of a light-emitting element according to the second embodiment of the present invention.

FIG18 is a graph showing changes in the light-emitting intensity of a light-emitting element according to the second embodiment of the present invention depending on the applied current.

FIG19 is a diagram showing the structure of a light-emitting element according to a third embodiment of the present invention.

Figures 20a and 20b are diagrams showing the structure of an electrode layer according to the third embodiment of the present invention.

Figure 21 is a graph showing the voltage and current characteristics of electrodes realized with different compositions.

Figures 22a and 22b are graphs showing the voltage and current characteristics of Al or Al/Ag-based ohmic electrodes.

Figures 23 and 24 are diagrams showing the structure of an electrode according to a third embodiment of the present invention.

Figures 25 and 26 are diagrams illustrating the manufacturing process of a light-emitting element according to the third embodiment of the present invention.

FIG27 is a diagram showing the structure of a light-emitting element according to a fourth embodiment of the present invention.

FIG28 is a diagram showing the structure of a p-type semiconductor layer according to the fourth or fifth embodiment of the present invention.

Figure 29 is a plan view of a p-type semiconductor layer according to the fourth or fifth embodiment of the present invention.

FIG30 is a graph comparing the light efficiencies of the light emitting element according to the fourth embodiment of the present invention and conventional light emitting elements.

Figures 31 to 37 are diagrams illustrating a manufacturing process of a light-emitting element according to an embodiment of the present invention.

FIG38 is a diagram showing the structure of a light-emitting element according to a fifth embodiment of the present invention.

The present invention is susceptible to numerous modifications and various embodiments, and thus specific embodiments are illustrated in the drawings and described in detail. However, this is not intended to limit the present invention to any specific embodiment; rather, the present invention should be understood to encompass all modifications, equivalents, and even alternatives falling within the spirit and technical scope of the present invention. Similar reference numerals are used to represent similar structural elements in each figure.

Terms such as "first," "second," "A," and "B" may be used to describe various structural elements, but the structural elements described above are not limited to these terms. These terms are used to distinguish one structural element from another. For example, without departing from the scope of protection of the present invention, a "first structural element" can be referred to as a "second structural element," and similarly, a "second structural element" can be referred to as a "first structural element." The term "and/or" may include a combination of multiple related described items or any one of the multiple related described items.

It will be understood that when an element is referred to as being “connected” or “coupled” to another structural element, the two structural elements may be directly connected or coupled to each other, or an intervening structural element may exist between the two structural elements. In contrast, when a structural element is referred to as being “directly connected or coupled,” there are no intervening structural elements between the two structural elements.

The terms used in this application are intended only to describe specific embodiments and are not intended to limit the present invention. Unless otherwise specified, terms indicating the singular should be understood to include the plural. In this application, terms such as "including," "comprising," or "having" indicate the presence of stated features, numbers, steps, operations, structural elements, components, or combinations thereof, but do not preclude the presence or addition of one or more other features, numbers, steps, operations, structural elements, components, or combinations thereof.

Unless otherwise defined, all terms used herein, including technical or scientific terms, have the same meaning as commonly understood by a person of ordinary skill in the art to which this invention belongs.

Terms that have the same meaning as those defined in commonly used dictionaries should be interpreted as having the same meaning as in the relevant technical articles and should not be interpreted as having unusual or overly formal meanings unless expressly defined in this specification.

In addition, each configuration, process, process, or method included in each embodiment of the present invention can be shared within the scope of technical non-inconsistency.

FIG1 is a diagram showing the structure of a light-emitting element according to an embodiment of the present invention.

1 , a light-emitting device 100 according to one embodiment of the present invention includes a substrate 110, an n-type cladding layer 120, an active layer 130, a p-type semiconductor layer 140, a protective layer 150, and electrodes 160 and 165.

The n-type cladding layer 120 is grown on the upper end of the substrate 110. The substrate 110 can be made of sapphire, but is not necessarily limited thereto and can be replaced by any material capable of growing gallium nitride (GaN).

The n-type cladding layer 120 is deposited on the substrate 110 and is made of a semiconductor material doped with an n-type dopant to provide electrons to the active layer 130. The n-type cladding layer 120 can be deposited on the substrate 110 using an epitaxy single crystal deposition method. The n-type cladding layer 120 can be made of, but is not limited to, n-type gallium nitride (n-GaN) and can be substituted with n-type InGaN, n-type AlGaN, n-type AlInGaN, or a combination thereof.

Active layer 130 is deposited on n-type cladding layer 120. In active layer 130, electrons supplied from n-type cladding layer 120 and holes supplied from p-type semiconductor layer 140 meet and recombine, generating light. Active layer 130 is implemented by a well layer (not shown) with a relatively small energy bandgap and a barrier layer (not shown) with a relatively large energy bandgap. Active layer 130 can be implemented by InGaN layers with varying In concentrations, InGaN/GaN, GaN/AlGaN layers, or combinations thereof.

P-type semiconductor layer 140 is deposited on active layer 130 and provides holes to active layer 130. Since p-type semiconductor layer 140 has the structure shown in FIG2 , it is possible to improve the transfer rate of holes to active layer 130 while minimizing internal stress (strain).

Figure 2 shows the structure of a p-type semiconductor layer according to an embodiment of the present invention, and Figure 4 compares the internal characteristics of the active layer of a light-emitting element according to an embodiment of the present invention and a conventional light-emitting element.

2 , the p-type semiconductor layer 140 according to one embodiment of the present invention includes a p-type cladding layer 210 , an internal stress relief layer 220 , and a hole transport efficiency enhancement layer 230 .

A p-type cladding layer 210 is deposited directly above the active layer 130. It is made of a semiconductor material doped with a p-type dopant to provide holes for transmission to the active layer 130. The p-type cladding layer 210 can be deposited on the active layer 130 using an epitaxial single crystal deposition method. As with conventional techniques, the p-type cladding layer 210 can be made of p-type gallium nitride (p-GaN), but is not necessarily limited to this material. Alternatively, p-type InGaN, p-type AlGaN, p-type AlInGaN, or a combination thereof can be used.

The internal stress relief layer 220 is deposited on the p-type cladding layer 210 to a predetermined thickness to minimize any internal stress that may occur between the active layer 130 and the p-type cladding layer 210.

The internal stress relief layer 220 can be deposited using chemical vapor deposition (CVD), molecular beam epitaxy (MBE), pulsed laser deposition (PLD), or a hybrid method (HBD) of these deposition methods. In particular, to address the aforementioned issues, the internal stress relief layer 220 is preferably formed from a zinc oxide-based compound (described below). Therefore, it is preferably deposited using the HBD method, which utilizes equipment specifically developed for oxide deposition.

The internal stress relief layer 220 is implemented by a zinc oxide (ZnO)-based compound. The internal stress relief layer 220 may be implemented by zinc oxide (ZnO) having a hexagonal crystal structure, or by an oxide containing zinc (Zn) and elements from Groups 2 and 6 of the periodic table. For example, the internal stress relief layer 220 may be implemented by ZnO, BeZnO, MgZnO, BeMgZnO, ZnSO, ZnSeO, ZnSSeO, ZnCdO, or ZnCdSeO. The internal stress relief layer 220 implemented in this manner has physical, electrical, and optical properties very similar to those of the p-type cladding layer 210, but has a larger lattice constant and a higher hole concentration than the p-type cladding layer 210. The internal stress relief layer 220 can reduce the internal stress between the active layer 130 and the p-type cladding layer 210. When the internal stress between the active layer 130 and the p-type cladding layer 210 is reduced, the effect shown in FIG. 4 can occur. Referring to Figure 4 , it can be seen that compared to conventional LEDs, light-emitting element 100 has a relatively small flat-band voltage and piezoelectric voltage, resulting in a relatively wide depletion layer. This facilitates hole injection into active layer 130 and significantly improves internal quantum efficiency.

The internal stress relief layer 220 can be deposited on the p-type cladding layer 210 to a predetermined thickness. Here, the predetermined thickness can be 10 nm to 1000 nm, more preferably 50 nm to 200 nm.

To inject more holes into the active layer 130, the internal stress relief layer 220 can be doped with p-type impurities at a preset concentration, or zinc vacancies can be generated without doping.

Internal stress relief layer 220 may be doped with p-type impurities within a preset concentration range. The doped impurities may be p-type acceptor impurities, such as one or more of H, Li, Na, K, Rb, Cs, Fr, Cu, Ag, N, P, As, Sb, and Bi. These p-type acceptor impurities may be doped into a zinc oxide-based compound to form internal stress relief layer 220, and may be doped at a preset concentration. The preset concentration is 1*10 ¹⁷ atoms/cm ^-3 to 1*10 ²⁰ atoms/cm ^-3 , and more preferably 5*10 ¹⁸ atoms/cm ^-3 to 5*10 ¹⁹ atoms/cm ^-3 .

On the other hand, the internal stress relief layer 220 can generate zinc vacancies without doping. The internal stress relief layer 220 can be formed by depositing an undoped zinc oxide-based compound on the surface of the p-type cladding layer 210 and then heat-treating the compound in an oxygen-containing environment. The heat treatment can be performed in a suitable environment at a temperature of 400°C to 700°C, more preferably 450°C to 550°C, for 1 minute to 600 minutes, and even more preferably 10 minutes to 60 minutes. When the zinc oxide-based compound is heat-treated in the aforementioned environment, the content of metal atoms, such as zinc, that constitute the zinc oxide-based compound becomes insufficient, thereby increasing the hole concentration in the internal stress relief layer 220. Through this process, the internal stress relief layer 220 minimizes the internal stress that may occur between the active layer 130 and the p-type cladding layer 210 and facilitates hole injection into the active layer 130.

The hole transport efficiency enhancement layer 230 is deposited on the internal stress relief layer 220 with a predetermined thickness to form an ohmic contact, thereby creating a low contact resistance between the internal stress relief layer 220 and the protective layer 150.

Similar to the internal stress relief layer 220, the hole transport enhancing layer 230 is also made of a zinc oxide (ZnO)-based compound and deposited to a predetermined thickness. P-type impurities, n-type impurities, or both p-type and n-type impurities can be doped into the hole transport enhancing layer 230. The hole transport enhancing layer 230 can be doped using a rapid thermal process, plasma treatment/ion implantation, or a process using an acid or alkaline solution. To ensure that photons generated in the active layer 130 are not absorbed by itself and that current can flow easily through tunneling effects, the predetermined thickness can be less than 50 nm, more preferably within a range of 1 nm to 10 nm.

The hole transport enhancing layer 230 is doped with an impurity at a predetermined concentration. The predetermined concentration may be a concentration sufficient to alter the energy band gap and form ohmic contact between the internal stress relief layer 220 and the protective layer 150. The predetermined concentration may be greater than 1*10 ¹⁹ atoms/cm ^-3 , and more specifically, may be between 5*10 ¹⁹ atoms/cm ^-3 and 1*10 ²¹ atoms/cm ^-3 . The impurity doped into the hole transport enhancing layer 230 serves as an acceptor impurity and may be, for example, one or more of H, Li, Na, K, Rb, Cs, Fr, Cu, Ag, N, P, As, Sb, and Bi. More preferably, the acceptor impurity may be N, P, or As, and even more preferably, N or As. On the other hand, the impurities doped into the hole transport enhancing layer 230 are donor impurities and may be one or more of B, Al, Ga, In, Ti, F, Cl, Br, and I. More preferably, the donor impurities may be Al, Ga, or In. Alternatively, the impurities doped into the hole transport enhancing layer 230 may include one or more acceptor impurities and one or more donor impurities. These impurities are doped into the hole transport enhancing layer 230 at a concentration equal to or greater than a predetermined concentration.

When the aforementioned impurities are doped into the hole transport efficiency enhancing layer 230 at a predetermined concentration, the impurities can be formed by treating the surface of the internal stress relief layer 220 with plasma or by an ion implantation process. The ion implantation process allows the predetermined concentration (as described above) of the impurities to be implanted into the hole transport efficiency enhancing layer 230 at a predetermined thickness.

Alternatively, the hole transport efficiency enhancing layer 230 can be formed by depositing the internal stress relief layer 220 on the p-type cladding layer 210 through a high-temperature heat treatment process or a rapid thermal treatment process at 300°C to 1000°C in a gas environment containing the aforementioned impurity molecules.

Alternatively, the hole transport efficiency enhancement layer 230 can be formed by depositing the internal stress relief layer 220 on the p-type cladding layer 210 and then surface treating the internal stress relief layer 220 with an acid or alkaline solution containing the aforementioned impurity molecules.

When p-type semiconductor layer 140 includes the aforementioned p-type cladding layer 210, internal stress relief layer 220, and hole transport efficiency enhancement layer 230, it minimizes the internal stress that may arise between active layer 130 and p-type cladding layer 210, allowing more holes to be transferred to active layer 130. Furthermore, by forming an ohmic contact between p-type semiconductor layer 140 and protective layer 150, it facilitates the deposition of protective layer 150. In particular, p-type semiconductor layer 140 can inject a significantly larger number of holes into active layer 130 than before, thereby removing electrons that are excessively supplied to and accumulated in active layer 130. Therefore, the p-type semiconductor layer 140 can improve the light emission efficiency by removing the piezoelectric field formed by the accumulated electrons in the active layer 130.

Protective layer 150 is deposited on p-type semiconductor layer 140 to protect it from external influences. P-type semiconductor layer 140, particularly internal stress relief layer 220 and hole transport efficiency enhancement layer 230 within p-type semiconductor layer 140, is made of the aforementioned components and therefore reacts with most acidic and alkaline chemical substances. Therefore, protective layer 150 is deposited on p-type semiconductor layer 140 to protect it from external influences. On the other hand, because protective layer 150 is deposited on p-type semiconductor layer 140, it must diffuse the current injected by electrode 165 while undisturbed by the propagation of light generated in active layer 130, thereby uniformly transferring holes to active layer 130 across the entire region of p-type semiconductor layer 140. Therefore, protective layer 150 is implemented using a material having a transmittance in the visible light wavelength band equal to or greater than a preset first reference value and an electrical conductivity equal to or greater than a preset second reference value. For example, protective layer 150 can be implemented using ITO, NiO, GaZnO, InZnO, InGaZnO, or graphene. Protective layer 150 is formed from the aforementioned components and is deposited on p-type semiconductor layer 140 by physical vapor deposition (PVD) such as electron beam (E-beam) deposition or sputtering, or chemical vapor deposition (CVD). Protective layer 150 can be deposited to a predetermined thickness, for example, within a range of 10 nm to 1000 nm.

When protective layer 150 is implemented in this manner, it is possible to uniformly inject holes from p-type semiconductor layer 140 into active layer 130 while protecting p-type semiconductor layer 140 from external influences.

Electrodes 160 and 165 are formed on the n-type cladding layer 120 and the protective layer 150, respectively, and supply current to each component 120 and 150. Electrode 160 is formed on the etched and exposed portion of the n-type cladding layer 120, while electrode 165 is formed on the protective layer 150. Electrodes 160 and 165 can be made of one or more metals selected from the group consisting of Al, Ag, Cr, Cu, Mo, Ni, Pd, Ti, and W, or alloys thereof. In particular, since electrode 165 is positioned in the direction of light irradiated from the active layer 130, it can be made of Al or Ag, which have excellent reflectivity.

Since the light-emitting element 100 includes the above-described structure, it can be confirmed that it has excellent quantum efficiency (light efficiency) as shown in Figure 3.

Figure 3 is a graph showing the internal quantum efficiency of a light-emitting element according to an embodiment of the present invention and a conventional light-emitting element.

Referring to Figure 3, it can be confirmed that the internal quantum efficiency of light-emitting element 100 is improved by more than 30% compared to conventional light-emitting elements.

Figures 5 to 10 illustrate a process for manufacturing a light-emitting element according to an embodiment of the present invention. The light-emitting element 100 can be manufactured using a light-emitting element manufacturing apparatus.

5 to 8 , an n-type cladding layer 120 , an active layer 130 , a p-type semiconductor layer 140 , and a protective layer 150 are sequentially deposited on a substrate 110 .

Referring to Figure 9, etching is performed on one surface of the active layer 130, the p-type semiconductor layer 140, the protective layer 150, and the n-type cladding layer 120. The etching proceeds vertically from the protective layer 150 to a portion of the n-type cladding layer 120.

Referring to FIG. 10 , as etching proceeds, an electrode 160 is formed on the n-type cladding layer 120 exposed to the outside, and an electrode 165 is formed on the protective layer 150 .

FIG11 is a diagram showing the structure of a light-emitting element according to a second embodiment of the present invention.

Referring to Figure 11 , a light-emitting device 1100 according to the second embodiment of the present invention includes a substrate 110, an n-type cladding layer 120, an active layer 1110, a p-type cladding layer 1120, a protective layer 150, and electrodes 160 and 165. Since the components of the substrate 110, n-type cladding layer 120, protective layer 150, and electrodes 160 and 165 are identical to those of the light-emitting device 100, repeated description will be omitted.

Similar to the active layer 130, the active layer 1110 is deposited on the n-type cladding layer 120, where electrons provided by the n-type cladding layer 120 combine with holes provided by the p-type cladding layer 1120 to generate light. The active layer 130 is implemented by a well layer (quantum well) with a relatively small energy bandgap and a barrier layer (quantum barrier) with a relatively large energy bandgap. The active layer 130 can be implemented by InGaN layers with different indium concentrations, InGaN/GaN, or GaN/AlGaN layers, or a combination thereof.

In particular, active layer 1110 includes a barrier layer at its outermost periphery. This barrier layer is designed to have a thickness equal to or greater than a predetermined thickness to prevent oxygen from entering the interior of active layer 1110. However, to ensure the density and mobility of electrons and holes, n-type dopants are doped into the outermost barrier layer near n-type cladding layer 120, while p-type dopants are doped into the outermost barrier layer near p-type cladding layer 1120. This prevents oxygen from entering the active layer 1110. Even without an additional layer (e.g., a protective layer) outside the active layer 1110 for preventing oxygen inflow, the active layer 1110 can still prevent oxygen inflow. The specific structure of the active layer 1110 is shown in Figures 12 and 13.

Figures 12 and 13 are diagrams showing the structure and energy band characteristics of the active layer according to the second embodiment of the present invention.

As can be seen from FIG12 , the well layer 1220 is implemented to have a relatively small energy band gap, while the barrier layers 1210 and 1230 are implemented to have relatively large energy band gaps.

At this time, as described above, the outermost barrier layer 1210 (hereinafter referred to as the first barrier layer) near the n-type cladding layer 120 and the outermost barrier layer 1230 (hereinafter referred to as the second barrier layer) near the p-type cladding layer 1120 are implemented to have a thickness equal to or greater than a preset thickness. In addition, in order to ensure the density and mobility of electrons, the first barrier layer 1210 is implemented by GaN, InGaN or AlGaN doped with GaNn-type impurities such as Si or Ge at a concentration of 1* ¹⁰¹⁶ cm ^-3 to 1* ¹⁰²⁰ cm- ³ , and, in order to ensure the density and mobility of holes, the second barrier layer 1230 is implemented by GaN, InGaN or AlGaN doped with p-type impurities such as Mg at a concentration of 1* ¹⁰¹⁶ cm-3 to 1* ¹⁰²⁰ cm ^-3 .

Alternatively, as shown in FIG13 , multiple well layers 1220 a to 1220 n and multiple barrier layers 1310 a to 1310 n are deposited between the first barrier layer 1210 and the second barrier layer 1230 , and the active layer 1110 can be implemented as a multi-quantum well.

When the active layer 1110 has this structure, existing GaN-based light-emitting devices do not need to include an electron blocking layer (EBL) between the active layer and the p-type cladding layer to control the flow of electrons.

Referring again to FIG. 11 , p-type cladding layer 1120 is deposited on active layer 1110, particularly on second blocking layer 1230, and provides holes to active layer 1110. Since p-type cladding layer 1120 has the structure shown in FIG. 14 , internal stress (strain) is minimized and the transmission rate of holes to active layer 1110 is improved.

FIG14 is a diagram showing the structure of a p-type cladding layer according to the second embodiment of the present invention.

14 , the p-type cladding layer 1120 according to the second embodiment of the present invention includes an internal stress relief layer 1410 and a hole transport efficiency enhancement layer 1420.

The internal pressure relief layer 1410 has the same properties as the internal pressure relief layer 220, except that it is deposited directly on the upper end of the second barrier layer 1230.

The hole transport efficiency enhancing layer 1420 also has the same characteristics as the hole transport efficiency enhancing layer 230.

When p-type cladding layer 1120 includes the aforementioned components, namely internal stress relief layer 1410 and hole transport efficiency enhancement layer 1420, it can minimize the internal stress that may arise between active layer 1110 and itself, significantly improving hole transport efficiency. Furthermore, it forms ohmic contact between itself and protective layer 150, enabling deposition of protective layer 150.

It can be confirmed that the light-emitting element 1100 has the characteristics of light emission intensity shown in Figure 18 due to the above-mentioned structure.

FIG18 is a graph showing changes in the light-emitting intensity of a light-emitting element according to the second embodiment of the present invention depending on the applied current.

Referring to Figure 18 , it can be confirmed that light-emitting element 1100 outputs light in the blue wavelength band, and the luminous intensity increases with increasing injected current.

Figures 15 to 17 are diagrams illustrating the manufacturing process of a light-emitting element according to the second embodiment of the present invention.

15 to 17 , an n-type cladding layer 120 , an active layer 130 , a p-type semiconductor layer 140 , and a protective layer 150 are sequentially deposited on a substrate 110 . More specifically, an internal stress relief layer 1410 and a hole transport efficiency enhancement layer 1420 are deposited on the active layer 130 .

Thereafter, the light-emitting element is manufactured according to the same process as that described above with reference to Figures 9 and 10.

FIG19 is a diagram showing the structure of a light-emitting element according to a third embodiment of the present invention.

19 , a light-emitting device 1900 according to one embodiment of the present invention includes a substrate 110, an n-type cladding layer 120, an active layer 130, a p-type semiconductor layer 140, electrodes 150 and 155, and an insulating film 1910. Since the substrate 110, n-type cladding layer 120, active layer 130, and electrodes 150 and 155 in light-emitting device 1900 according to one embodiment of the present invention are identical to those in light-emitting device 100, repeated descriptions will be omitted. On the other hand, the p-type semiconductor layer 140 in the light-emitting device 1900 according to one embodiment of the present invention is implemented with the same configuration as the p-type semiconductor layer in the light-emitting device 100. Except for the hole transport efficiency enhancement layer 230 being doped with a predetermined concentration of impurities to form an ohmic contact between the internal stress relief layer 220 and the electrode 150, all other aspects are implemented in the same manner.

Electrode 150 is deposited on p-type semiconductor layer 140, more specifically, on hole transport efficiency enhancing layer 230, to supply current to p-type semiconductor layer 140. Electrode 150 is made of a metal with excellent reflectivity and reflects light generated in active layer 130 toward n-type cladding layer 120. Typically, electrode 150 can be deposited using methods such as electron beam (EB), evaporation, or sputtering. Electrode 150 has the structure shown in Figure 20a or Figure 20b and performs the above-described operations.

Figures 20a and 20b are diagrams showing the structure of an electrode layer according to the third embodiment of the present invention.

Referring to FIG. 20a , the electrode layer 150 (the same also applies to 155 described below) according to one embodiment of the present invention includes a metal electrode 2010 and a protective layer 2020.

The metal electrode 2010 functions as an electrode while reflecting incident light. The metal electrode 2010 is deposited on the hole transport efficiency enhancing layer 230 and reflects incident light. The metal electrode 2010 can be made of aluminum (Al) or can include aluminum (Al) and silver (Ag). When made of aluminum, the metal electrode 2010 can have a thickness of 20 nm to 10,000 nm. When including aluminum and silver, the metal electrode 2010 can be formed by first depositing aluminum to a thickness of less than 10 nm and then depositing silver to a thickness of 200 nm to 1,000 nm on the aluminum.

A protective layer 2020 is deposited on the metal electrode 2010 to protect it from external influences. As mentioned above, the metal electrode 2010 is made of a metal with excellent reflectivity, such as aluminum or silver, to reflect incident light. However, the metal used to make the metal electrode 2010 is easily oxidized and reacts chemically with water and other chemicals. Therefore, the protective layer 2020 is deposited on the metal electrode 2010 to minimize its exposure to the external environment. The protective layer 2020 can be made of aluminum (Al), titanium (Ti), chromium (Cr), nickel (Ni), copper (Cu), palladium (Pd), molybdenum (Mo), tungsten (W), ruthenium (Re), platinum (Pt), gold (Au), or alloys thereof, which have low reactivity with other components.

When the electrode layer 150 has this structure, it can transmit current to the p-type semiconductor layer 140 and reflect light incident thereon while having high stability.

On the other hand, the electrode layer 150 according to one embodiment of the present invention can be implemented as shown in FIG. 20b.

Referring to FIG. 20 b , the electrode layer 150 (the same also applies to 155 described below) according to one embodiment of the present invention may include a metal contact layer 2030 in addition to the metal electrode 2010 and the protective layer 2020.

Even if the metal electrode 2010 is deposited on the hole transport efficiency enhancing layer 230, it may be easily peeled off due to its relatively weak contact force. Therefore, in order to improve the contact force of the metal electrode 2010 on the hole transport efficiency enhancing layer 230, the metal contact layer 2030 can be preferentially deposited between the hole transport efficiency enhancing layer 230 and the metal electrode 2010. The metal contact layer 2030 can be implemented by aluminum (Al) and can be deposited in the form of a thin film with a thickness of less than 10 nm. Alternatively, to further enhance contact strength, the metal contact layer 2030 can be implemented by first depositing an additional metal layer made of chromium (Cr), titanium (Ti), palladium (Pd), or molybdenum (Mo) with a thickness of less than 2 nm on the hole transport efficiency enhancing layer 230, followed by depositing an aluminum (Al) layer with a thickness of less than 10 nm on this layer. The metal electrode 2010 and the protective layer 2020 can be deposited on the metal contact layer 2030, thereby further enhancing the contact strength between the metal electrode 2010 and the protective layer 2020.

Referring again to FIG. 19 , electrode 150 has the structure described above and performs the above-described operations. At this point, electrode 150, when deposited on p-type semiconductor layer 140, may have the structure shown in FIG. 23 or FIG. 24 .

Figures 23 and 24 are diagrams showing the structure of an electrode according to a third embodiment of the present invention.

23 , the electrode 150 according to one embodiment of the present invention may have a structure uniformly deposited on the p-type semiconductor layer 140 , more specifically, a structure uniformly deposited on the hole transport efficiency enhancing layer 230 .

On the other hand, referring to FIG. 24 , before depositing the electrode 150, a portion of the internal stress-relieving layer 220 and the hole-transport-enhancing layer 230 can be etched, or at predetermined intervals. This exposes a portion of the p-type cladding layer 210. The electrode 150 can be deposited while the internal stress-relieving layer 220 and the hole-transport-enhancing layer 230 are being etched. This allows the electrode 150 to directly contact a portion of the p-type cladding layer 210, eliminating the need for the electrode 150 to pass through the internal stress-relieving layer 220 and the hole-transport-enhancing layer 230. This allows for more efficient current transfer directly to the p-type cladding layer 210.

Referring again to Figure 19 , electrode 155 is deposited on n-type cladding layer 120 to supply electrons to n-type cladding layer 120. Typically, electrode 155 can be deposited using methods such as electron beam (EB) deposition, evaporation, or sputtering. Like electrode 150, electrode 155 is made of a metal with excellent reflectivity, thereby improving light extraction efficiency. Structurally, light generated in active layer 130 does not directly reach electrode 155. However, due to the refractive index difference between light-emitting element 100 and air, light generated in active layer 130 is trapped within light-emitting element 100. Therefore, a significant amount of light generated and released from active layer 130 can also be incident on electrode 155. Electrode 155 is made of a metal with excellent reflectivity, improving the light output characteristics of light-emitting element 100 by reflecting light rather than absorbing it.

As shown in FIG20a, electrode 155 includes the aforementioned reflective electrode 2010 and protective layer 2020. Alternatively, as shown in FIG20b, electrode 155 may include a metal contact layer 2030 in addition to metal electrode 2010 and protective layer 2020. Therefore, electrode 155 has the electrical characteristics shown in FIG21 or FIG22.

Figure 21 is a graph showing the voltage and current characteristics of electrodes realized with different compositions, and Figures 22a and 22b are graphs showing the voltage and current characteristics of Al or Al/Ag-based ohmic electrodes.

Referring to Figure 21 , it can be confirmed that even when the metal electrode 2010 comprising aluminum (Al) or aluminum (Al) and silver (Ag) is preferentially deposited on the n-type cladding layer 120, a high-quality ohmic contact can be formed. However, if a metal contact layer 2030 made of, for example, chromium (Cr) is first deposited, followed by the metal electrode 2010, a more stable contact is achieved, enabling the formation of a high-quality ohmic contact.

On the other hand, referring to Figures 22a and 22b, although silver (Ag) has the highest reflectivity, it does not form an ohmic contact when deposited on n-type cladding layer 120, making its use as n-type metal electrode 2010 potentially challenging. However, as described above, since metal electrode 2010 is implemented as comprising aluminum and silver, it can form a high-quality ohmic contact. Furthermore, metal contact layer 2030 can be additionally deposited between hole transport efficiency enhancing layer 230 and n-type metal electrode 2010 to form an even better ohmic contact. Consequently, electrodes 150 and 155 can form an excellent ohmic contact with p-type semiconductor layer 140.

Referring again to Figure 19 , an insulating film 1910 is laminated onto the side surfaces of the n-type cladding layer 120 , the active layer 130 , and the p-type semiconductor layer 140 , as well as the side surfaces and a portion of the top surface of the electrodes 150 and 155 , thereby protecting each component within the light-emitting element 100 from external influences and electrically isolating the n-type region from the p-type region.

Figures 25 and 26 are diagrams illustrating the manufacturing process of a light-emitting element according to the third embodiment of the present invention.

The manufacturing process is carried out as shown in Figures 5 to 9.

Referring to FIG. 25 , while etching is being performed, an electrode 155 is deposited on the n-type cladding layer 120 exposed to the outside.

Referring to Figure 26, the insulating film 1910 is laminated onto the side surfaces of the n-type cladding layer 120, the active layer 130, and the p-type semiconductor layer 140, as well as the side surfaces and a portion of the top surface of the electrodes 150 and 155.

FIG27 is a diagram showing the structure of a light-emitting element according to a fourth embodiment of the present invention.

Referring to Figure 27 , a light-emitting device 2700 according to the fourth embodiment of the present invention includes a substrate 2710, an n-type cladding layer 2720, an active layer 2730, a p-type semiconductor layer 2740, a transparent electrode 2750, and electrodes 2760 and 2765. Substrate 2710, n-type cladding layer 2720, and active layer 2730 have the same configuration as substrate 110, n-type cladding layer 120, and active layer 130, and can perform the same operations.

A p-type semiconductor layer 2740 is deposited on the active layer 2730 and provides holes to the active layer 2730. Since the p-type semiconductor layer 2740 employs the structure shown in Figure 28 , it prevents light from being emitted to the electrode 2765 located in the light emission direction (the electrode located away from the substrate 2710), thereby improving the light output of the light-emitting element 2700.

FIG28 is a diagram illustrating the configuration of a p-type semiconductor layer according to the fourth or fifth embodiment of the present invention. FIG29 is a plan view of the p-type semiconductor layer according to the fourth or fifth embodiment of the present invention. FIG30 is a graph comparing the light emitting element according to the fourth embodiment of the present invention and a conventional light emitting element.

28 , the p-type semiconductor layer 2740 according to the fourth or fifth embodiment of the present invention includes a p-type cladding layer 2810 and a p-type oxide layer 2820. The p-type cladding layer 2810 and the p-type oxide layer 2820 are implemented with the same configurations as the p-type cladding layer 210 and the internal stress relief layer 220, respectively, and are capable of performing the same operations.

On the other hand, a current flow barrier 2830, having an area equal to or greater than that of electrode 2765, is formed in a region within p-type cladding layer 2810, more specifically, vertically below the region where electrode 2765 will be positioned. Current flow barrier 2830 is formed by plasma treatment or ion/electron implantation using oxygen or an oxygen-containing gas. This process is performed at a location aligned with the center of electrode 2765 on p-type cladding layer 2810, and covers an area equal to or greater than the total (cross-sectional) area of electrode 2765. When plasma treatment or ion/electron implantation is performed on p-type cladding layer 2810, the physical properties (primarily those that affect current flow or electrical characteristics) of p-type cladding layer 2810 change, hindering the flow of current (holes). The flow of current (in this case, holes) is hindered in the areas where the plasma treatment or implantation process has occurred. Subsequently, when p-type oxide layer 2820 is deposited on p-type cladding layer 2810 with altered physical properties, the composition of p-type oxide layer 2820 influences the areas where the physical properties of p-type cladding layer 2810 have changed, thereby forming current flow blocking portion 2830 within p-type cladding layer 2810. This can be clearly seen in Figure 29 . Referring to Figure 29 , it can be seen that when p-type oxide layer 2820 is deposited on p-type cladding layer 2810, current flow block 2830 is formed at the boundary between p-type cladding layer 2810 and p-type oxide layer 2820. Current flow block 2830 blocks most or all current. Since current flow block 2830 is not implemented by adding a separate thin film layer on p-type cladding layer 2810, no additional deposition process is required.

Because the current flow barrier 2830 is formed vertically below the electrode 2765 and its area is at least equal to the area of the electrode 2765, when the p-type cladding layer 2810 transfers holes to the active layer 2730, the holes are transferred to all areas of the active layer 2730 except the area where the current flow barrier 2830 is formed. Therefore, when holes and electrons recombine in the active layer 2730 and emit light, the light generated in areas other than the area where the electrode 2765 is located can freely escape the active layer 2730 without being significantly disturbed by the electrode 2765. As shown in Figure 30, the light output of the light-emitting element 2700 is increased by approximately 7% compared to conventional light-emitting elements.

Referring again to Figure 27 , transparent electrode 2750 is stacked on p-type semiconductor layer 2740, more specifically, on p-type oxide layer 2820, and supplies current to p-type semiconductor layer 2740. To supply current (holes) from p-type semiconductor layer 2740 to the entire area of active layer 2730, excluding current flow blocking portion 2830, transparent electrode 2750, which exhibits excellent conductivity and good transparency, is deposited on p-type oxide layer 2820. Transparent electrode 2750 can be made of ITO, NiO, GaZnO, InZnO, or InGaZnO, due to their transparency and excellent conductivity.

Electrodes 2760 and 2765 are formed on n-type cladding layer 2720 and transparent electrode 2750, respectively, and supply current to each component 2720 and 2750. Electrode 2760 is formed on the etched and exposed portion of n-type cladding layer 2720, while electrode 2765 is formed on transparent electrode 2750. Electrodes 2760 and 2765 can be made of one or more metals selected from the group consisting of Al, Ag, Cr, Cu, Mo, Ni, Pd, Ti, and W, or alloys thereof.

Since light-emitting element 2700 includes the above-described structure, it is possible to ensure excellent light output by minimizing the amount of light that strikes electrode 2765.

Figures 31 to 37 illustrate a process for manufacturing a light-emitting element according to a fourth embodiment of the present invention. Light-emitting element 2700 can be manufactured using a light-emitting element manufacturing apparatus.

31 and 32 , an n-type cladding layer 2720 , an active layer 2730 , and a p-type cladding layer 2810 are sequentially deposited on a substrate 2710 .

Referring to FIG. 33 , after depositing the p-type cladding layer 2810, a plasma treatment or ion/electron implantation process is performed on the region where the current flow barrier 2830 is to be formed (at least the same region vertically below the electrode 2765).

Referring to FIG. 34 , a p-type oxide layer 2820 is deposited on a p-type cladding layer 2810 . Thus, a current flow barrier 2830 is formed within the p-type cladding layer 2810 .

Referring to Figure 35, the transparent electrode 2750 is stacked on the p-type oxide layer 2820.

Referring to Figure 36, etching is performed from the transparent electrode 2750 to a certain position of the n-type cladding layer 2720 in the form of a countertop structure.

Referring to FIG. 37 , as etching proceeds, an electrode 2760 is formed on the n-type cladding layer 2720 exposed to the outside, and an electrode 2765 is formed on the transparent electrode 2750.

FIG38 is a diagram showing the structure of a light-emitting element according to a fifth embodiment of the present invention.

38 , the light-emitting element 3800 according to the fifth embodiment of the present invention may further include a leakage current prevention portion 3810 within the p-type cladding layer 2810.

The p-type cladding layer 2810 in the light-emitting element 3800 may also include leakage current prevention portions 3810 at both ends. If the light-emitting element has a countertop structure, there is a risk of undesired current being injected into the p-type cladding layer 2810 at the countertop edge.

To prevent this problem, p-type cladding layer 2810 may further include leakage current prevention portions 3810 at both ends. As described above with reference to FIG. 36 , when etching is performed from transparent electrode 2750 to a certain location on n-type cladding layer 2720 in a planar structure, and the side surfaces of p-type cladding layer 2810 are exposed to the outside, an additional plasma treatment using oxygen or an oxygen-containing gas may be performed. Even with this plasma treatment, the physical properties of p-type oxide layer 2820 (primarily those that affect current flow and electrical characteristics) remain unchanged; only the physical properties of p-type cladding layer 2810 are altered. Therefore, the areas of p-type cladding layer 2810 not fully exposed due to the deposition of p-type oxide layer 2820 do not experience changes in physical properties. However, the etched and exposed sides (ends) and the area extending beyond the predetermined area do experience changes in physical properties. Through this process, the predetermined area extending from both ends of p-type cladding layer 2810 becomes leakage current prevention portion 3810, which, like current flow blocking portion 2830, blocks the flow of current.

The p-type cladding layer 2810 may further include a leakage current prevention portion 3810 to prevent leakage current from occurring at both ends, thereby further improving the light output of the light-emitting element 3800.

The above description is merely an illustrative illustration of the technical concept of this embodiment. Those skilled in the art may make various modifications and variations without departing from the essential characteristics of the present invention. Therefore, the present embodiment is provided not merely for limitation but for explanation of the technical concept of this embodiment, and the scope of the technical concept of this embodiment is not limited to these embodiments. The scope of protection of this embodiment should be interpreted by the appended claims, and all technical spirit within the scope of equivalents should be interpreted as being included within the scope of patent rights of this embodiment.

100: Light-emitting element

110:Substrate

120: n-type cladding layer

130: Active layer

140: p-type semiconductor layer

150: Protective layer

160, 165: Electrode

Claims (11)

A light-emitting element comprises: a substrate; an n-type cladding layer, deposited on the substrate and made of a semiconductor material doped with an n-type dopant; an active layer, deposited on the n-type cladding layer, wherein holes and electrons provided from the n-type cladding layer meet and recombine to generate light; and a p-type semiconductor layer, deposited on the active layer, which provides the holes to the active layer. a protective layer, formed of a material having a transmittance and conductivity in the visible light band higher than a preset first baseline value and a preset second baseline value, respectively, and deposited on the p-type semiconductor layer to protect the p-type semiconductor layer from external influences. The protective layer does not interfere with the propagation of light generated in the active layer and diffuses the injected current, allowing the holes to be transferred to the active layer; and electrodes, formed on the n-type cladding layer and the protective layer, respectively. The p-type semiconductor layer includes: a p-type cladding layer, deposited directly on the active layer, formed of a semiconductor material doped with a p-type dopant and configured to transfer the holes to the active layer; an internal stress relief layer deposited on the p-type cladding layer, the internal stress relief layer having a hexagonal crystal structure and being formed of a zinc oxide-based compound of elements from Groups 2 and 6 of the periodic table, the internal stress relief layer being doped with p-type impurities or, if undoped, forming zinc vacancies to allow the holes to be injected into the active layer; and A hole transport enhancing layer having a hexagonal crystal structure and formed from a zinc oxide-based compound containing elements from Groups 2 and 6 of the periodic table is deposited on the internal stress relieving layer to a predetermined thickness to form an ohmic contact. The hole transport enhancing layer is doped with the p-type impurities, n-type impurities, or p-type/n-type impurities at a predetermined concentration to alter the energy band gap, thereby forming an ohmic contact between the internal stress relieving layer and the protective layer. The hole transport enhancing layer has a thickness between 1 nm and 10 nm, wherein the protective layer is formed from ITO, NiO, GaZnO, InZnO, InGaZnO, or graphene. The light-emitting device according to claim 1, wherein the n-type cladding layer is realized by any one of n-type GaN, n-type InGaN, n-type AlGaN, and n-type AlInGaN, or a combination thereof. The light emitting device according to claim 1, wherein the p-type semiconductor layer is deposited on the active layer and relieves the generated internal pressure. The light-emitting element according to claim 1, wherein the p-type semiconductor layer is in ohmic contact with the protective layer. The light-emitting element as described in claim 1, wherein the above-mentioned electrode is made of one or more metals selected from the group consisting of Al, Ag, Cr, Cu, Mo, Ni, Pd, Ti and W, or their alloys. A method for manufacturing a light-emitting element comprises: a deposition process of sequentially depositing an n-type cladding layer, an active layer, a p-type semiconductor layer, and a protective layer on a substrate; an etching process of etching a portion of the n-type cladding layer, the active layer, the p-type semiconductor layer, and the protective layer, and etching vertically from the protective layer to a portion of the n-type cladding layer; and a formation process of forming a first electrode on the protective layer and a second electrode on the portion of the n-type cladding layer exposed to the outside by the etching process, wherein the p-type semiconductor layer comprises: a p-type cladding layer, deposited directly on the active layer and made of a semiconductor material doped with a p-type dopant, and configured to transport holes to the active layer; an internal stress relief layer, deposited on the p-type cladding layer, having a hexagonal crystal structure and made of a zinc oxide-based compound of elements from Groups 2 and 6 of the periodic table; the internal stress relief layer being doped with p-type dopants or, if undoped, forming zinc vacancies to inject holes into the active layer; and A hole transport enhancing layer having a hexagonal crystal structure and formed from a zinc oxide-based compound containing elements from Groups 2 and 6 of the periodic table is deposited on the internal stress relieving layer to a predetermined thickness to form an ohmic contact. The hole transport enhancing layer is doped with the p-type impurities, n-type impurities, or p-type/n-type impurities at a predetermined concentration to alter the energy band gap, thereby forming an ohmic contact between the internal stress relieving layer and the protective layer. The hole transport enhancing layer has a thickness between 1 nm and 10 nm, wherein the protective layer is formed from ITO, NiO, GaZnO, InZnO, InGaZnO, or graphene. The method for manufacturing a light-emitting device as described in claim 6, wherein the n-type cladding layer is deposited by using an epitaxial single crystal deposition method. The method for manufacturing a light-emitting element according to claim 6, wherein the p-type semiconductor layer increases the concentration of holes injected into the active layer and reduces the internal pressure formed in the active layer. The method for manufacturing a light-emitting element as described in claim 6, wherein the protective layer is made of a material whose transmittance and conductivity in the visible light band are equal to or higher than a preset first reference value and a preset second reference value, respectively. The method for manufacturing a light-emitting device as described in claim 9, wherein the protective layer is deposited by physical vapor deposition (PVD), chemical vapor deposition (CVD), electron beam deposition or sputtering. The method for manufacturing a light-emitting element as described in claim 6, wherein the first electrode is made of a metal having a reflectivity equal to or higher than a preset reference value.