TWI890969B - Antenna device - Google Patents

Abstract

An antenna device includes a substrate, a transistor and a light shielding layer. The transistor is disposed on the substrate and includes a semiconductor pattern. The light shielding layer is disposed on the substrate and at least partially overlaps the semiconductor pattern. Dissipation Factor of the light shielding layer is less than 0.004 at a frequency of 10 GHz.

Description

Antenna device

The present disclosure relates to an electronic device, and more particularly to an antenna device.

In antenna devices using a single-substrate design, the absence of a light-shielding element on the transistor's semiconductor pattern can easily lead to leakage current. This can cause critical voltage shifts during electrical measurements, making it impossible to measure the transistor's actual current-voltage characteristic (I-V) curve.

The present disclosure provides an antenna device that can improve the leakage current problem.

In one embodiment of the present disclosure, an antenna device includes a substrate, a transistor, and a light shielding layer. The transistor is disposed on the substrate and includes a semiconductor pattern. The light shielding layer is disposed on the substrate and at least partially overlaps the semiconductor pattern. The loss factor of the light shielding layer is less than 0.004 at a frequency of 10 GHz.

In another embodiment of the present disclosure, an antenna device includes a substrate, a transistor, and a light shielding layer. The transistor is disposed on the substrate and includes a semiconductor pattern. The light shielding layer is disposed on the substrate and at least partially overlaps the semiconductor pattern. The light shielding layer has a dielectric constant of less than 3.2 at a frequency of 10 GHz.

In another embodiment of the present disclosure, an antenna device includes a substrate, a transistor, a light shielding layer, and a metal layer. The transistor is disposed on the substrate and includes a semiconductor pattern. The light shielding layer is disposed on the substrate and at least partially overlaps the semiconductor pattern. The metal layer is disposed between the substrate and the transistor. The light shielding layer is electrically connected to the transistor or the metal layer.

In order to make the above features and advantages of the present disclosure more clearly understood, embodiments are given below and described in detail with reference to the accompanying drawings.

Reference will now be made in detail to exemplary embodiments of the present disclosure, examples of which are illustrated in the accompanying drawings. Whenever possible, the same reference numerals are used in the drawings and the description to refer to the same or like parts.

Throughout this disclosure and the accompanying patent claims, certain terms are used to refer to specific components. Those skilled in the art will understand that electronic device manufacturers may refer to the same component by different names. This document does not intend to distinguish between components that have the same function but are named differently. Throughout the following description and patent claims, the words "including" and "comprising" are open-ended and should be interpreted as meaning "including, but not limited to..."

Directional terms used herein, such as "up," "down," "front," "back," "left," and "right," are used with reference to the accompanying drawings only. Therefore, the directional terms used are intended to illustrate, not to limit, this disclosure. In the accompanying drawings, each diagram depicts general features of methods, structures, and/or materials used in particular embodiments. However, these diagrams should not be construed as defining or limiting the scope or nature of the embodiments. For example, the relative sizes, thicknesses, and positions of layers, regions, and/or structures may be reduced or exaggerated for clarity.

In this disclosure, when a structure (or layer, component, or substrate) is located on/above another structure (or layer, component, or substrate), it can mean that the two structures are adjacent and directly connected, or it can mean that the two structures are adjacent but not directly connected. Indirect connection means that there is at least one intervening structure (or intervening layer, intervening component, intervening substrate, or intervening spacer) between the two structures, with the lower surface of one structure adjacent to or directly connected to the upper surface of the intervening structure, and the upper surface of the other structure adjacent to or directly connected to the lower surface of the intervening structure. The intervening structure can be composed of a single or multiple layers, a physical structure, or a non-physical structure, without limitation. In the present disclosure, when a certain structure is disposed “on” another structure, it may mean that the certain structure is “directly” on the other structure, or that the certain structure is “indirectly” on the other structure, that is, at least one structure is interposed between the certain structure and the other structure.

The terms "approximately," "equal to," "equal to," "same as," "substantially," or "substantially" are generally interpreted as within 20% of a given value or range, or within 10%, 5%, 3%, 2%, 1%, or 0.5% of a given value or range. In addition, the terms "ranging from a first value to a second value" or "ranging between a first value and a second value" mean that the range includes the first value, the second value, and other values therebetween.

The use of ordinal numbers such as "first" and "second" in the specification and claims to modify an element does not, by itself, imply or indicate any prior ordinal number of the element(s), nor does it indicate the order of one element from another or the order of their manufacturing process. Such ordinal numbers are used only to clearly distinguish a named element from another element with the same name. The claims and the specification may not use the same terminology; accordingly, the first component in the specification may be the second component in the claims.

The electrical connection or coupling described in this disclosure may refer to a direct connection or an indirect connection. In the case of a direct connection, the endpoints of the components on the two circuits are directly connected or connected to each other by a conductor segment. In the case of an indirect connection, the endpoints of the components on the two circuits are connected by a switch, a diode, a capacitor, an inductor, a resistor, other suitable components, or a combination of the above components, but not limited to these.

In the present disclosure, the thickness, length, and width can be measured using an optical microscope (OM), and the thickness or width can be measured from a cross-sectional image in an electron microscope, but the present disclosure is not limited thereto. In addition, there may be a certain error between any two values or directions used for comparison. In the present disclosure, a resonance method can be used to measure materials to obtain the material's dissipation factor Df and dielectric constant Dk, thereby understanding the material properties. In addition, the terms "equal to," "equal," "same," "substantially," or "substantially" mentioned in the present disclosure generally mean within 10% of a given value or range. Furthermore, the phrases "a given range is from a first value to a second value," "a given range falls within the range from the first value to the second value," or "a given range is between the first value and the second value" indicate that the given range includes the first value, the second value, and any values therebetween. If the first direction is perpendicular to the second direction, the angle between the first and second directions may be between 80 and 100 degrees; if the first direction is parallel to the second direction, the angle between the first and second directions may be between 0 and 10 degrees.

It should be noted that the following embodiments may be implemented by replacing, recombining, or combining features from various embodiments to create other embodiments without departing from the spirit of the present disclosure. Features from various embodiments may be mixed and matched as needed, as long as they do not violate the spirit of the disclosure or conflict with each other.

Unless otherwise defined, all terms used herein (including technical and scientific terms) have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure belongs. It is understood that these terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning consistent with the background or context of the relevant technology and this disclosure, and should not be interpreted in an idealized or overly formal manner unless specifically defined in the present disclosure.

In the present disclosure, the electronic device may include a display device, a backlight device, an antenna device, a sensing device, or a splicing device, but is not limited thereto. The electronic device may be a bendable or flexible electronic device. The display device may be a non-self-luminous display device or a self-luminous display device. The display device may, for example, include liquid crystal, a light-emitting diode, fluorescence, phosphor, quantum dot (QD), other suitable display media, or a combination thereof. The antenna device may, for example, include a frequency selective surface (FSS), a radio frequency filter (RF-Filter), a polarizer, a resonator, or an antenna. The antenna may be a liquid crystal antenna or a non-liquid crystal antenna. The sensing device may be a sensing device for sensing capacitance, light, heat or ultrasound, but is not limited thereto. In the present disclosure, the electronic device may include electronic components, and the electronic components may include passive components and active components, such as capacitors, resistors, inductors, diodes, transistors, etc. The diode may include a light-emitting diode or a photodiode. The light-emitting diode may, for example, include an organic light emitting diode (OLED), a sub-millimeter light-emitting diode (mini LED), a micro LED or a quantum dot light-emitting diode (quantum dot LED), but is not limited thereto. The splicing device may, for example, be a display splicing device or an antenna splicing device, but is not limited thereto. It should be noted that the electronic device may be any combination of the aforementioned arrangements, but is not limited thereto. Furthermore, the electronic device may have a rectangular, circular, polygonal shape, a curved edge shape, or other suitable shape. The electronic device may include peripheral systems such as a drive system, a control system, and a light source system to support a display device, an antenna device, a wearable device (e.g., including augmented reality or virtual reality), an in-vehicle device (e.g., including a car windshield), or a splicing device.

It should be noted that the technical solutions provided in the following different embodiments can be replaced, combined or mixed with each other to constitute another embodiment without violating the spirit of the present disclosure.

Figures 1 and 6 are partial top views of antenna devices according to some embodiments of the present disclosure. Figures 2 to 5 and 7 to 11 are partial cross-sectional views of antenna devices according to some embodiments of the present disclosure.

Referring to Figures 1 and 2 , antenna device 1 may include a substrate 10. Substrate 10 may be a rigid substrate or a flexible substrate. Materials for substrate 10 include, but are not limited to, glass, quartz, ceramic, sapphire, or plastic. Plastics may include, but are not limited to, polycarbonate (PC), polyimide (PI), polypropylene (PP), polyethylene terephthalate (PET), other suitable flexible materials, or combinations thereof.

The antenna device 1 may further include a transistor 11. The transistor 11 is disposed on the substrate 10 and may include, but is not limited to, a semiconductor pattern CH. For example, the transistor 11 may further include, but is not limited to, a gate GE, a source SE, and a drain DE.

Taking a bottom-gate thin-film transistor as an example, as shown in Figure 2 , the gate GE is disposed between the substrate 10 and the semiconductor pattern CH. The semiconductor pattern CH is disposed above the gate GE and at least partially overlaps with the gate GE. The source SE and drain DE are disposed on the semiconductor pattern CH and face each other. It should be understood that the type of transistor 11 is not limited. In other embodiments, although not shown, the transistor 11 may be a bipolar transistor or a top-gate transistor. Furthermore, in this document, "two elements overlap" means that the two elements overlap in the thickness direction (e.g., direction Z) of the antenna device 1.

The material of the semiconductor pattern CH may include amorphous silicon, polysilicon, or metal oxide. The metal oxide may include, but is not limited to, indium gallium zinc oxide (IGZO). The material of the gate GE, source SE, and drain DE may include, but is not limited to, a metal or a metal stack, such as aluminum, molybdenum, or titanium/aluminum/titanium.

The antenna device 1 may further include a light-shielding layer 12. The light-shielding layer 12 is disposed on the substrate 10, or further disposed on the transistor 11. Furthermore, the light-shielding layer 12 at least partially overlaps the semiconductor pattern CH. Taking Figure 1 as an example, the light-shielding layer 12 may be a patterned light-shielding layer and may include a light-shielding pattern 120 that at least partially overlaps the semiconductor pattern CH. In some embodiments, the top-view area of the light-shielding pattern 120 may be greater than or equal to the top-view area of the semiconductor pattern CH, and the semiconductor pattern CH may be completely covered by the light-shielding pattern 120, but this is not limited to this.

The light shielding layer 12 is made of a light shielding material to block the light beam B from above the transistor 11 from irradiating the semiconductor pattern CH, thereby improving the leakage current problem caused by the light beam B irradiating the semiconductor pattern CH. In some embodiments, the light shielding layer 12 has a light transmittance (e.g., the transmittance of the light shielding layer 12 to visible light) less than or equal to 0.1%, but is not limited thereto.

For example, the material of the light shielding layer 12 may include a conductive material or a non-conductive material. Conductive materials may include, but are not limited to, metals (such as molybdenum and chromium), alloys (such as molybdenum tantalum (MoTa) and molybdenum niobium (MoNb)), or blackened metal oxides (such as blackened ITO). Non-conductive materials may include, but are not limited to, black matrix, solder resist, or other dielectric materials. In some embodiments, the material of the light shielding layer 12 (e.g., a non-conductive material) may have a dissipation factor of less than 0.004 at a frequency of 10 GHz and/or a dielectric constant of less than 3.2 at a frequency of 10 GHz to reduce electromagnetic wave frequency losses, but is not limited to these.

Depending on different needs, the antenna device 1 may further include other components or layers. For example, the antenna device 1 may further include a passivation layer 13. The passivation layer 13 is disposed on the substrate 10 and may be made of an inorganic material such as silicon oxide, silicon nitride, or a combination thereof, but is not limited thereto.

Antenna device 1 may further include a metal layer 14. Metal layer 14 is disposed between substrate 10 and transistor 11, and for example, between passivation layer 13 and transistor 11. Metal layer 14 may be made of, but is not limited to, copper, titanium, aluminum, any other highly conductive material, or a combination thereof. In some embodiments, metal layer 14 may be a multi-layer structure, such as a stack of titanium, copper, and titanium. The stack of titanium, copper, and titanium may have different thicknesses in direction Z. For example, the thickness of titanium in direction Z may be 200 to 600 angstroms, and the thickness of copper in direction Z may be 2 micrometers (μm), but is not limited to these.

The antenna device 1 may further include a passivation layer 15. The passivation layer 15 is disposed on the metal layer 14 and may include a plurality of through holes TH exposing the metal layer 14. The material of the passivation layer 15 may refer to the material of the passivation layer 13 and will not be repeated here.

Antenna device 1 may also include a conductive layer 16. Conductive layer 16 is disposed on passivation layer 15. The material of conductive layer 16 may include a metal or a metal stack, such as, but not limited to, aluminum, molybdenum, or titanium/aluminum/titanium. Conductive layer 16 may be a patterned conductive layer and may include, but is not limited to, a gate electrode GE, a lower electrode BE, scanning lines SL (see FIG. 1 ), and other circuits (not shown). The lower electrode BE is adjacent to and separated from the gate electrode GE. Furthermore, the lower electrode BE is electrically connected to the metal layer 14 via a plurality of through-holes TH in the passivation layer 15. The scanning line SL is electrically connected to the gate GE.

The antenna device 1 may further include a passivation layer 17. The passivation layer 17 is disposed on the conductive layer 16. The material of the passivation layer 17 may refer to the material of the passivation layer 13 and will not be repeated here.

The semiconductor pattern CH is disposed on the passivation layer 17 and at least partially overlaps with the gate GE. The material of the semiconductor pattern CH can be referred to above and will not be repeated here.

Antenna device 1 further includes a conductive layer 18. Conductive layer 18 is disposed on passivation layer 17. The material of conductive layer 18 may include, but is not limited to, a metal or a metal stack, such as aluminum, molybdenum, or titanium/aluminum/titanium. Conductive layer 18 may be a patterned conductive layer and may include, but is not limited to, a source electrode SE, a drain electrode DE, an upper electrode TE, a data line DL, and other wiring (not shown). The source electrode SE is electrically connected to the data line DL. The drain electrode DE is electrically connected to the upper electrode TE. The upper electrode TE and the lower electrode BE overlap in the direction Z, and the upper electrode TE, the lower electrode BE, and the passivation layer 17 located between the upper electrode TE and the lower electrode BE constitute a storage capacitor ST.

The antenna device 1 may further include a passivation layer 19. The passivation layer 19 is disposed on the conductive layer 18. The material of the passivation layer 19 may refer to the material of the passivation layer 13 and will not be repeated here.

In some embodiments, the light shielding layer 12 may be disposed on the passivation layer 19 and at least partially overlap the semiconductor pattern CH, but the present invention is not limited thereto. In other embodiments, although not shown, the light shielding layer 12 may also be disposed on a film layer (such as the passivation layer 21) formed after the passivation layer 19.

In some embodiments, as shown, the top-view area of the light-shielding layer 12 may be larger than the top-view area of the gate GE (for example, the edge of the light-shielding pattern 120 may extend within approximately 1 mm of the edge of the gate GE) to enhance shielding of obliquely incident light beams (not shown) incident on the semiconductor pattern CH, but the present invention is not limited thereto. In other embodiments, although not shown, the top-view area of the light-shielding layer 12 may be equal to the top-view area of the gate GE.

In some embodiments, as shown, the light-shielding layer 12 may only shield specific areas, such as, but not limited to, the area where the semiconductor pattern CH is located. In other embodiments, although not shown, the light-shielding layer 12 at least covers the semiconductor pattern CH exposed by the source electrode SE and the drain electrode DE. Alternatively, the light-shielding layer 12 may shield the entire area, such as the entire passivation layer 19 or a film layer formed after the passivation layer 19 (such as the passivation layer 21).

Antenna device 1 may further include a protective layer 20. Protective layer 20 is disposed on light shielding layer 12 and passivation layer 19. The material of protective layer 20 may include an organic insulating material. Organic insulating materials may include, but are not limited to, polymethyl methacrylate (PMMA), epoxy, acrylic resin, silicone, polyimide polymer, or combinations thereof. In some embodiments, the maximum thickness of protective layer 20 in direction Z is, for example, 1.5 micrometers (μm) to 40 micrometers, but is not limited thereto.

The antenna device 1 may further include a passivation layer 21. The passivation layer 21 is disposed on the protective layer 20. The material of the passivation layer 21 may refer to the material of the passivation layer 13 and will not be repeated here.

Please refer to Figure 3 for a partial top view of antenna device 1A, which can be found in Figure 1. The main differences between antenna device 1A and antenna device 1 of Figure 2 are described below. In antenna device 1A, light shielding layer 12A is disposed on passivation layer 21 and at least partially overlaps semiconductor pattern CH.

In some embodiments, as shown, the orthographic projection area of the light shielding layer 12A on the substrate 10 may be larger than the orthographic projection area of the gate GE on the substrate 10 (for example, the edge of the light shielding pattern 120A may extend within approximately 1 mm from the edge of the gate GE) to enhance shielding of light beams (not shown) incident at an oblique angle on the semiconductor pattern CH, but the present invention is not limited thereto. In other embodiments, although not shown, the orthographic projection area of the light shielding layer 12A on the substrate 10 may be equal to the orthographic projection area of the gate GE on the substrate 10.

In some embodiments, as shown, the light-shielding layer 12A may only shield specific areas, such as, but not limited to, the area where the semiconductor pattern CH is located. In other embodiments, although not shown, the light-shielding layer 12A at least covers the semiconductor pattern CH exposed by the source electrode SE and the drain electrode DE. Alternatively, the light-shielding layer 12A may shield the entire area, such as completely covering the passivation layer 21. The material of the light-shielding layer 12A may include the aforementioned conductive material or non-conductive material, which will not be repeated here. In some embodiments, the material of the light shielding layer 12A is selected to have a loss factor less than 0.004 at a frequency of 10 GHz and/or a dielectric constant less than 3.2 at a frequency of 10 GHz to reduce electromagnetic wave frequency loss, but the present invention is not limited thereto.

Referring to Figure 4 , the main differences between antenna device 1B and antenna device 1A in Figure 3 are described below. In antenna device 1B, light-shielding layer 12B, for example, completely covers passivation layer 21. Furthermore, metal layer 14 includes opening A1. Opening A1 exposes passivation layer 13, and passivation layers 15, 17, and 19 are sequentially stacked within opening A1. Furthermore, protective layer 20 includes opening A2. Opening A2 at least partially overlaps opening A1 in direction Z. Furthermore, passivation layer 21 has opening A3. For example, passivation layer 21 may extend into opening A2 and have opening A3. Opening A3 at least partially overlaps opening A1 and exposes passivation layer 19 extending into opening A1. Light-shielding layer 12B is disposed on passivation layer 21 and extends into opening A3, covering the portion of passivation layer 19 exposed by opening A3. In this embodiment, light-shielding layer 12B employs a fully covered design. The material of light-shielding layer 12B may, for example, have a loss factor of less than 0.004 at a frequency of 10 GHz and/or a dielectric constant of less than 3.2 at a frequency of 10 GHz to reduce electromagnetic wave frequency losses, but this is not limited to these materials.

5 , the main differences between antenna device 1C and antenna device 1B of FIG. 4 are described below. In antenna device 1C, light shielding layer 12C has an opening A4 , and opening A4 at least partially overlaps opening A1 in direction Z.

Electromagnetic waves (not shown) propagating beneath metal layer 14 can be transmitted through opening A1 in metal layer 14 to a modulation element (not shown, such as a capacitor) located above metal layer 14. The modulation element acts to adjust the electromagnetic wave's phase, amplitude, or propagation direction, and then output from antenna device 1C. By varying the voltage applied to the modulation element, the equivalent capacitance in the RF circuit can be controlled, causing corresponding changes in the electromagnetic wave's phase and amplitude, thereby controlling the electromagnetic wave's direction or improving the antenna device's directivity.

By designing opening A4 to at least partially overlap opening A1, the shielding layer 12C can reduce the amount of electromagnetic waves that pass through opening A1, thereby helping to reduce electromagnetic wave frequency loss. Furthermore, the material of the shielding layer 12C may include the aforementioned conductive or non-conductive materials, which will not be repeated here. For example, the material of the shielding layer 12C may have a dissipation factor of less than 0.004 at a frequency of 10 GHz and/or a dielectric constant of less than 3.2 at a frequency of 10 GHz to reduce electromagnetic wave frequency loss, but this is not limited to these materials.

Referring to Figures 6 and 7 , the main differences between antenna device 1D and antenna device 1 of Figures 1 and 2 are described below. In antenna device 1D, a light-shielding layer 12D exposes the source electrode SE and the drain electrode DE. For example, a light-shielding pattern 120D of light-shielding layer 12D may extend between the source electrode SE and the drain electrode DE and cover the semiconductor pattern CH exposed by the source electrode SE and the drain electrode DE.

The design of exposing at least a portion of the transistor 11 through the light-shielding layer 12D facilitates observation of defects located on the semiconductor pattern CH between the source electrode SE and the drain electrode DE, thereby facilitating laser repair (e.g., laser removal of defects to prevent a short circuit between the source electrode SE and the drain electrode DE). Furthermore, the material of the light-shielding layer 12D may include the aforementioned conductive or non-conductive materials, which will not be repeated here. In some embodiments, the material of the light-shielding layer 12D is selected from, for example, a material having a loss factor of less than 0.004 at a frequency of 10 GHz and/or a dielectric constant of less than 3.2 at a frequency of 10 GHz to reduce electromagnetic wave frequency losses, but this is not limited to these materials.

Please refer to Figure 8 ; a partial top view of the antenna device 1E can be found in Figure 6 . The main differences between the antenna device 1E and the antenna device 1D in Figure 7 are described below. In the antenna device 1E, a light-shielding layer 12E is disposed on the passivation layer 21, and the light-shielding layer 12E also exposes the source electrode SE and the drain electrode DE. For example, the light-shielding pattern 120E of the light-shielding layer 12E also extends between the source electrode SE and the drain electrode DE and covers the semiconductor pattern CH exposed by the source electrode SE and the drain electrode DE. The material of the light-shielding layer 12E may include the aforementioned conductive material or non-conductive material, which will not be repeated here. In some embodiments, the material of the light shielding layer 12E is selected to have a loss factor less than 0.004 at a frequency of 10 GHz and/or a dielectric constant less than 3.2 at a frequency of 10 GHz to reduce electromagnetic wave frequency loss, but the present invention is not limited thereto.

Referring to Figure 9 , a partial top view schematic diagram of antenna device 1F is similar to Figure 6 . The key differences between antenna device 1F and antenna device 1D in Figure 7 are described below. In antenna device 1F, light-shielding layer 12F is electrically connected to metal layer 14 . For example, light-shielding layer 12F may be made of a conductive material, and light-shielding pattern 120F of light-shielding layer 12F may penetrate passivation layer 15 , passivation layer 17 , and passivation layer 19 to contact metal layer 14 , but this is not a limitation. In some embodiments, metal layer 14 may be connected to ground, but this is not a limitation.

By connecting the light shielding layer 12F and the metal layer 14 to the same potential, the reliability of the antenna device 1F can be improved. For example, problems caused by the light shielding layer 12F being electrically floating (such as electrostatic discharge) can be reduced.

It should be understood that the light shielding layer in other embodiments of the present disclosure may also be electrically connected to the metal layer 14, which will not be further described below.

Referring to FIG. 10 , the major differences between antenna device 1G and antenna device 1F in FIG. 9 are described below. In antenna device 1G, light-shielding layer 12G is electrically connected to transistor 11. For example, light-shielding layer 12G may be made of a conductive material, and light-shielding pattern 120G of light-shielding layer 12G may penetrate passivation layer 17 and passivation layer 19 to contact gate GE of transistor 11, but this is not a limitation.

By connecting the light shielding layer 12G and the gate GE of the transistor 11 to the same potential, the reliability of the antenna device 1G can also be improved. For example, problems caused by the light shielding layer 12G being electrically floating (such as electrostatic discharge) can be reduced.

It should be understood that the light shielding layer of other embodiments of the present disclosure may also be electrically connected to the transistor 11, which will not be further described below.

Referring to FIG. 11 , in the antenna device 1H, the transistor 11H is, for example, a top-gate transistor, wherein the conductive layer (such as the conductive layer 18 in FIG. 1 ) to which the source SE and the drain DE belong is disposed between the semiconductor pattern CH and the substrate 10 , and the semiconductor pattern CH is disposed between the gate GE and the conductive layer 18 (see FIG. 1 ).

In addition to the substrate 10, the passivation layer 13, the metal layer 14, and the transistor 11H, the antenna device 1H may further include a passivation layer 22. The passivation layer 22 is disposed on the metal layer 14. The material of the passivation layer 22 can be referred to as the material of the passivation layer 13 and will not be repeated here.

The antenna device 1H may further include an ohmic contact layer 23. The ohmic contact layer 23 may include an ohmic contact pattern 230 and an ohmic contact pattern 232. The ohmic contact pattern 230 and the ohmic contact pattern 232 are disposed on the source electrode SE and the drain electrode DE, respectively. The ohmic contact pattern 230 is disposed between the semiconductor pattern CH and the source electrode SE, and the ohmic contact pattern 232 is disposed between the semiconductor pattern CH and the drain electrode DE. The material of the ohmic contact layer 23 may include, but is not limited to, a highly doped N-type amorphous silicon material.

The semiconductor pattern CH is disposed on the passivation layer 22 and covers the ohmic contact layer 23. The antenna device 1H may further include a passivation layer 24. The passivation layer 24 is disposed on the passivation layer 22 and the semiconductor pattern CH. The material of the passivation layer 24 can be referred to as the material of the passivation layer 13 and will not be repeated here.

The gate GE is disposed on the passivation layer 24 and overlaps with the semiconductor pattern CH in the direction Z. In some embodiments, the orthographic projection of the gate GE on the substrate 10 can completely cover the orthographic projection of the semiconductor pattern CH on the substrate 10. In this way, the gate GE can serve as a light shielding layer, and an additional light shielding layer may not be required.

The antenna device 1H may further include a passivation layer 25. The passivation layer 25 is disposed on the passivation layer 24 and the gate electrode GE. The material of the passivation layer 25 may refer to the material of the passivation layer 13 and will not be repeated here.

In summary, in the disclosed embodiments, a light shielding layer disposed on the transistor and at least partially overlapping the semiconductor pattern can block a light beam from above the transistor from reaching the semiconductor pattern, thereby alleviating leakage current issues caused by the light beam irradiating the semiconductor pattern. In some embodiments, electromagnetic frequency losses can be reduced by selecting a light shielding layer with a specific dissipation factor and/or dielectric constant. In some embodiments, electromagnetic frequency losses can be reduced by having the openings in the light shielding layer at least partially overlap the openings in the metal layer. In some embodiments, the source and drain electrodes can be exposed through the light shielding layer to facilitate laser repair. In some embodiments, the reliability of the antenna device can be improved by electrically connecting the light shielding layer to the transistor or metal layer.

The above embodiments are intended only to illustrate the technical solutions of the present disclosure and are not intended to limit the same. Although the present disclosure has been described in detail with reference to the above embodiments, a person skilled in the art should understand that the technical solutions described in the above embodiments may be modified or some or all of the technical features thereof may be replaced with equivalents. However, such modifications or replacements do not deviate the essence of the corresponding technical solutions from the scope of the technical solutions of the embodiments of the present disclosure.

Although the embodiments and advantages of the present disclosure have been disclosed above, it should be understood that any person skilled in the art may make changes, substitutions, and modifications without departing from the spirit and scope of the present disclosure, and features between the various embodiments may be arbitrarily intermixed and interchanged to form other new embodiments. Furthermore, the scope of protection of the present disclosure is not limited to the processes, machines, manufactures, material compositions, devices, methods, and steps described in the specific embodiments within the specification. Any person skilled in the art will understand from the content of this disclosure that any current or future developed processes, machines, manufactures, material compositions, devices, methods, and steps that can perform substantially the same functions or achieve substantially the same results as those described herein may be used in accordance with the present disclosure. Therefore, the scope of protection of the present disclosure includes the above-described processes, machines, manufacture, compositions of matter, devices, methods, and steps. Furthermore, each claim constitutes a separate embodiment, and the scope of protection of the present disclosure also includes the combination of individual claims and embodiments. The scope of protection of the present disclosure shall be determined by the attached patent applications.

1, 1A, 1B, 1C, 1D, 1E, 1F, 1G, 1H: Antenna device 10: Substrate 11, 11H: Transistor 12, 12A, 12B, 12C, 12D, 12E, 12F, 12G: Light-shielding layer 13, 15, 17, 19, 21, 22, 24, 25: Passivation layer 14: Metal layer 16, 18: Conductive layer 20: Protective layer 23: Ohmic contact layer 230, 232: Ohmic contact pattern 120, 120A, 120D, 120E, 120F, 120G: Light-shielding pattern A1, A2, A3, A4: Aperture B: Light beam BE: Bottom electrode CH: Semiconductor pattern DE: Drain DL: Data line GE: Gate SE: Source SL: Scan line ST: Storage capacitor TE: Top electrode TH: Via Z: Direction

Figures 1 and 6 are schematic partial top views of antenna devices according to some embodiments of the present disclosure. Figures 2 to 5 and 7 to 11 are schematic partial cross-sectional views of antenna devices according to some embodiments of the present disclosure.

1: Antenna device

10:Substrate

11: Transistor

12: Light-shielding layer

13, 15, 17, 19, 21: Passivation layer

14: Metal layer

20: Protective layer

120: Shading pattern

B: Beam

BE: Bottom electrode

CH:Semiconductor pattern

DE: Drain

GE: Gate

SE: source

ST: Storage capacitor

TE: Top electrode

TH:Through hole

Z: Direction

Claims (10)

An antenna device includes: a substrate; a transistor disposed on the substrate and including a semiconductor pattern; and a light-shielding layer disposed on the substrate and at least partially overlapping the semiconductor pattern, wherein the light-shielding layer has a loss factor of less than 0.004 at a frequency of 10 GHz. The antenna device of claim 1 further comprises: A metal layer disposed between the substrate and the transistor. The antenna device as described in claim 2, wherein the light shielding layer includes a first opening, the metal layer includes a second opening, and the first opening at least partially overlaps with the second opening. The antenna device as described in claim 1, wherein the transistor further includes a source and a drain, and the light shielding layer exposes the source and the drain. An antenna device includes: a substrate; a transistor disposed on the substrate and including a semiconductor pattern; and a light-shielding layer disposed on the substrate and at least partially overlapping the semiconductor pattern, wherein the light-shielding layer has a dielectric constant of less than 3.2 at a frequency of 10 GHz. The antenna device of claim 5 further comprises: A metal layer disposed between the substrate and the transistor. The antenna device as described in claim 6, wherein the light shielding layer includes a first opening, the metal layer includes a second opening, and the first opening at least partially overlaps with the second opening. The antenna device as described in claim 5, wherein the transistor further includes a source and a drain, and the light shielding layer exposes the source and the drain. An antenna device includes: a substrate; a transistor disposed on the substrate and including a semiconductor pattern; a light-shielding layer disposed on the substrate and at least partially overlapping the semiconductor pattern; and a metal layer disposed between the substrate and the transistor, wherein the light-shielding layer is electrically connected to the transistor or the metal layer. The antenna device as described in claim 9, wherein the transistor further includes a gate, and the light shielding layer is electrically connected to the gate.