TWI872365B - Light emitting device - Google Patents

Abstract

A light-emitting device includes: a base, including an upper surface, wherein the upper surface includes a first region and a second region surrounding the first region; a plurality of protruding structures arranged in the first region but not arranged in the second region; a semiconductor stack, formed on the first region and covering the plurality of protruding structures; and an insulating layer covering the semiconductor stack and the second region of the upper surface. The plurality of protruding structures comprises: a plurality of first protruding structures located in the first region; and a plurality of second protruding structures located at the periphery of the first region. In a direction parallel to the upper surface of the substrate, the maximum width of the second protruding structure is smaller than the maximum width of the first protruding structure, and each of the plurality of second protruding structures includes a first side wall, the first sidewall is not covered by the semiconductor stack and has a first included angle with the second region of the upper surface, which is between 90 degrees and 160 degrees.

Description

Light-emitting element

The present disclosure relates to a light-emitting element, and in particular to a light-emitting element having a protruding structure substrate.

Light-emitting diodes (LEDs) are widely used as solid-state lighting sources due to their low power consumption and long lifespan, and have gradually replaced traditional light sources such as incandescent bulbs and fluorescent lamps. LEDs can be used in a variety of fields, such as traffic signs, backlight modules, street lighting, medical equipment, etc.

Although existing LEDs generally meet their needs, they still face the problem of insufficient light output in many applications. Therefore, LEDs still need to be further improved to produce light-emitting components that meet product requirements.

According to some embodiments of the present disclosure, a light emitting element is provided. The light-emitting element comprises: a substrate, comprising an upper surface, wherein the upper surface comprises a first area and a second area surrounding the first area; a plurality of protrusion structures, arranged in the first area but not arranged in the second area; a semiconductor stack, located on the first area and covering the plurality of protrusion structures; and an insulating layer, covering the semiconductor stack and the second area of the upper surface; wherein the plurality of protrusion structures comprises: a plurality of first protrusion structures located in the first area; and a plurality of second protrusion structures located around the first area, wherein in a direction parallel to the upper surface of the substrate, the maximum width of the second protrusion structure is smaller than the maximum width of the first protrusion structure, and wherein the plurality of second protrusion structures each comprise a first side wall, the first side wall is not covered by the semiconductor stack and has a first angle with the second area of the upper surface, which is between 90 degrees and 160 degrees. The following embodiments provide a detailed description with reference to the attached drawings.

10: Light-emitting element

101: Substrate

100: Base

100US,104AUS: Upper surface

102: Protrusion structure

102A: First protrusion structure

102B: Second protrusion structure

104: Semiconductor stacking

104A: first conductivity type semiconductor layer

102AH,102BH: Maximum height

102AT,102BT:Top

102AW,102BW: Maximum width

102BS,104S: Side wall

104B: Luminescent layer

104C: Second conductivity type semiconductor layer

106: Ohm contact layer

108: Insulation layer

108BS: Bottommost surface

108P1,108P2: Opening

110: First electrode

112: Second electrode

114,116: bulge

A-A’: section line

L1: First level

L2: Second level

L2’: The third level

R1: First area

R2: Second area, peripheral area

θ1,θ2: angle

Figures 1A and 1B are cross-sectional views showing intermediate stages in the process of forming a light-emitting element according to different embodiments.

Figures 2, 3, and 4A are cross-sectional views showing intermediate stages in the process of forming a light-emitting element according to some embodiments.

Figure 4B is a top view of Figure 4A.

Figures 5-7 are cross-sectional views showing intermediate stages in the process of forming a light-emitting element according to some embodiments.

Figures 8A to 8D are cross-sectional views of light-emitting elements according to some other embodiments.

The following describes the light-emitting element of the embodiment of the present invention. It should be understood that the following description provides many different embodiments for implementing different aspects of some embodiments of the present disclosure. The specific elements and arrangements described below are only for the purpose of simply and clearly describing some embodiments of the present disclosure. Of course, these are only used for exemplification and are not limitations of the present disclosure. In addition, similar and/or corresponding element symbols may be used in different embodiments to indicate similar and/or corresponding elements to clearly describe the present disclosure. However, the use of these similar and/or corresponding element symbols is only for the purpose of simply and clearly describing some embodiments of the present disclosure, and does not represent any correlation between the different embodiments and/or structures discussed.

FIG. 1A and FIG. 1B are cross-sectional views of intermediate stages in the process of forming the light-emitting element 10 according to different embodiments. Referring to FIG. 1A , a substrate 101 is first provided. The substrate 101 includes a base 100 and a plurality of protrusion structures 102 located thereon. The base 100 includes an upper surface 100US. In some embodiments, the base 100 may be a growth substrate for epitaxially growing a semiconductor stack thereon. For example, the material of the substrate 100 includes silicon (Si), silicon carbide (SiC), sapphire, aluminum nitride (AlN) and gallium nitride (GaN) for growing aluminum indium gallium nitride (AlInGaN) semiconductor stacks, or gallium arsenide (GaAs) and gallium phosphide (GaP) for growing aluminum gallium indium phosphide (AlGaInP) semiconductor stacks. According to some embodiments, the substrate 100 may be transparent or translucent. Specifically, in an embodiment in which the substrate 100 is transparent, the material of the substrate 100 may have a light transmittance greater than 85% for light with a wavelength between 200nm and 750nm, or preferably has a light transmittance greater than 92%. In an embodiment where the substrate 100 is translucent, the material of the substrate 100 may have a light transmittance greater than 25% and less than 85% for light with a wavelength between 200nm and 750nm.

According to some embodiments, as shown in FIG. 1A and FIG. 1B, a plurality of protrusion structures 102 are separated from each other in a horizontal direction parallel to the upper surface 100US and protrude from the upper surface 100US. The protrusion structure 102 can be used to change the path of the light emitted by the semiconductor stack to improve the light extraction efficiency of the light-emitting element 10. In one embodiment, the substrate 100 includes sapphire, and the upper surface 100US includes, for example, a C-plane of sapphire.

According to some embodiments, in the cross-sectional views shown in FIG. 1A and FIG. 1B, the protrusion structure 102 may have a triangular cross-sectional shape. In addition, according to some embodiments, the protrusion structure 102 may have a cone, a hemisphere, a polygonal column, a trapezoidal column, a cylinder, or a pyramid in a three-dimensional view (not shown). However, the two-dimensional or three-dimensional shape of the protrusion structure 102 in the present disclosure is not limited to the shapes described above. In other embodiments, the protrusion structure 102 may have a cross-sectional shape such as a square, a rectangle, a trapezoid, an ellipse, or an arc.

Referring to FIG. 1A , in some embodiments, the material of the protrusion structure 102 may include a material different from that of the substrate 100. Specifically, in one embodiment, the material of the protrusion structure 102 may include an insulating material. For example, the insulating material may include glass, polymer, silicon oxide, silicon nitride, silicon oxynitride, silicon carbonitride, silicon oxycarbide, silicon oxycarbonitride, or a combination thereof. In some embodiments, the protrusion structure 102 may be transparent to light emitted by a light-emitting layer subsequently formed thereon. Specifically, the material of the protrusion structure 102 may have a light transmittance greater than 85% for light with a wavelength between 200nm and 750nm, or preferably a light transmittance greater than 92%.

In detail, a suitable deposition process may be used to deposit the material of the protrusion structure 102 on the upper surface 100US of the substrate 100, and then a patterning process may be used to pattern the material of the protrusion structure 102 to form a protrusion structure with a desired shape and size. The above deposition process may include sputtering, evaporation, spin-coating, chemical vapor deposition (CVD), molecular beam deposition, any other suitable process or a combination of the above to deposit the material of the protrusion structure 102. In addition, the patterning process may include a photolithography process and an etching process. In some embodiments, the photolithography process may include photoresist coating, soft baking, hard baking, mask aligning, exposure, post-exposure baking (PEB), developing photoresist, rinsing, drying, or other suitable processes. In some embodiments, the etching process may include a dry etching process, a wet etching process, or a combination thereof.

Referring to FIG. 1B , in other embodiments, the material of the protrusion structure 102 may include the same material as the substrate 100, such as any material suitable for forming the substrate 100 as described above. In one embodiment, as shown in FIG. 1B , the substrate 100 and the protrusion structure 102 may be an integrally formed structure. Specifically, the material of the substrate 100 may be directly subjected to a patterning process to form protrusion structures 102 separated from each other in the horizontal direction. In this embodiment, there is substantially no heterogeneous material interface between the protrusion structure 102 and the substrate 100, and the extension surface of the upper surface 100US between the protrusion structures 102 is also regarded as the upper surface 100US, as shown by the dotted line in FIG. 1B

FIG. 2 and FIG. 3 are cross-sectional views of intermediate stages in the process of forming the light-emitting element 10 according to some embodiments. FIG. 2 to FIG. 7 use the substrate 101 shown in the embodiment of FIG. 1A as an example. Referring to FIG. 2, a semiconductor stack 104 is formed on the substrate 101, and the semiconductor stack 104 covers the protrusion structure 102. In detail, in some embodiments, as shown in FIG. 2, the semiconductor stack 104 may include a first conductive semiconductor layer 104A, a light-emitting layer 104B on the first conductive semiconductor layer 104A, and a second conductive semiconductor layer 104C on the light-emitting layer 104B. In one embodiment, the first conductive semiconductor layer 104A may be an n-type semiconductor layer, and the second conductive semiconductor layer 104C may be a p-type semiconductor layer. The first conductive semiconductor layer 104A, the light emitting layer 104B, and the second conductive semiconductor layer 104C may include III-V semiconductor materials, such as GaN series, InGaN series, AlGaN series, AlInGaN series, GaP series, InGaP series, AlGaP series, and AlInGaP series materials, which are generally represented by _{AlxInyGa (1-xy) N} or _{AlxInyGa (1-xy)} P, where 0≦x, _y ≦1, and (x+y)≦1. According to the properties of the materials used, the light emitting element 10 may emit infrared light, red light, green light, blue light, near-ultraviolet light, or ultraviolet light. For example, when the materials of the first conductive semiconductor layer 104A, the light emitting layer 104B, and the second conductive semiconductor layer 104C in the semiconductor stack 104 are AlInGaP series materials, red light with a wavelength between 610nm and 650nm can be emitted. When the materials of the first conductive semiconductor layer 104A, the light emitting layer 104B, and the second conductive semiconductor layer 104C in the semiconductor stack 104 are InGaN series materials, blue light with a wavelength between 400nm and 490nm, or green light with a wavelength between 530nm and 570nm can be emitted. When the materials of the first conductive type semiconductor layer 104A, the light emitting layer 104B, and the second conductive type semiconductor layer 104C in the semiconductor stack 104 are AlGaN series or AlInGaN series materials, ultraviolet light with a wavelength between 400nm and 250nm can be emitted. The materials of the semiconductor stack 104 can be deposited on the substrate 100 and the protrusion structure 102 using a suitable epitaxial growth process, such as metal organic chemical vapor deposition (MOCVD), molecular beam epitaxy (MBE), liquid phase epitaxy (LPE), vapor phase epitaxy (VPE), or a combination thereof. In one embodiment, the semiconductor stack 104 further includes a buffer structure (not shown) between the protrusion structure 102 and the first conductive type semiconductor layer 104A. The buffer structure can reduce lattice mismatch and suppress dislocation, thereby improving epitaxial quality. The buffer structure can be a multi-layer structure or a single-layer structure, and its material includes but is not limited to GaN, AlGaN or AlN.

Next, referring to FIG. 3 , the semiconductor stack 104 is patterned to form a mesa structure. Specifically, a suitable etching process can be used to remove a portion of the semiconductor stack 104 until a portion of the upper surface 104AUS of the first conductive semiconductor layer 104A is exposed. Next, a portion of the first conductive semiconductor layer 104A is removed downward from the upper surface 104AUS, so that a portion of the protrusion structure 102 is not covered by the semiconductor stack 104 or is partially covered by the semiconductor stack 104. In another embodiment, the patterning process for forming the mesa structure includes removing a portion of the semiconductor stack 104 by a suitable etching process until a portion of the protruding structure 102 is exposed. Then, a portion of the second conductive type semiconductor layer 104C and the light emitting layer 104B are removed downward from the upper surface of the second conductive type semiconductor layer 104C until a portion of the upper surface 104AUS of the first conductive type semiconductor layer 104A is exposed. In one embodiment, the suitable etching process may include a dry etching process. For example, the dry etching process may include plasma etching (PE), reactive ion etching (RIE), inductively coupled plasma reactive ion etching (ICP-RIE), etc. or a combination thereof, and may be performed using plasma, gas or a combination thereof. The above-mentioned gas may include oxygen-containing gas, fluorine-containing gas (such as hydrogen fluoride, carbon tetrafluoride, sulfur hexafluoride, difluoromethane, fluoroform, and/or hexafluoroethane), chlorine-containing gas (such as chlorine, chloroform, carbon tetrachloride, and/or boron trichloride), bromine-containing gas (such as hydrogen bromide and/or bromoform), iodine-containing gas, and/or a combination thereof.

FIG. 4A is a cross-sectional view illustrating a process of forming the light-emitting element 10 according to some embodiments, and FIG. 4B is a corresponding top view. It should be noted that the cross-sectional view of FIG. 4A is captured along the section line A-A' in the top view of FIG. 4B. For the purpose of illustration, the protrusion structure 102 covered by the semiconductor stack 104 is indicated by a dotted line in FIG. 4B. Referring to FIGS. 4A and 4B, after forming the semiconductor stack 104 having a high platform structure, the protrusion structure 102 not covered by the semiconductor stack 104 in FIG. 3 is removed. After removing the protrusion structure 102 not covered by the semiconductor stack 104, the upper surface 100US of the substrate 100 may include a first region R1 and a second region R2 surrounding the first region R1. The first region R1 is a region in the light-emitting element 10 where the protrusion structure 102 and the semiconductor stack 104 exist, and the second region R2 is a region in the light-emitting element 10 where the protrusion structure 102 and the semiconductor stack 104 do not exist. Therefore, the second region R2 can be used as a cutting path for the light-emitting element in a subsequent cutting process, and can also be regarded as the "peripheral region R2" of the independent light-emitting element 10 after the cutting process is completed. In one embodiment, the width of the peripheral region R2 in the independent light-emitting element 10 is between 1-50 μm. The protrusion structure 102 in the second region R2 may be removed by a suitable etching process. In some embodiments, the protrusion structure 102 in the second region R2 may be removed by a dry etching process, such as plasma etching, reactive ion etching, inductively coupled plasma active ion etching, or a combination thereof. In some embodiments, the step of removing the protrusion structure 102 in the second region R2 may be completed in the same etching process as the step of removing the first conductive semiconductor layer 104A.

Referring again to FIGS. 4A and 4B , the protrusion structure 102 includes a plurality of first protrusion structures 102A and a plurality of second protrusion structures 102B. As described above, the first protrusion structure 102A and the second protrusion structure 102B are both located in the first region R1, and the second protrusion structure 102B is located around the first region R1. According to some embodiments, the projection surface of the semiconductor stack 104 projected on the substrate 100 at least partially overlaps the projection surface of the second protrusion structure 102B on the substrate 100. In the embodiment where the projection surface of the semiconductor stack 104 on the substrate 100 partially overlaps the projection surface of the second protrusion structure 102B on the substrate 100, as shown in FIGS. 4A and 4B, a portion of the second protrusion structure 102B (i.e., the portion of the second protrusion structure 102B indicated by a solid line in FIG. 4B) is not covered by the semiconductor stack 104 and is exposed. Specifically, as shown in FIG. 4A, the second protrusion structure 102B includes a sidewall 102BS. The sidewall 102BS faces the second region R2 and is not covered by the semiconductor stack 104. There is an angle θ1 between the sidewall 102BS of the second protrusion structure 102B and the second region R2 of the upper surface 100US of the substrate 100. In one embodiment, the angle θ1 is between 90 degrees and 160 degrees. In another embodiment, the angle θ1 is between 100 degrees and 150 degrees.

According to some embodiments, as shown in FIG. 4A , the semiconductor stack 104 includes a sidewall 104S. In one embodiment, the sidewall 104S may be a sidewall of the first conductive type semiconductor layer 104A. In one embodiment, the sidewall 104S is connected to the sidewall 102BS. In the cross-sectional view, the sidewall 104S of the semiconductor stack 104 has an angle θ2 with the second region R2 of the upper surface 100US of the substrate 100, and the angle θ2 may be between 100 degrees and 160 degrees. In some embodiments, the angle θ2 may be greater than or equal to the angle θ1. In one embodiment, the absolute value of the difference between the angle θ1 and the angle θ2 may be between 0 and 40 degrees. By controlling the etching conditions of the first conductive semiconductor layer 104A and the protrusion structure 102, the angle θ1, the angle θ2 and the absolute value of the difference between the angle θ1 and the angle θ2 are controlled within a specific range, so that the second protrusion structure 102B can be prevented from being overetched (over etching) to cause a discontinuity between the sidewall 104S and the sidewall 102BS, so that the insulating layer 108 (to be described in detail below) above it has poor coverage, wrinkles or cracks at this location. It should be noted that, in some embodiments, when the protrusion structure 102 on the second region R2 is removed, the upper surface 100US may be slightly etched in the second region R2. Therefore, after the protrusion structure 102 on the second region R2 is removed, the level of the upper surface 100US in the second region R2 may be slightly lower than the level of the upper surface 100US in the first region R1. In this case, even if the levels of the upper surface 100US in the second region R2 and the first region R1 are slightly different, the surface of the upper surface 100US after being slightly etched in the second region R2 is still defined as the upper surface 100US of the substrate 100. In a horizontal direction parallel to the upper surface 100US of the substrate 100 (e.g., the X-axis direction or the Y-axis direction in FIG. 4A), the maximum width 102BW of the second protrusion structure 102B is smaller than the maximum width 102AW of the first protrusion structure 102A. In addition, in some embodiments, as shown in FIG. 4A, in a normal direction of the upper surface 100US of the substrate 100 (e.g., the Z-axis direction in FIG. 4A), the maximum height 102BH of the second protrusion structure 102B may be smaller than or equal to the maximum height 102AH of the first protrusion structure 102A.

Figures 5-7 are cross-sectional views of intermediate stages in the process of forming the light-emitting element 10 according to some embodiments. Referring to Figure 5, in some embodiments, an ohmic contact layer 106 may be formed on the semiconductor stack 104. According to some embodiments, the ohmic contact layer 106 may include a light-transmitting conductive material. For example, a metal oxide or a thin metal layer. The metal oxide may include indium tin oxide (ITO), indium zinc oxide (IZO), aluminum zinc oxide (AZO), etc., and the thin metal layer may include nickel (Ni), silver (Ag) or nickel gold (Ni/Au) alloy.

Next, referring to FIG. 6 , an insulating layer 108 is formed on the semiconductor stack 104. Specifically, the insulating layer 108 covers the semiconductor stack 104 and the second region R2 of the upper surface 100US of the substrate 100. In addition, in some embodiments, the insulating layer 108 may be formed on the substrate 100 and the semiconductor stack 104 in a conforming manner, so that the insulating layer 108 may have a uniform thickness on the upper surface of the semiconductor stack 104 and the second region R2. In an embodiment where an ohmic contact layer 106 is formed on the semiconductor stack 104, the insulating layer 108 further covers the ohmic contact layer 106. In some embodiments, the insulating layer 108 contacts the sidewall 102BS of the second protrusion structure 102B.

According to some embodiments, as shown in FIG. 6 , the bottommost surface 108BS of the insulating layer 108 in the second region R2 is located at a first level L1, and the first level L1 is lower than the level at which the protrusion structure 102 is located. In detail, in one embodiment, the top 102AT of the first protrusion structure 102A is located at the second level L2, and the top 102BT of the second protrusion structure 102B is located at a third level L2', and the first level L1 is lower than the second level L2 and the third level L2'. In some embodiments, the third level L2' at which the top 102BT of the second protrusion structure 102B is located is lower than or equal to the second level L2 at which the top 102AT of the first protrusion structure 102A is located. It should be understood that the "first level", "second level" and "third level" mentioned herein refer to imaginary horizontal planes parallel to the upper surface of the substrate 100 (i.e., the upper surface 100US shown in FIG. 4A), or may be imaginary horizontal planes parallel to the XY plane shown in FIG. 6.

In some embodiments, the insulating layer 108 may be a single-layer structure or a multi-layer structure, and its material may include silicon oxide, silicon nitride, silicon oxynitride, niobium oxide, niobium oxide, titanium oxide, magnesium fluoride, aluminum oxide, etc., or a combination thereof. In one embodiment, the insulating layer 108 may include a distributed Bragg reflector (DBR). In detail, the distributed Bragg reflector structure of the insulating layer 108 may be formed by stacking one or more pairs of insulating materials with different refractive indices alternately. By selecting insulating materials with different refractive indices and matching a specific thickness design, the insulating layer 108 can reflect light in a specific wavelength range and/or a specific incident angle range. In some embodiments, the insulating layer 108 includes a stack of a distributed Bragg reflection structure and other insulating material layers.

In the previous process steps of the light-emitting element 10, the protrusion structure 102 of the second region R2 is removed, so that the second region R2 is not provided with the protrusion structure 102. Therefore, the insulating layer 108 deposited in the second region R2 can have a relatively flat profile and morphology. According to some embodiments, the insulating layer 108 including the distributed Bragg reflection structure can maintain an effective reflection effect due to its relatively flat profile and morphology, thereby helping to improve the light extraction efficiency of the light-emitting element 10. Furthermore, in the prior art in which the protrusion structure of the second region is not removed, the insulating layer 108 forms a surface with ups and downs when coated on a plurality of protrusion structures. Compared with the above-mentioned prior art, the present embodiment can avoid the surface ups and downs of the formed insulating layer 108, which easily causes cracks in the insulating layer 108, thereby preventing the conductive bonding material used in subsequent processes such as flip-chip bonding from penetrating into the cracks and affecting the electrical properties of the light-emitting element 10.

Referring again to FIG. 6 , in some embodiments, after depositing the insulating layer 108 , a portion of the insulating layer 108 may be removed to form openings 108P1 and 108P2. Specifically, the openings 108P1 and 108P2 may expose the ohmic contact layer 106 on the first conductive semiconductor layer 104A and the second conductive semiconductor layer 104C of the semiconductor stack 104, respectively. However, in an embodiment where the light-emitting element 10 is not formed with the ohmic contact layer 106, the opening 108P2 may expose the second conductive semiconductor layer 104C.

Next, referring to FIG. 7 , a first electrode 110 and a second electrode 112 are formed. According to some embodiments, the first electrode 110 is formed on the insulating layer 108 and extends to fill the opening 108P2, and the second electrode 112 is formed on the insulating layer 108 and extends to fill the opening 108P1. The materials of the first electrode 110 and the second electrode 112 may include any suitable metal material, for example, chromium (Cr), titanium (Ti), gold (Au), aluminum (Al), silver (Ag), copper (Cu), tin (Sn), nickel (Ni), rhodium (Rh), tungsten (W), indium (In), platinum (Pt), etc., or alloys or stacks of the foregoing materials. According to some embodiments, when the first electrode 110 is made of aluminum or silver or a metal with high reflectivity, and is combined with a single-layer or multi-layer distributed Bragg reflector structure insulating layer 108, an omni-directional reflector (ODR) structure can be formed, which can further improve the light extraction efficiency of the light-emitting element 10. The light-emitting element 10 is flip-chip-bonded, and the first electrode 110 and the second electrode 112 are bonded to a carrier (not shown) by a conductive bonding layer, such as welding or eutectic bonding, so that the light-emitting element 10 is connected to the circuit (not shown) on the carrier to achieve connection with external electronic components or external power sources.

FIGS. 8A and 8B are cross-sectional views of a light-emitting element 10 having a bulged portion 114 or 116 according to another embodiment. Referring to FIG. 8A, In some embodiments, the substrate 100 may further include a plurality of bulged portions 114 separated from each other. The bulged portion 114 may be raised from the upper surface 100US of the substrate 100 and extend vertically. According to some embodiments, as shown in FIG. 8A, the bulged portion 114 may be located in the first region R1 and the second region R2. In some embodiments, the bulged portion 114 and the substrate 100 are integrally formed. In some embodiments, as shown in FIG. 8A, the bulged portion 114 may include a material different from that of the protrusion structure 102 (the first protrusion structure 102A and the second protrusion structure 102B). Furthermore, as shown in FIG. 8A , in some embodiments, the protrusion 114 includes a flat upper surface, and the lower surface of the protrusion structure 102 is connected to the upper surface of the protrusion 114. The first protrusion structure 102A and the second protrusion structure 102B can be disposed on the protrusion 114 in the first region R1 in a one-to-one correspondence. Similarly, since the protrusion structure 102 is not disposed in the second region R2, the protrusion structure 102 is not disposed on the protrusion 114 in the second region R2. As in the aforementioned embodiment, the second protrusion structure 102B in FIG. 8A includes a side wall 102BS, and the semiconductor stack 104 includes a side wall 104S. The side wall 102BS faces the second region R2 and is not covered by the semiconductor stack 104. The insulating layer 108 covering the semiconductor stack sidewall 104S further extends to cover the upper surface of the protrusion 114. An angle θ1 is formed between the sidewall 102BS of the second protrusion structure 102B and the second region R2 of the upper surface 100US of the substrate 100. In one embodiment, the angle θ1 is between 90 degrees and 160 degrees. In another embodiment, the angle θ1 is between 100 degrees and 150 degrees. An angle θ2 is formed between the sidewall 104S of the semiconductor stack 104 and the second region R2 of the upper surface 100US of the substrate 100. The angle θ2 may be between 100 degrees and 160 degrees. In some embodiments, the angle θ2 may be greater than or equal to the angle θ1. In one embodiment, the absolute value of the difference between the angle θ1 and the angle θ2 may be between 0 degrees and 40 degrees.

Referring to FIG. 8B , the embodiment shown in FIG. 8B is similar to the embodiment shown in FIG. 8A , except that the second region R2 of the light-emitting element 10 shown in FIG. 8B does not have a protrusion 114 .

Referring to FIG. 8C , the embodiment shown in FIG. 8C is similar to the embodiment shown in FIG. 8A , except that the protrusion structure 102 in FIG. 8C includes the same material as the substrate 100, that is, the embodiment shown in FIG. 8C uses the substrate 100 and the protrusion structure 102 as in FIG. 1B . Specifically, in the first region R1 of the upper surface 100US of the substrate 100, the first protrusion structure 102A and the substrate 100 are formed of the same material, and the second protrusion structure 102B and the substrate 100 are also formed of the same material. In the second region R2 of the upper surface 100US of the substrate 100, the protrusion structure 102 can be removed by an etching process, so the protrusion structure 102 does not exist in the second region R2. However, in one embodiment, the protrusion structure 102 may not be completely removed in the second region R2, and the protrusion structure that is not completely removed, that is, the remaining protrusion structure, becomes the protrusion 116. In this embodiment, when the protrusion structure in the second region R2 is etched to less than 20% of the height of the first protrusion structure 102A, or is etched to less than 20% of the volume of the first protrusion structure 102A, the remaining structure can be referred to as the "protrusion 116" instead of being regarded as a protrusion structure. As shown in FIG. 8C, a portion of the protrusion structure 102 located at the periphery of the first region R1 close to the second region R2 is removed to form a second protrusion structure 102B. However, the protrusion structure 102 located in the second region R2 may not be completely removed, and the remaining protrusion structure located in the second region R2 is regarded as the protrusion 116. In the first region R1, because the substrate 100 and the protrusion structure 102 are formed of the same material, the protrusion 116 can be regarded as not existing in the first region R1. As in the above-mentioned embodiment, the second protrusion structure 102B in FIG. 8C includes a side wall 102BS, and the semiconductor stack 104 includes a side wall 104S. The side wall 102BS faces the second region R2 and is not covered by the semiconductor stack 104. The insulating layer 108 covering the semiconductor stack side wall 104S further extends to cover the upper surface of the protrusion 116. There is an angle θ1 between the sidewall 102BS of the second protrusion structure 102B and the second region R2 of the upper surface 100US of the substrate 100, and the angle θ1 is between 90 degrees and 160 degrees. In another embodiment, the angle θ1 is between 100 degrees and 150 degrees. There is an angle θ2 between the sidewall 104S of the semiconductor stack 104 and the second region R2 of the upper surface 100US of the substrate 100, and the angle θ2 may be between 100 degrees and 160 degrees. In some embodiments, the angle θ2 may be greater than or equal to the angle θ1. In one embodiment, the absolute value of the difference between the angle θ1 and the angle θ2 may be between 0 degrees and 40 degrees.

Referring to FIG. 8D , the embodiment shown in FIG. 8D is similar to the embodiment shown in FIG. 8C , except that the second region R2 of the light-emitting element 10 shown in FIG. 8D does not have a protrusion 116 .

In summary, according to some embodiments of the present disclosure, the upper surface of the substrate of the light-emitting element includes a first area and a second area surrounding the first area. The first area of the upper surface is provided with a protrusion structure, while the second area of the upper surface is not provided with a protrusion structure. In this way, the insulating layer subsequently formed in the second area of the upper surface of the substrate can have a relatively flat profile and morphology to avoid cracks in the insulating layer to prevent the conductive material used in subsequent processes, such as flip-chip bonding, from penetrating into the cracks and affecting the electrical properties and light-emitting effect of the light-emitting element. In some embodiments, the insulating layer with reflective properties can maintain an effective reflective effect due to its relatively flat profile and morphology, thereby helping to improve the light-emitting efficiency of the light-emitting element. In addition, by controlling the etching conditions of the first conductive semiconductor layer 104A and the protruding structure 102, the angle θ1, the angle θ2 and the absolute value of the difference between the angle θ1 and the angle θ2 are controlled within a specific range, so that the second protruding structure 102B located at the edge of the first region R1 and partially covered by the semiconductor stack 104 can be prevented from being over-etched to cause a discontinuity between the sidewall 104S and the sidewall 102BS of the semiconductor stack, thereby causing the insulating layer 108 above this to have poor coverage, wrinkles or breaks.

Although some embodiments of the present invention and their advantages have been described in detail, it should be understood that various changes, substitutions and modifications may be made without departing from the spirit and scope of the invention as defined by the scope of protection of the present invention. For example, a person having ordinary knowledge in the art to which the present invention belongs should readily understand that many of the components, functions, processes and materials described herein may be changed without departing from the scope of the present invention. Furthermore, the scope of this application is not limited to the specific embodiments of the processes, machines, manufactures, material compositions, methods and steps described in the specification. Those with common knowledge in the technical field to which the present invention belongs can easily understand from the present invention that any process, machine, manufacturing, material composition, method or step currently or developed in the future, as long as it can achieve substantially the same function or substantially the same result as the corresponding embodiment described herein, can be used according to the embodiments of the present invention. Therefore, the protection scope of the present invention includes the above-mentioned process, machine, manufacturing, material composition, method or step.

10: Light-emitting element

100: Base

102: Protrusion structure

102A: First protrusion structure

102B: Second protrusion structure

104: Semiconductor stacking

104A: first conductivity type semiconductor layer

104B: Luminescent layer

104C: Second conductivity type semiconductor layer

106: Ohm contact layer

108: Insulation layer

108P1,108P2: Opening

110: First electrode

112: Second electrode

Claims (10)

A light-emitting element comprises: a substrate, comprising an upper surface, wherein the upper surface comprises a first region and a second region surrounding the first region; a plurality of protrusion structures, disposed in the first region but not disposed in the second region; a semiconductor stack, disposed on the first region and covering the protrusion structures; and an insulating layer, covering the semiconductor stack and the second region of the upper surface; wherein the protrusion structures comprise: a plurality of first protrusion structures, disposed on the first region and covering the protrusion structures; Area; and a plurality of second protrusion structures, located at the periphery of the first area, wherein in a direction parallel to the upper surface of the substrate, the maximum width of the second protrusion structures is less than the maximum width of the first protrusion structures, and wherein the second protrusion structures each include a first side wall, the first side wall is not covered by the semiconductor stack, and has a first angle with the second area of the upper surface, and the first angle is between 90 degrees and 160 degrees. The light-emitting element as described in claim 1, wherein in a normal direction of the substrate, the maximum height of the second protrusion structures is less than or equal to the maximum height of the first protrusion structures. The light-emitting element as described in claim 1, wherein the insulating layer includes a distributed Bragg reflector (DBR) structure. The light-emitting element as described in claim 1, wherein the semiconductor layer is stacked on the projection surface of the substrate and at least partially overlaps the second protrusion structures on the projection surface of the substrate. A light-emitting element as described in claim 1, wherein the level at which a bottommost surface of the insulating layer in the second region is located is lower than the level at which a topmost surface of the protruding structures is located. The light-emitting element as described in claim 1 further includes a plurality of bulged portions, which are raised from the upper surface of the substrate and extend vertically. The light-emitting element as described in claim 6, wherein the protrusions are located in the first region and the second region, and in the first region, the protrusion structures are disposed on the protrusions in a one-to-one correspondence, wherein the material of the protrusion structures is the same as or different from the material of the protrusions. A light-emitting element as described in claim 1, wherein the insulating layer contacts the first side walls of the second protrusion structures. The light-emitting element as described in claim 1, wherein the semiconductor stack includes a second sidewall connected to the first sidewall, and there is a second angle between the second sidewall and the second area of the upper surface, and wherein the second angle is greater than or equal to the first angle. A light-emitting element as described in claim 9, wherein the absolute value difference between the second angle and the first angle is between 0 degrees and 40 degrees.

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