TWI868777B - Controller for power supply device - Google Patents

Abstract

A controller for a power supply device is provided. The controller includes a transmission terminal, a first memory circuit, a second memory circuit, a determining circuit and a control circuit. When the input voltage value is lower than a reference voltage value, the determining circuit generates a first mode signal. When the input voltage value is greater than or equal to the reference voltage value, the determining circuit generates a second mode signal. The control circuit enters a first mode in response to the first mode signal, and enters a second mode in response to the second mode signal. In the first mode, the control circuit writes a control parameter from the transmission terminal into the first memory circuit. In the second mode, the control circuit uses the control parameters stored in the first memory circuit to test the power supply device. When the control parameter meets an expected function of the power supply device, the control circuit writes the control parameter into the second memory circuit.

Description

Controller for power supply device

The present invention relates to a controller, and in particular to a controller for a power supply device.

Current power supply devices operate based on control parameters. Generally, the control parameters are written into a one-time programmable (OTP) memory circuit.

It should be noted that the power supply device may have different expected functions based on different applications or usage scenarios. Different expected functions correspond to different control parameters. This means that the control parameters must be adjusted to meet the expected functions of different applications or usage scenarios. However, when the control parameters written into the OTP memory circuit are tested to be inconsistent with the expected functions, the engineer needs to modify the OTP memory circuit. The above modification is, for example, an engineering change order (ECO).

The present invention provides a controller for a power supply device, which can realize multiple reception of control parameters and test the received different control parameters.

The controller of the power supply device of the present invention includes a power input terminal, a transmission terminal, a first memory circuit, a second memory circuit, a judgment circuit and a control circuit. The judgment circuit is coupled to the power input terminal. The judgment circuit judges the input voltage value at the power input terminal. When the input voltage value is less than the reference voltage value, the judgment circuit generates a first mode signal. When the input voltage value is greater than or equal to the reference voltage value, the judgment circuit generates a second mode signal. The control circuit is coupled to the judgment circuit, the first memory circuit, the second memory circuit and the transmission terminal. The control circuit enters the first mode in response to the first mode signal, and enters the second mode in response to the second mode signal. In the first mode, the control circuit writes the first control parameter from the transmission end to the first memory circuit. In the second mode, the control circuit tests the power supply device using the first control parameter stored in the first memory circuit, and when the first control parameter meets the expected function of the power supply device, the first control parameter is written to the second memory circuit.

Based on the above, in the first mode, the control circuit first writes the first control parameter from the transmission end into the first memory circuit. In the second mode, the control circuit uses the first control parameter stored in the first memory circuit to test the power supply device. When the first control parameter meets the expected function of the power supply device, the control circuit writes the first control parameter into the second memory circuit. The control circuit is allowed to perform multiple programming operations on the first memory circuit. In this way, the controller can receive control parameters multiple times and test the different control parameters received.

Some embodiments of the present invention will be described in detail with the accompanying drawings. The component symbols cited in the following description will be regarded as the same or similar components when the same component symbols appear in different drawings. These embodiments are only part of the present invention and do not disclose all possible implementation methods of the present invention. More precisely, these embodiments are only examples within the scope of the patent application of the present invention.

Please refer to FIG. 1, which is a schematic diagram of a power supply device according to an embodiment of the present invention. In this embodiment, the power supply device 10 includes a controller 100. The power supply device 10 operates in response to the control parameters in the controller 100. Taking this embodiment as an example, the power supply device 10 receives an input voltage value VAC and provides an output power POUT according to the input voltage value VAC and the control parameters. The power supply device 10 can be a power chip or a power converter (the present invention is not limited to this).

In this embodiment, the controller 100 includes a power input terminal PAC, a transmission terminal FBL, a first memory circuit 110, a second memory circuit 120, a determination circuit 130, and a control circuit 140. The determination circuit 130 is coupled to the power input terminal PAC. The determination circuit 130 determines the input voltage value VAC at the power input terminal PAC. The determination circuit 130 provides one of the first mode signal SM1 and the second mode signal SM2 according to the input voltage value VAC. Specifically, the determination circuit 130 compares the input voltage value VAC and the reference voltage value VDET. When the input voltage value VAC is less than the reference voltage value VDET, the determination circuit 130 generates the first mode signal SM1. When the input voltage value VAC is greater than or equal to the reference voltage value VDET, the judgment circuit 130 generates a second mode signal SM2.

In the present embodiment, the control circuit 140 is coupled to the determination circuit 130, the first memory circuit 110, the second memory circuit 120 and the transmission terminal FBL. The control circuit 140 enters the first mode in response to the first mode signal SM1, and enters the second mode in response to the second mode signal SM2. The first mode is, for example, the programming mode. The second mode is, for example, the normal mode. In the first mode, the control circuit 140 writes the control parameter PC1 from the transmission terminal FBL to the first memory circuit 110. In the second mode, the control circuit 140 uses the control parameter PC1 stored in the first memory circuit 110 to test the power supply device 10. In other words, in the second mode, the power supply device 10 performs an operation test based on the control parameter PC1 stored in the first memory circuit 110. In the second mode, when the control parameter PC1 meets the expected function FC of the power supply device 10, the control circuit 140 writes the control parameter PC1 to the second memory circuit 120. The expected function FC is, for example, at least one of the output voltage value, output current value, output power and efficiency expected by the power supply device 10.

It is worth mentioning that the control circuit 140 first writes the control parameter PC1 to the first memory circuit 110 in the first mode. The control circuit 140 uses the control parameter PC1 stored in the first memory circuit 110 to test the power supply device 10 in the second mode. When the control parameter PC1 meets the expected function FC of the power supply device 10, the control circuit 140 writes the control parameter PC1 to the second memory circuit 120. The control circuit 140 is allowed to perform multiple programming operations on the first memory circuit 110. In this way, the controller 100 can receive control parameters multiple times and test the different control parameters received.

In this embodiment, the first memory circuit 110 is any form of multiple-times programmable (MTP) memory circuit. The second memory circuit 120 is a one-time programmable (OTP) memory circuit. The second memory circuit 120 is, for example, a read-only memory (ROM) circuit or a fuse circuit.

It should be noted that, compared to the existing power supply device, the control circuit 140 of the power supply device 10 of this embodiment can write control parameters to the first memory circuit 110 an unlimited number of times. In other words, the controller 100 can implement an unlimited number of tests of different control parameters. Even if the control parameter PC1 does not meet the expected function FC of the power supply device 10, the control circuit 140 can write other control parameters to the first memory circuit 110 for another test. This embodiment does not require the second memory circuit 120 to be modified, such as an engineering change order (ECO). The controller 100 is suitable for testing multiple different control parameters. In this way, the test convenience of the controller 100 can be greatly improved.

In this embodiment, the transmission end FBL has different uses in different modes. In the first mode, the transmission end FBL is switched to a parameter receiving end to receive the control parameter PC1. Taking this embodiment as an example, the transmission end FBL receives the control parameter PC1 from the external device ED in the first mode. The control circuit 140 receives the control parameter PC1 and stores the control parameter PC1 in the first memory circuit 110. In some embodiments, the first memory circuit 110 is coupled to the transmission end FBL. The control circuit 140 controls the first memory circuit 110 to receive the control parameter PC1 and store the control parameter PC1 in the first mode.

In this embodiment, the control circuit 140 reads the control parameter PC1 stored in the first memory circuit 110 in the second mode, and generates a control signal SC corresponding to the control parameter PC1 according to the control parameter PC1. The control circuit 140 uses the control signal SC for testing. The control signal SC includes at least one of a switching signal for controlling a power switch in the power supply device 10, a synchronous rectification signal of a synchronous rectification switch, and a reference signal. The reference signal can be a threshold value required for overvoltage protection, overcurrent protection, and overtemperature protection.

After testing, if the control parameter PC1 meets the expected function FC of the power supply device 10, it means that the control parameter PC1 is applicable to the power supply device 10. Therefore, the control circuit 140 writes the control parameter PC1 to the second memory circuit 120. In subsequent operations, the control circuit 140 reads the control parameter PC1 stored in the second memory circuit 120 to generate the control signal SC, thereby controlling the power supply device 10.

In this embodiment, the external device ED can be connected to the transmission end FBL using any form of data transmission interface. The data transmission interface is, for example, a Universal Asynchronous Receiver/Transmitter (UART) or a Universal Serial Bus (USB). In the second mode, the transmission end FBL is switched to the application end of the power supply device 10. For example, the application end can be a data feedback end. Taking the data feedback end as an example, the power supply device 10 can feed back the test data to the external device ED through the transmission end FBL.

In this embodiment, the external device ED can be an electronic device such as a test host, a tablet computer, a laptop computer, and a desktop computer that can provide control parameters.

In this embodiment, the determination circuit 130 includes a first input terminal, a second input terminal and an output terminal. The first input terminal is coupled to the power input terminal PAC. The first input terminal receives the input voltage value VAC at the power input terminal PAC. The second input terminal receives the reference voltage value VDET. The output terminal is coupled to the control circuit 140. The output terminal is used to output one of the first mode signal SM1 and the second mode signal SM2. In this embodiment, the determination circuit 130 can be implemented by a comparator or an operational amplifier.

In this embodiment, the control circuit 140 is, for example, a central processing unit (CPU), or other programmable general-purpose or special-purpose microprocessor (Microprocessor), digital signal processor (Digital Signal Processor, DSP), programmable controller, application specific integrated circuits (Application Specific Integrated Circuits, ASIC), programmable logic device (Programmable Logic Device, PLD) or other similar devices or a combination of these devices, which can load and execute computer programs.

Please refer to FIG. 1 and FIG. 2. FIG. 2 is a schematic diagram of an input voltage value according to an embodiment of the present invention. In this embodiment, the judgment circuit 130 judges the input voltage value VAC at the power input terminal PAC. The judgment circuit 130 compares the peak value VP of the input voltage value VAC and the reference voltage value VDET. When the peak value VP of the input voltage value VAC is less than the reference voltage value VDET, the judgment circuit 130 generates a first mode signal SM1. Therefore, the control circuit 140 enters the first mode MD1. On the other hand, When the peak value VP of the input voltage value VAC is greater than or equal to the reference voltage value VDET, the judgment circuit 130 generates a second mode signal SM2. Therefore, the control circuit 140 enters the second mode MD2.

Taking the present embodiment as an example, if the control circuit 140 is to enter the first mode MD1, the engineer can apply a first voltage signal to the power input terminal PAC. The peak value VP of the input voltage value VAC of the first voltage signal is lower than the reference voltage value VDET. Therefore, the judgment circuit 130 generates a first mode signal SM1. The control circuit 140 enters the first mode MD1 in response to the first mode signal SM1. In the first mode MD1, if the control circuit 140 receives the control parameter PC1 through the transmission terminal FBL, the control circuit 140 will write the control parameter PC1 to the first memory circuit 110. In the first mode MD1, if the control circuit 140 does not receive the control parameter PC1, the control circuit 140 will wait until the control parameter PC1 is received. The first voltage signal can be a DC voltage signal or an AC voltage signal.

When the first memory circuit 110 stores the control parameter PC1, the engineer can apply a second voltage signal to the power input terminal PAC. The second voltage signal can be a DC voltage signal or an AC voltage signal. The second voltage signal can be, for example, AC power. The peak value VP of the input voltage value VAC of the second voltage signal is higher than the reference voltage value VDET. Therefore, the judgment circuit 130 generates a second mode signal SM2. The control circuit 140 responds to the second mode signal SM2 and enters the second mode MD2. In the second mode MD2, the control circuit 140 uses the control parameter PC1 stored in the first memory circuit 110 to test the power supply device 10. After the test, when the control parameter PC1 meets the expected function FC of the power supply device 10, the control parameter PC1 may be the optimal parameter of the power supply device 10. The control circuit 140 feeds back the test result SF to the external device ED through the transmission terminal FBL. In addition, in the second mode MD2, after the test is completed, the control circuit 140 writes the control parameter PC1 to the second memory circuit 120. Therefore, after leaving the factory, the power supply device 10 operates based on the control parameter PC1 stored in the second memory circuit 120. In other words, after leaving the factory, the control circuit 140 operates in the second mode MD2.

On the other hand, in the second mode MD2, when the control parameter PC1 does not meet the expected function FC of the power supply device 10, the control parameter PC1 is not the optimal parameter of the power supply device 10. The control circuit 140 feeds back the above test result SF to the external device ED through the transmission terminal FBL. Therefore, the engineer can know that the control parameter must be adjusted. The engineer applies a first voltage signal to the power input terminal PAC. Therefore, the controller 100 is controlled to enter the first mode MD1. In the first mode MD1, the external device ED provides the control parameter PC2. The control circuit 140 receives the control parameter PC2 from the transmission terminal FBL and writes the control parameter PC2 to the first memory circuit 110. Next, the engineer applies a second voltage signal to the power input terminal PAC to make the controller 100 enter the second mode MD2.

In the second mode MD2, the control circuit 140 reads the control parameter PC2 stored in the first memory circuit 110, and generates a control signal SC corresponding to the control parameter PC2 according to the control parameter PC2. The control circuit 140 uses the control signal SC corresponding to the control parameter PC2 for testing. When the control parameter PC2 stored in the first memory circuit 110 meets the expected function FC of the power supply device 10, the control parameter PC2 is written to the second memory circuit 120. Therefore, after leaving the factory, the power supply device 10 operates based on the control parameter PC2 stored in the second memory circuit 120.

In summary, the control circuit first writes the first control parameter from the transmission end to the first memory circuit in the first mode. In the second mode, the control circuit uses the first control parameter stored in the first memory circuit to test the power supply device. When the first control parameter meets the expected function of the power supply device, the control circuit writes the first control parameter to the second memory circuit. The control circuit is allowed to perform multiple programming operations on the first memory circuit. In this way, the controller can receive control parameters multiple times and test the different control parameters received. The controller is suitable for multiple tests of different control parameters. The test convenience of the controller can be greatly improved.

Although the present invention has been disclosed as above by the embodiments, it is not intended to limit the present invention. Anyone with ordinary knowledge in the relevant technical field can make some changes and modifications without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention shall be subject to the scope of the attached patent application.

10: Power supply device

100: Controller

110: First memory circuit

120: Second memory circuit

130: Judgment circuit

140: Control circuit

ED: External device

FBL: Transmission end

FC: Expected function

MD1: First mode

MD2: Second mode

PAC: power input terminal

PC1, PC2: control parameters

POUT: output power

SC: Control signal

SF:Test results

SM1: First mode signal

SM2: Second mode signal

VAC: Input voltage value

VDET: reference voltage value

VP: Peak value

FIG1 is a schematic diagram of a power supply device according to an embodiment of the present invention.

FIG2 is a schematic diagram of input voltage values according to an embodiment of the present invention.

10: Power supply device 100: Controller 110: First memory circuit 120: Second memory circuit 130: Judgment circuit 140: Control circuit ED: External device FBL: Transmission terminal FC: Expected function PAC: Power input terminal PC1, PC2: Control parameters POUT: Output power SC: Control signal SF: Test result SM1: First mode signal SM2: Second mode signal VAC: Input voltage value VDET: Reference voltage value

Claims (8)

A controller for a power supply device, comprising: a power input terminal; a transmission terminal; a first memory circuit, wherein the first memory circuit is a multi-time programmable memory circuit; a second memory circuit; a judgment circuit, coupled to the power input terminal, configured to judge the input voltage value at the power input terminal, and to generate a first mode signal when the input voltage value is less than a reference voltage value, and to generate a second mode signal when the input voltage value is greater than or equal to the reference voltage value; and a control circuit, coupled to the judgment circuit, the first memory circuit, the second memory circuit and the transmission terminal, and configured to respond to the first mode signal. A mode signal enters a first mode, and in response to the second mode signal entering a second mode, the transmission end is switched to an application end of the power supply device in the second mode, wherein in the first mode, the control circuit writes a first control parameter from the transmission end to the first memory circuit, and wherein in the second mode, the control circuit tests the power supply device using the first control parameter stored in the first memory circuit, and when the first control parameter meets the expected function of the power supply device, the first control parameter is written to the second memory circuit. A controller as described in claim 1, wherein the second memory circuit is a one-time programmable memory circuit. A controller as described in claim 1, wherein: when the peak value of the input voltage value is less than the reference voltage value, the judgment circuit generates the first mode signal, and when the peak value of the input voltage value is greater than or equal to the reference voltage value, the judgment circuit generates the second mode signal. A controller as claimed in claim 1, wherein the transmission end is switched to a parameter receiving end in the first mode. A controller as described in claim 1, wherein the transmission end receives the first control parameter from an external device in the first mode. A controller as claimed in claim 1, wherein in the second mode, when the first control parameter does not meet the expected function of the power supply device, the controller is controlled to enter the first mode. A controller as described in claim 6, wherein in the first mode, the control circuit receives a second control parameter from the transmission end and writes the second control parameter to the first memory circuit. A controller as described in claim 7, wherein in the second mode, when the second control parameter stored in the first memory circuit meets the expected function of the power supply device, the second control parameter is written to the second memory circuit.

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