TWI864179B - Inspection device, inspection system and inspection method - Google Patents
Inspection device, inspection system and inspection method Download PDFInfo
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Abstract
可獲得縮短測試之需要時間的同時,可提高實際製品之可靠性之檢查裝置。檢查裝置(2A)係包括:測試控制器(13),控制對於電路基板(100)之邊界掃描測試;以及系統控制器(11);系統控制器(11)係在環境形成裝置(3)對於電路基板(100),施加有3自由度以上之振動應力之狀態下,讓測試控制器(13)對於電路基板(100),執行邊界掃描測試。An inspection device that can shorten the time required for testing and improve the reliability of actual products. The inspection device (2A) includes: a test controller (13) that controls a boundary scanning test on a circuit substrate (100); and a system controller (11); the system controller (11) allows the test controller (13) to perform a boundary scanning test on the circuit substrate (100) when an environment forming device (3) applies a vibration stress with more than three degrees of freedom to the circuit substrate (100).
Description
本發明係關於一種檢查裝置、檢查系統以及檢查方法,且特別有關於一種用於對於檢查對象,執行邊界掃描測試之檢查裝置、檢查系統以及檢查方法。 The present invention relates to an inspection device, an inspection system and an inspection method, and in particular to an inspection device, an inspection system and an inspection method for performing a boundary scanning test on an inspection object.
將組裝有適用JTAG(Joint Test Action Group)之半導體裝置之電路基板,當作對象之檢查之一,眾所周知有邊界掃描測試。在邊界掃描測試中,主要係檢查被組裝於電路基板上之半導體裝置之軟焊接合不良,或複數半導體裝置間的接線之開路故障或短路故障等。在日本特開2000-148528號公報中,係開示有一種將適用JTAG之積體電路當作對象,以執行邊界掃描測試之測試系統。 One of the inspections of a circuit board with a semiconductor device that uses JTAG (Joint Test Action Group) is a well-known boundary scan test. In the boundary scan test, the main purpose is to check for soft solder joint defects of semiconductor devices assembled on the circuit board, or open circuit faults or short circuit faults of wiring between multiple semiconductor devices. In Japanese Patent Publication No. 2000-148528, a test system that uses an integrated circuit that uses JTAG as an object to perform a boundary scan test is disclosed.
經過量產工序以被出貨之實際製品,係有可能在暴露於振動或溫度等之種種環境因素之嚴峻情況下使用。然而,當依據日本特開2000-148528號公報所開示之測試系統時,在執行邊界掃描測試時,實際製品之使用情況係未被假設,所以,有實際製品之可靠性較低之課題。又,為了削減測試成本,也有被要求縮短測試之需要時間之課題。 Actual products shipped after mass production may be used in severe conditions exposed to various environmental factors such as vibration and temperature. However, when using the test system disclosed in Japanese Patent Publication No. 2000-148528, the actual product usage is not assumed when performing the boundary scanning test, so there is a problem of lower reliability of the actual product. In addition, in order to reduce the test cost, there is also a problem of shortening the time required for the test.
本發明之目的,係在於提供一種謀求縮短測試之需要時間的同時,可提高實際製品之可靠性之檢查裝置、檢查系統以及檢查方法。 The purpose of the present invention is to provide an inspection device, an inspection system, and an inspection method that can shorten the time required for testing while improving the reliability of actual products.
本發明一態樣之檢查裝置,係一種檢查裝置,可通訊地被連接於可收容做為檢查對象之至少一個電路基板之環境形成裝置,其包括:測試控制部,控制對於該電路基板之邊界掃描測試;以及主控制部;該主控制部係在該環境形成裝置對於該電路基板,施加有3自由度以上之振動應力之狀態下,讓該測試控制部執行對於該電路基板之該邊界掃描測試。 An inspection device according to one aspect of the present invention is an inspection device that can be communicatively connected to an environment forming device that can accommodate at least one circuit substrate as an inspection object, and includes: a test control unit that controls a boundary scanning test on the circuit substrate; and a main control unit; the main control unit allows the test control unit to perform the boundary scanning test on the circuit substrate when the environment forming device applies a vibration stress of more than 3 degrees of freedom to the circuit substrate.
1:檢查系統 1: Check the system
2,2A:檢查裝置 2,2A: Inspection device
3:環境形成裝置 3: Environment forming device
11:系統控制器 11: System controller
12:腔體監視器 12: Cavity monitor
13:測試控制器 13: Test the controller
14:記憶部 14: Memory Department
15:顯示部 15: Display unit
16:通訊部 16: Communications Department
17:中繼單元 17: Relay unit
18:掃描器單元 18: Scanner unit
21:通訊部 21: Communications Department
22:環境控制器 22: Environmental controller
23:空調室 23: Air conditioning room
24:腔體 24: Cavity
25:框體 25:Frame
26:鼓風機 26: Blower
27:加熱器 27: Heater
28:噴嘴 28: Spray nozzle
29:配管 29: Piping
30:閥 30: Valve
31:槽體 31: Tank
32:振動桌台 32: Vibrating table
33:彈簧 33: Spring
34:支撐構件 34: Supporting components
35:致動器 35: Actuator
36:振動偵知器 36: Vibration detector
37:溫度偵知器 37: Temperature detector
38:固定件 38:Fixers
40:電線 40: Wires
41:排氣口 41: Exhaust port
42:給氣口 42: Air supply port
100:電路基板 100: Circuit board
〔圖1〕係簡略表示本發明實施形態之檢查系統之構造之圖。 [Figure 1] is a diagram that briefly shows the structure of the inspection system of the embodiment of the present invention.
〔圖2〕係簡略表示檢查裝置之構造之方塊圖。 [Figure 2] is a block diagram that briefly shows the structure of the inspection device.
〔圖3〕係簡略表示環境形成裝置之構造之方塊圖。 [Figure 3] is a block diagram that briefly shows the structure of the environment forming device.
〔圖4〕係表示對於電路基板之振動應力之施加模式第1例之圖。 [Figure 4] is a diagram showing the first example of the vibration stress application mode to the circuit board.
〔圖5〕係表示對於電路基板之振動應力之施加模式第2例之圖。 [Figure 5] is a diagram showing the second example of the vibration stress application mode to the circuit board.
〔圖6〕係表示對於電路基板之振動應力之施加模式第3例之圖。 [Figure 6] is a diagram showing the third example of the vibration stress application mode to the circuit board.
〔圖7〕係表示對於電路基板之振動應力之施加模式第4例之圖。 [Figure 7] is a diagram showing the fourth example of the vibration stress application mode to the circuit board.
〔圖8〕係表示對於電路基板之振動應力之施加模式第5例之圖。 [Figure 8] is a diagram showing the fifth example of the vibration stress application mode to the circuit board.
〔圖9〕係表示對於電路基板之邊界掃描測試之執行時機第1例之圖。 [Figure 9] is a diagram showing the first example of the execution timing of the boundary scanning test on the circuit board.
〔圖10〕係表示對於電路基板之邊界掃描測試之執行時機第2例之圖。 [Figure 10] is a diagram showing the second example of the execution timing of the boundary scanning test on the circuit board.
〔圖11〕係表示對於電路基板之邊界掃描測試之執行時機第3例之圖。 [Figure 11] is a diagram showing the third example of the execution timing of the boundary scanning test on the circuit board.
〔圖12〕係表示對於電路基板之邊界掃描測試之執行時機第4例之圖。 [Figure 12] is a diagram showing the fourth example of the execution timing of the boundary scanning test on the circuit board.
〔圖13〕係簡略表示變形例檢查裝置之構造之方塊圖。 [Figure 13] is a block diagram that briefly shows the structure of the modified inspection device.
〔圖14〕係簡略表示掃描器單元之構造之圖。 [Figure 14] is a diagram that briefly shows the structure of the scanner unit.
以下,針對本發明之實施形態,使用圖面做詳細說明。而且,在不同之圖面中,賦予同一編號之元件,係表示同一或相應之元件。 The following is a detailed description of the implementation of the present invention using drawings. Moreover, in different drawings, components with the same number represent the same or corresponding components.
圖1係簡略表示本發明實施形態之檢查系統1之構造之圖。如圖1所示,檢查系統1係包括彼此可通訊地被連接之檢查裝置2與環境形成裝置3。環境形成裝置3係用於在製品之設計開發階段,將試作品當作對象以執行環境測試之環境測試裝置。但是,環境形成裝置3也可以係在製品之出貨前測試中,用於將實際製品當作對象,以執行篩選測試之篩選裝置。檢查裝置2係包括用於對於被環境形成裝置3所收容之檢查對象,執行邊界掃描測試之控制部之裝置。檢查對象係組裝有適用JTAG(Joint Test Action Group)之半導體裝置之電路基板。在邊界掃描測試中,主要係檢查被組裝於電路基板上之半導體裝置之軟焊接合不良,或複數半導體裝置間的接線之開路故障或短路故障等。
FIG1 is a diagram schematically showing the structure of an
圖2係簡略表示檢查裝置2(2A)之構造之方塊圖。如圖2之連接關係所示,檢查裝置2A係包括系統控制器11(主控制部)、腔體監視器12、測試控制器13(測試控制部)、記憶部14、顯示部15、及通訊部16。 FIG2 is a block diagram schematically showing the structure of the inspection device 2 (2A). As shown in the connection relationship of FIG2, the inspection device 2A includes a system controller 11 (main control unit), a cavity monitor 12, a test controller 13 (test control unit), a memory unit 14, a display unit 15, and a communication unit 16.
測試控制器13係用於藉來自系統控制器11之控制,控制對於做為檢查對象之電路基板100(詳述於後)所執行之邊界掃描測試之控制器。測試控制器13係在邊界掃描測試中,進行測試數據(測試模式)之生成、及測試時鐘之生成等之處理。測試控制器13係被連接於中繼單元17。
The
系統控制器11係包括CPU等處理器與ROM及RAM等記憶體,總結系統全體之動作以控制之。系統控制器11係在環境形成裝置3對於電路基板100,施加有既定之環境應力之狀態下,讓測試控制器13對於電路基板100,執行邊界掃描測試。
The system controller 11 includes a processor such as a CPU and a memory such as a ROM and a RAM, and summarizes the actions of the entire system to control it. The system controller 11 allows the
記憶部14係半導體記憶體或硬碟等之任意記憶裝置。顯示部15係液晶顯示器或有機EL顯示器等之任意顯示裝置。系統控制器11與腔體監視器
12,係例如藉RS-232C電線以被彼此連接。系統控制器11與測試控制器13,係例如藉USB電線以被彼此連接。通訊部16與環境形成裝置3的通訊部21(詳述於後),係例如藉RS-485電線以被彼此連接。
The memory unit 14 is any memory device such as a semiconductor memory or a hard disk. The display unit 15 is any display device such as a liquid crystal display or an organic EL display. The system controller 11 and the cavity monitor 12 are connected to each other, for example, by an RS-232C cable. The system controller 11 and the
圖3係簡略表示環境形成裝置3之構造之圖。在本實施形態之例中,環境形成裝置3係使用HALT(Highly Accelerated Limit Test)測試裝置、HASS(High Accelerated Stress Screen)測試裝置、或HASA(High Accelerated Stress Audit)測試裝置。HALT測試裝置的檢查對象,主要係試作品,HALT測試裝置係必須確認對於環境之試作品之弱點處所,直到檢查對象產生故障為止(直到被檢出不良處所為止),持續施加環境應力。HASS測試裝置及HASA測試裝置的檢查對象,主要係實際製品。HASS測試係將全部實際製品當作對象之全數檢查,HASA測試係將一部份實際製品當作對象之抽樣檢查。HALT測試裝置、HASS測試裝置、或HASA測試裝置,係使超過實際製品之使用情況之假設範圍(規格範圍)之振動應力及/或溫度應力,施加於檢查對象,藉此,可實現高加速測試。振動應力係藉直交3軸(水平面內之X軸及Y軸與鉛直方向之Z軸)之各軸之延伸方向及旋轉方向之振動,可施加6自由度之振動應力。但是,只要可施加在實際製品之使用情況會產生,或者,超過實際製品之使用情況之假設範圍之3自由度以上之振動應力即可。6自由度(3自由度以上)之振動應力,係與單軸或兩軸之振動不同,其係在實際製品之使用情況會產生,或者,超過實際製品之使用情況之假設範圍之複合性振動。藉6自由度(3自由度以上)之振動應力,可在更短之時間內,評估檢查對象之可靠性。振動加速度係可在例如5~75(Grms)之範圍內,任意設定。溫度應力係可施加廣溫度域(例如-100~+200℃)且急速變化(例如平均70℃/min)之溫度應力。
FIG3 is a diagram schematically showing the structure of the
如圖3所示,環境形成裝置3係包括被絕熱性之框體25所包圍之空調室23及腔體24。在空調室23係配置有空氣循環用之鼓風機26、加熱用之加熱
器27、及噴射冷卻用液態氮之噴嘴28。噴嘴28係透過配管29,被連接於被配置在環境形成裝置3的外部之液態氮之槽體31。在配管29係設有用於控制可否自槽體31,供給液態氮往噴嘴28之閥30。在空調室23內被生成之空調空氣,如箭頭A所示,係自空調室23,透過給氣口42以被供給到腔體24內,在循環於腔體24內之後,自腔體24透過排氣口41以被排出到空調室23。
As shown in FIG3 , the
在腔體24內係配置有平板狀之振動桌台32。振動桌台32係藉被固定於框體25的側面之支撐構件34,透過彈簧33以可擺動地被支撐。振動桌台32係被致動器35所驅動,藉此,實現上述6自由度之振動。致動器35係使用運動方向不同之複數個(例如5個)空壓缸等,以被構成。使壓縮空氣在短週期內,重複對於各空壓缸給氣及排氣,藉此,在各空壓缸中,實現振動運動。 A flat plate-shaped vibration table 32 is arranged in the cavity 24. The vibration table 32 is supported by a support member 34 fixed to the side of the frame 25 through a spring 33 so that it can swing. The vibration table 32 is driven by an actuator 35, thereby realizing the above-mentioned 6-degree-of-freedom vibration. The actuator 35 is constructed using a plurality of (for example, 5) air cylinders with different movement directions. The compressed air is repeatedly supplied and exhausted to each air cylinder in a short cycle, thereby realizing vibration movement in each air cylinder.
在腔體24內的振動桌台32的上表面,做為檢查對象之電路基板100,係被固定件38所固定。圖示雖然省略,但是,在電路基板100中,適用JTAG(Joint Test Action Group)之FPGA(Field Programmable Gate Array)等半導體裝置,係藉由BGA(Ball Grid Array)等連接方式所做之軟焊等,以被組裝於印刷電路板上。在電路基板100係連接有用於通訊邊界掃描測試之數據(測試數據及測試結果數據等)之電線40。電線40係透過被形成於框體25的側壁之電線孔39,被拉出到框體25的外部,以被連接到圖2所示之中繼單元17。被環境形成裝置3所收容之電路基板100,與檢查裝置2A的測試控制器13,係透過電線40及中繼單元17,以被相互連接。
On the upper surface of the vibration table 32 in the cavity 24, the
又,環境形成裝置3係包括環境控制器22、通訊部21、溫度偵知器37、及振動偵知器36。溫度偵知器37係被配置於腔體24內。振動偵知器36係使用加速度偵知器等以被構成,其被配置於振動桌台32。
Furthermore, the
環境控制器22係包括CPU等處理器與ROM及RAM等記憶體,以被構成。環境控制器22係藉各控制訊號,分別控制加熱器27、閥30及致動器35
之驅動。對於電路基板100之溫度應力之施加及振動應力之施加,係被環境控制器22所控制。
The environmental controller 22 is composed of a processor such as a CPU and a memory such as a ROM and a RAM. The environmental controller 22 controls the driving of the heater 27, the valve 30 and the actuator 35 respectively by various control signals. The application of temperature stress and vibration stress to the
在環境控制器22係輸入有被溫度偵知器37所檢出之表示腔體24內之溫度之溫度數據。環境控制器22係依據自溫度偵知器37所輸入之溫度數據,回饋控制加熱器27及閥30,可控制腔體24內之溫度到目標值。又,在環境控制器22係輸入有被振動偵知器36所檢出之表示振動桌台32之振動加速度之振動數據。環境控制器22係依據自振動偵知器36所輸入之振動數據,回饋控制致動器35,藉此,可控制振動桌台32之振動加速度到目標值。 The environment controller 22 is input with temperature data indicating the temperature in the cavity 24 detected by the temperature detector 37. The environment controller 22 controls the heater 27 and the valve 30 based on the temperature data input from the temperature detector 37, and can control the temperature in the cavity 24 to the target value. In addition, the environment controller 22 is input with vibration data indicating the vibration acceleration of the vibration table 32 detected by the vibration detector 36. The environment controller 22 controls the actuator 35 based on the vibration data input from the vibration detector 36, thereby controlling the vibration acceleration of the vibration table 32 to the target value.
又,這些溫度數據及振動數據,係自環境控制器22透過通訊部21,16,以被輸入到腔體監視器12(參照圖2)。藉此,可藉檢查裝置2A的腔體監視器12,監視環境形成裝置3的腔體24之狀態(溫度及振動)。
Furthermore, these temperature data and vibration data are input from the environment controller 22 to the cavity monitor 12 (see FIG. 2 ) through the communication unit 21, 16. Thus, the state (temperature and vibration) of the cavity 24 of the
圖4係表示對於電路基板100之振動應力之施加模式第1例之圖。曲線圖的橫軸係表示經過時間,縱軸係表示振動加速度之大小。在第1例中,環境控制器22係在自測試開始,至測試結束為止之全期間中,使振動桌台32之振動加速度保持為一定值。藉此,在自測試開始至測試結束為止之全期間中,一定之振動應力係被施加在電路基板100。
FIG4 is a graph showing the first example of the vibration stress application mode for the
圖5係表示對於電路基板100之振動應力之施加模式第2例之圖。在第2例中,環境控制器22係使振動振動桌台32之期間(設定振動加速度為既定值,藉此,振動成為「ON」之期間),與不振動振動桌台32之期間(設定振動加速度為零,藉此,振動成為「OFF」之)交錯重複。藉此,施加振動應力於電路基板100之期間(ON期間)與未施加之期間(OFF期間)係交錯重複。而且,ON期間之長度與OFF期間之長度,可為同一,也可為不同。又,在ON期間中,振動加速度係可為一定值,也可為變動值。
FIG5 is a diagram showing the second example of the vibration stress application mode for the
圖6表示對於電路基板100之振動應力之施加模式第3例之圖。在
第3例中,環境控制器22係使讓振動桌台32振動較大之期間(設定振動加速度為比某基準值還要大之值,藉此,振動成為「大」之期間),與讓振動桌台32振動較小之期間(設定振動加速度為比該基準值還要小之值,藉此,振動成為「小」之期間),交錯重複。藉此,施加較大振動應力於電路基板100之期間(大期間),與施加較小振動應力之期間(小期間),係交錯重複。而且,大期間之長度與小期間之長度,係可以為同一,也可以不同。又,在大期間及小期間之中,振動加速度係可以為一定值,也可以為變動值。
FIG6 is a diagram showing the third example of the vibration stress application pattern for the
圖7係表示對於電路基板100之振動應力之施加模式第4例之圖。在第4例中,環境控制器22係隨著時間經過,階梯狀地變更振動加速度為逐漸大之值。藉此,隨著時間經過,階梯狀地逐漸增大之振動應力,係被施加在電路基板100。而且,也可以與圖7所示之例相反地,隨著時間經過,使階梯狀地逐漸降低之振動應力,施加在電路基板100。又,階梯狀地變更之振動加速度之增大幅度或降低幅度,係可為一定值,也可以為變動值。而且,也可以組合使振動應力為階梯狀地增大之模式與階梯狀地降低之模式。
FIG. 7 is a diagram showing the fourth example of the vibration stress application mode for the
圖8係表示對於電路基板100之振動應力之施加模式第5例之圖。在第5例中,環境控制器22係隨著時間經過,直線狀變更振動加速度為逐漸大之值。藉此,隨著時間經過,直線狀地逐漸增大之振動應力,係被施加在電路基板100。而且,也可以與圖8所示之例相反地,隨著時間經過,使直線狀地逐漸降低之振動應力,施加在電路基板100。又,也可以組合使振動應力為直線狀地增大之模式與直線狀地降低之模式。
FIG8 is a diagram showing the fifth example of the vibration stress application mode for the
環境控制器22係可以對於電路基板100,執行圖4~8所示之振動應力之施加模式全部,或者,僅執行一個。又,環境控制器22係也可以對於電路基板100,任意組合圖4~8所示之振動應力之施加模式以執行之。例如也可以執行
The environmental controller 22 can execute all the vibration stress application modes shown in Figures 4 to 8 for the
.在第1例(圖4)之後,執行第2例(圖5)。 . After the first example (Figure 4), execute the second example (Figure 5).
.混合第2例(圖5)之ON期間及OFF期間,與第3例(圖6)之大期間及小期間。 . Mix the ON period and OFF period of the second example (Figure 5) with the large period and small period of the third example (Figure 6).
.在第4例(圖7)或第5例(圖8)之中途,插入第2例(圖5)之OFF期間或第3例(圖6)之小期間。 .In the middle of the 4th example (Figure 7) or the 5th example (Figure 8), insert the OFF period of the 2nd example (Figure 5) or the short period of the 3rd example (Figure 6).
等之組合。又,環境控制器22係也可以對於電路基板100,在振動應力之外,再施加溫度應力。表示是否必須執行何種施加模式之資訊,係對應於電路基板100之種別等,事先被設定於環境控制器22。
In addition, the environmental controller 22 can also apply temperature stress to the
在圖2所示之本實施形態之檢查裝置2A中,系統控制器11係在環境形成裝置3對於電路基板100,施加有上述振動應力(及溫度應力)之狀態下,讓測試控制器13對於電路基板100,執行邊界掃描測試。而且,在以下之說明中,雖然針對系統控制器11決定邊界掃描測試之執行時機之例做過說明,但是,本發明並不侷限於此例。也可以使與系統控制器11同樣之功能,組裝於測試控制器13,藉此,測試控制器13係決定邊界掃描測試之執行時機。在此情形下,測試控制器13係包括發揮做為控制邊界掃描測試之測試控制部之功能,與發揮做為讓測試控制部執行邊界掃描測試,而且,決定邊界掃描測試之執行時機之主控制部之功能。又,在以下之說明中,雖然說明過檢查裝置2A個別包括系統控制器11與測試控制器13之例,但是,本發明並不侷限於此例。檢查裝置2A係也可以包括具有系統控制器11及測試控制器13之各功能之一個控制器。在此情形下,該一個控制器係包括發揮做為上述測試控制部之功能、及發揮做為上述主控制部之功能。
In the inspection device 2A of the present embodiment shown in FIG. 2 , the system controller 11 causes the
圖9係表示對於電路基板100之邊界掃描測試之執行時機第1例之圖。曲線圖的橫軸係表示經過時間,縱軸係表示振動加速度之大小。又,箭頭P係表示執行邊界掃描測試之時機。振動應力之施加模式,係採用圖5所示之例。
測試控制器13係對於電路基板100,執行複數次邊界掃描測試。在圖9所示之第1例中,邊界掃描測試之執行間隔,係不管振動應力為ON期間或OFF期間,其係間隔W0,其為一定(稱做「一定模式」)。
FIG9 is a graph showing the first example of the execution timing of the boundary scan test for the
圖10係表示對於電路基板100之邊界掃描測試之執行時機第2例之圖。振動應力之施加模式,係採用圖5所示之例。測試控制器13係對於電路基板100,執行複數次邊界掃描測試。在圖10所示之第2例中,系統控制器11係對應振動應力之施加條件,使邊界掃描測試之執行間隔為不同。具體說來,系統控制器11係在振動應力之大小,為第1既定值未滿之OFF期間(例如時刻T0~T1)中,設定邊界掃描測試之執行間隔,為比較寬的間隔W11。又,系統控制器11係在振動應力之大小,為第1既定值以上之ON期間(例如時刻T3~T4)中,設定邊界掃描測試之執行間隔,為比間隔W11還要窄之間隔W12(稱做「對應振動應力之大小之變動模式」)。
FIG10 is a diagram showing a second example of the execution timing of the boundary scan test on the
當依據此例時,當振動應力之大小係第1既定值以上之時,較容易產生不良,因此,系統控制器11係設定邊界掃描測試之執行間隔為較短,藉此,可早期發現不良之產生。另外,當振動應力之大小,係第1既定值未滿之時,較難產生不良,所以,系統控制器11係設定邊界掃描測試之執行間隔為較長,藉此,可避免測試結果之數據量增大。 According to this example, when the magnitude of the vibration stress is greater than the first predetermined value, it is easier to produce defects. Therefore, the system controller 11 sets the execution interval of the boundary scan test to be shorter, thereby detecting the occurrence of defects at an early stage. In addition, when the magnitude of the vibration stress is less than the first predetermined value, it is more difficult to produce defects. Therefore, the system controller 11 sets the execution interval of the boundary scan test to be longer, thereby avoiding an increase in the amount of data in the test results.
其他例有系統控制器11係也可以對應振動應力之施加時間,使邊界掃描測試之執行間隔為不同。具體說來,系統控制器11係量測測試開始後之對於電路基板100之振動應力之施加時間,當振動應力之施加時間係第2既定值未滿時,設定邊界掃描測試之執行間隔,為比較寬的間隔W11。又,系統控制器11係當振動應力之施加時間,為第2既定值以上時,設定邊界掃描測試之執行間隔,為比間隔W11還要窄之間隔W12(稱做「對應於振動應力之施加時間之變動模式」)。
Another example is that the system controller 11 can also make the execution interval of the boundary scan test different according to the application time of the vibration stress. Specifically, the system controller 11 measures the application time of the vibration stress to the
當依據此例時,當振動應力之施加時間,係第2既定值以上時,較容易產生不良,所以,系統控制器11係設定邊界掃描測試之執行間隔為較短,藉此,可早期發現不良之產生。另外,當振動應力之施加時間,係第2既定值未滿時,較難產生不良,系統控制器11設定邊界掃描測試之執行間隔為較長,藉此,可避免測試結果之數據量增大。 According to this example, when the application time of the vibration stress is greater than the second predetermined value, it is easier to produce defects, so the system controller 11 sets the execution interval of the boundary scan test to be shorter, thereby detecting the occurrence of defects at an early stage. In addition, when the application time of the vibration stress is less than the second predetermined value, it is more difficult to produce defects, and the system controller 11 sets the execution interval of the boundary scan test to be longer, thereby avoiding an increase in the amount of data in the test results.
而且,與上述相反地,在較容易產生不良之情況中,設定邊界掃描測試之執行間隔為較長,在較難產生不良之情況中,設定邊界掃描測試之執行間隔為較短,藉此,可確實檢出在電路基板100產生有不良,成為可早期發現不良之產生。
Furthermore, contrary to the above, in the case where defects are more likely to occur, the execution interval of the boundary scan test is set to be longer, and in the case where defects are less likely to occur, the execution interval of the boundary scan test is set to be shorter. This can reliably detect defects in the
圖11係表示對於電路基板100之邊界掃描測試之執行時機第3例之圖。振動應力之施加模式,係採用圖7所示之例。系統控制器11係對應振動應力之施加條件,使邊界掃描測試之執行間隔為不同。具體說來,系統控制器11係在未施加有振動應力之OFF期間(時刻T0~T1)中,設定邊界掃描測試之執行間隔為比較寬的間隔W21。又,系統控制器11係在振動應力之大小,上昇一階後之下一期間(時刻T1~T2)中,設定邊界掃描測試之執行間隔,為比間隔W21還要窄之間隔W22。又,系統控制器11係在振動應力之大小,更加上昇一階之下一期間(時刻T2~T3)中,設定邊界掃描測試之執行間隔為比間隔W22還要窄之間隔W23。如此一來,系統控制器11係在每次振動應力之大小上昇一階時,設定邊界掃描測試之執行間隔為逐漸變窄。
FIG. 11 is a diagram showing the third example of the execution timing of the boundary scan test for the
當依據此例時,振動應力愈大,則愈容易產生不良,所以,系統控制器11係設定邊界掃描測試之執行間隔為較短,藉此,可早期發現不良之產生。另外,振動應力愈小,則愈難產生不良,所以,系統控制器11係設定邊界掃描測試之執行間隔為較長,藉此,可避免測試結果之數據量增大。 According to this example, the greater the vibration stress, the easier it is to produce defects, so the system controller 11 sets the execution interval of the boundary scan test to be shorter, thereby detecting the occurrence of defects at an early stage. In addition, the smaller the vibration stress, the harder it is to produce defects, so the system controller 11 sets the execution interval of the boundary scan test to be longer, thereby avoiding an increase in the amount of data in the test results.
而且,也可以與上述相反地,在容易產生不良之情況中,設定邊
界掃描測試之執行間隔為較長,在較難產生不良之情況中,設定邊界掃描測試之執行間隔為較短。在此情形下,可確實檢出在電路基板100產生有不良,成為可早期發現不良之發生。
Furthermore, contrary to the above, in the case where defects are easy to occur, the execution interval of the boundary scan test can be set to be longer, and in the case where defects are difficult to occur, the execution interval of the boundary scan test can be set to be shorter. In this case, it is possible to detect defects in the
圖12係表示對於電路基板100之邊界掃描測試之執行時機第4例之圖。振動應力之施加模式,係採用圖7所示之例。又,在振動應力之外,再施加有溫度應力。與溫度循環之一週期(例如時刻T3~T5)連動,而振動應力之大小係上昇一階。系統控制器11係對應溫度應力之施加條件,使邊界掃描測試之執行間隔為不同。具體說來,系統控制器11係在溫度應力之大小未過渡之期間,亦即,概略一定(包含完全一定之情形、及以既定值未滿之變動幅度而微變動之情形)之期間(維持溫度期間)內,設定邊界掃描測試之執行間隔為比較寬的間隔W31。又,系統控制器11係在溫度應力之大小過渡之期間(溫度過渡期間)內,設定邊界掃描測試之執行間隔,為比間隔W31還要窄之間隔W32(稱做「對應於溫度應力之施加條件之變動模式」)。
FIG. 12 is a diagram showing the fourth example of the execution timing of the boundary scan test for the
當依據此例時,在溫度應力之大小過渡之期間內,係較容易產生不良,所以,系統控制器11係設定邊界掃描測試之執行間隔為較短,藉此,可早期發現不良之產生。另外,在溫度應力之大小為一定之期間內,係較難產生不良,所以,系統控制器11係設定邊界掃描測試之執行間隔為較長,藉此,可避免測試結果之數據量增大。 According to this example, it is easier to produce defects during the transition period of the temperature stress, so the system controller 11 sets the execution interval of the boundary scan test to be shorter, thereby detecting the occurrence of defects at an early stage. In addition, it is more difficult to produce defects during the period when the temperature stress is constant, so the system controller 11 sets the execution interval of the boundary scan test to be longer, thereby avoiding the increase of the data volume of the test results.
而且,也可以與上述相反地,設定維持溫度期間內之邊界掃描測試之執行間隔,比溫度過渡期間內之邊界掃描測試之執行間隔還要短。此情形係即使在較難產生不良之維持溫度期間,也可以確實檢出在電路基板100產生有不良,成為可早期發現不良之發生。
Furthermore, contrary to the above, the execution interval of the boundary scan test during the temperature maintenance period can be set shorter than the execution interval of the boundary scan test during the temperature transition period. In this case, even during the temperature maintenance period where defects are less likely to occur, defects in the
又,也可以系統控制器11係在振動應力之大小為一定之期間內,設定邊界掃描測試之執行間隔為比較寬的間隔W31,在振動應力之大小過渡之
期間內,設定邊界掃描測試之執行間隔,為比間隔W31還要窄之間隔W32。在此情形下,於振動應力之大小過渡之期間內,係較容易產生不良,所以,系統控制器11係設定邊界掃描測試之執行間隔為較短,藉此,可早期檢出在電路基板100產生有不良。
Alternatively, the system controller 11 may set the execution interval of the boundary scan test to a relatively wide interval W31 during a period when the magnitude of the vibration stress is constant, and set the execution interval of the boundary scan test to an interval W32 that is narrower than the interval W31 during a period when the magnitude of the vibration stress is transitioning. In this case, it is easier to produce a defect during a period when the magnitude of the vibration stress is transitioning, so the system controller 11 sets the execution interval of the boundary scan test to a shorter interval, thereby enabling early detection of a defect in the
其他例有系統控制器11也可以對應由邊界掃描測試所做之不良處所之檢出情況,使邊界掃描測試之執行間隔為不同。具體說來,系統控制器11係依據接收自環境形成裝置3之測試結果數據,計數由邊界掃描測試所檢出之不良處所數量。系統控制器11係當不良處所數量之計數值(自測試開始之累積值)為第3既定值未滿時,設定邊界掃描測試之執行間隔為比較寬的間隔W31。又,系統控制器11係當不良處所數量之計數值為第3既定值以上時,設定邊界掃描測試之執行間隔,為比間隔W31還要窄之間隔W32(稱做「對應於不良處所之檢出情況之變動模式」)。
For another example, the system controller 11 can also make the execution interval of the boundary scan test different in response to the detection of the defective location by the boundary scan test. Specifically, the system controller 11 counts the number of defective locations detected by the boundary scan test based on the test result data received from the
當依據此例時,當由邊界掃描測試所檢出之不良處所數量,係第3既定值以上時,其係較容易產生其他不良之情況,所以,系統控制器11係設定邊界掃描測試之執行間隔為較短,藉此,可早期發現其他不良之產生。另外,當由邊界掃描測試所檢出之不良處所數量,係第3既定值未滿時,其係較難產生不良之情況,所以,系統控制器11係設定邊界掃描測試之執行間隔為較長,藉此,可避免測試結果之數據量增大。 According to this example, when the number of defective locations detected by the boundary scan test is greater than the third predetermined value, it is easier to generate other defects, so the system controller 11 sets the execution interval of the boundary scan test to be shorter, thereby detecting other defects at an early stage. In addition, when the number of defective locations detected by the boundary scan test is less than the third predetermined value, it is harder to generate defects, so the system controller 11 sets the execution interval of the boundary scan test to be longer, thereby avoiding an increase in the amount of data in the test results.
而且,也可以與上述相反地,設定被檢出之不良處所數量係第3既定值未滿之時之邊界掃描測試之執行間隔,比被檢出之不良處所數量係第3既定值以上時之邊界掃描測試之執行間隔還要短。此情形係即使在較難產生不良之情況下,也可確實檢出在電路基板100產生有不良,成為可早期發現不良之發生。
Furthermore, contrary to the above, the execution interval of the boundary scan test when the number of detected defective locations is less than the third predetermined value can be set shorter than the execution interval of the boundary scan test when the number of detected defective locations is greater than the third predetermined value. In this case, even in a situation where it is difficult for a defect to occur, it is possible to reliably detect that a defect has occurred in the
而且,當振動應力之施加模式,係採用圖4所示之例時,系統控 制器11係邊界掃描測試之執行間隔,可採用一定模式、對應振動應力之施加時間之變動模式、對應不良處所之檢出情況之變動模式、及對應溫度應力之施加條件之變動模式之任一者。 Furthermore, when the vibration stress application mode adopts the example shown in FIG. 4, the system controller 11 can adopt any one of a fixed mode, a variable mode corresponding to the vibration stress application time, a variable mode corresponding to the detection condition of the defective location, and a variable mode corresponding to the application condition of the temperature stress for the execution interval of the boundary scan test.
又,當振動應力之施加模式,係採用圖5~8所示之例時,系統控制器11係邊界掃描測試之執行間隔,可採用一定模式、對應振動應力之大小之變動模式、對應振動應力之施加時間之變動模式、對應不良處所之檢出情況之變動模式、及對應溫度應力之施加條件之變動模式之任一者。 Furthermore, when the vibration stress application mode adopts the example shown in Figures 5 to 8, the system controller 11 can adopt any one of the following modes for the execution interval of the boundary scan test: a fixed mode, a variable mode corresponding to the magnitude of the vibration stress, a variable mode corresponding to the application time of the vibration stress, a variable mode corresponding to the detection of the defective location, and a variable mode corresponding to the application condition of the temperature stress.
系統控制器11係當由邊界掃描測試所做之既定單位期間內之不良檢出次數(或不良檢出比例),超過既定之門檻值時,判定電路基板100產生故障。即使在電路基板100產生有龜裂等軟焊接合不良時,當其不良之程度較小時,在檢出時機中,有時龜裂係偶然接觸不良而未被檢出。當藉施加振動應力而不良之程度進行後,即使例如檢出時機重疊於OFF期間,也很可能未接觸龜裂地,而當作不良被檢出。因此,依據既定單位期間內之不良檢出次數(或不良檢出比例),進行故障判定,藉此,可檢出不良之程度係已進行。
The system controller 11 determines that the
<結論> <Conclusion>
當依據本實施形態之檢查裝置2時,做為檢查對象之電路基板100係被環境形成裝置3所收容,系統控制器11(主控制部)係在環境形成裝置3對於電路基板100,施加有3自由度以上之振動應力之狀態下,讓測試控制器13(測試控制部)對於電路基板100,執行邊界掃描測試。如此一來,在施加超過實際製品之使用情況之假設範圍之3自由度以上之振動應力於電路基板100之狀態下,對於該電路基板100執行邊界掃描測試,藉此,促進電路基板100中之不良產生的同時,可高精度地評估所產生之不良處所。結果,可謀求縮短測試之需要時間的同時,成為可提高實際製品之可靠性。
When the
又,環境形成裝置3係使用HALT測試裝置、HASS測試裝置、或
HASA測試裝置,藉此,可施加6自由度之振動應力、及廣溫度域且急速變化之溫度應力於電路基板100。結果,成為可有效地促進電路基板100中之不良產生。
Furthermore, the
<變形例> <Variation example>
圖13係簡略表示變形例之檢查裝置2(2B)之構造之方塊圖。對於圖2所示之構造,追加有掃描器單元18。在本變形例中,於環境形成裝置3係收容有同種之複數電路基板100(100_1~100_N)。複數電路基板100_1~100_N,係被並列連接於中繼單元17。各電路基板100與中繼單元17,係藉用於連接例如TDI(測試數據輸入)、TCK(測試時鐘)、TMS(測試模式選擇)、TRST(測試重置)、及TDO(測試數據輸出)的各端口間之五條為一組之接線,而被彼此連接。圖13中之「(N)」之標記,係意味總結電路基板100_1~100_N與中繼單元17之間之N組之並列接線。掃描器單元18係切換測試控制器13與複數電路基板100_1~100_N之連接,使得複數電路基板100_1~100_N中之一電路基板100,係被連接於測試控制器13。
FIG. 13 is a block diagram schematically showing the structure of the inspection device 2 (2B) of the modification. A
系統控制器11係在環境形成裝置3,對於複數電路基板100_1~100_N施加有環境應力之狀態下,讓掃描器單元18重複執行,依序連接一電路基板100於測試控制器13之連接處理。又,系統控制器11係與該連接處理連動,讓測試控制器13對於一電路基板100,執行邊界掃描測試,藉此,對於複數電路基板100_1~100_N之每一個,執行複數次邊界掃描測試。在此,所謂「連動」,係意味由掃描器單元18所做之連接之切換、及由測試控制器13所做之邊界掃描測試之執行,係彼此同步。
The system controller 11 allows the
圖14係簡略表示掃描器單元18之構造之圖。掃描器單元18係具有做為檢查對象之複數電路基板100_1~100_N,與相同數量(或其以上)之複數渠道C(C1~CN)。各渠道C係包含常開接點方式之開關S(S1~SN)。各開關S的一邊之端子係被連接於測試控制器13,另一邊之端子係透過中繼單元17,以
被連接於電路基板100_1~100_N。
FIG. 14 is a diagram schematically showing the structure of the
藉系統控制器11之切換控制,開關S1~SN中之一開關S係被關閉,藉此,被連接於該開關S之一電路基板100,係被連接於測試控制器13。亦即,開關S1~SN之切換控制與渠道C1~CN之選擇控制係等價,藉關閉一開關S,對應之一渠道C係被選擇。在圖14中,係開關S1被關閉,渠道C1被選擇,藉此,其係表示電路基板100_1被連接於測試控制器13之情況。而且,也可以取代五個端口之全部,可被開關S1所切換,而採用僅五個端口中之期望之端口,係可被開關S1所切換之構造。也可以採用例如僅TDI(測試數據輸入)及TDO(測試數據輸出)之兩個端口,可被開關S1所切換之構造。
By the switching control of the system controller 11, one switch S among the switches S1 to SN is closed, thereby, a
在本變形例中,測試控制器13係對於複數電路基板100_1~100_N之每一個,執行複數次邊界掃描測試。系統控制器11係對應由對於一電路基板100之邊界掃描測試所做之不良處所之檢出情況,使對於剩下之電路基板100之邊界掃描測試之執行間隔為不同。具體說來,系統控制器11係當由對於各電路基板100之邊界掃描測試所檢出之不良處所數量,係第4既定值未滿時,設定對於全部電路基板100之邊界掃描測試之執行間隔,為比較寬的第1間隔。又,系統控制器11係當由對於至少一個電路基板100之邊界掃描測試所檢出之不良處所數量,係第4既定值以上時,設定對於全部電路基板100之邊界掃描測試之執行間隔,為比第1間隔還要窄之第2間隔。
In this variation, the
當依據本變形例時,掃描器單元18(連接切換部)係重複執行依序連接一電路基板100於測試控制器13之連接處理,測試控制器13係與該連接處理連動,執行對於一電路基板100之邊界掃描測試。藉此,使用一測試控制器13,以連續性地執行對於複數電路基板100_1~100_N之每一個之邊界掃描測試,所以,可有效率地執行對於複數電路基板100_1~100_N之邊界掃描測試。結果,成為可削減測試成本。
According to this variation, the scanner unit 18 (connection switching unit) repeatedly performs connection processing for sequentially connecting a
又,當依據本變形例時,當由對於至少一個電路基板之邊界掃描測試所檢出之不良處所數量,係第4既定值以上時,在其他之電路基板100中,也係較容易產生不良之情況,所以,系統控制器11係設定關於全部電路基板100之邊界掃描測試之執行間隔為較短,藉此,可早期發現不良之產生。另外,當由對於各電路基板100之邊界掃描測試所檢出之不良處所數量,係第4既定值末滿時,在全部之電路基板100中,也係較難產生不良之情況,所以,系統控制器11係設定關於全部電路基板100之邊界掃描測試之執行間隔為較長,藉此,可避免測試結果之數據量增大。
Furthermore, when according to the present variation, when the number of defective locations detected by the boundary scanning test on at least one circuit substrate is greater than the fourth predetermined value, defects are more likely to occur in
而且,在本變形例中,係將在一個電路基板100,組裝有一個半導體裝置之電路構造當作前提,但是,本發明並不侷限於此例。也可以係一個電路基板100,組裝有複數半導體裝置。此情形係相對於一個半導體裝置而言,分配有一個渠道C,藉此,渠道C之選擇與半導體裝置之切換係成為等價。
Moreover, in this variant, a circuit structure in which a semiconductor device is assembled on a
本發明一態樣之檢查裝置,係一種檢查裝置,可通訊地被連接於可收容做為檢查對象之至少一個電路基板之環境形成裝置,其特徵在於其包括:測試控制部,控制對於該電路基板之邊界掃描測試;以及主控制部;該主控制部係在該環境形成裝置對於該電路基板,施加有3自由度以上之振動應力之狀態下,讓該測試控制部對於該電路基板,執行該邊界掃描測試。 An inspection device according to one aspect of the present invention is an inspection device that can be communicatively connected to an environment forming device that can accommodate at least one circuit substrate as an inspection object, and is characterized in that it includes: a test control unit that controls a boundary scanning test on the circuit substrate; and a main control unit; the main control unit allows the test control unit to perform the boundary scanning test on the circuit substrate when the environment forming device applies a vibration stress of more than 3 degrees of freedom to the circuit substrate.
當依據此態樣時,做為檢查對象之電路基板係被環境形成裝置所收容,主控制部係在環境形成裝置對於電路基板,施加有3自由度以上之振動應力之狀態下,讓測試控制部對於電路基板,執行邊界掃描測試。如此一來,於使在實際製品之使用情況會發生,或者,超過實際製品之使用情況之假設範圍之3自由度以上之振動應力,施加於電路基板之狀態下,對於該電路基板,執行邊界掃描測試,藉此,可促進電路基板中之不良之發生的同時,可高精度地評估產生之不良處所。結果,可謀求縮短測試之需要時間的同時,成為可提高實 際製品之可靠性。 According to this aspect, the circuit substrate to be inspected is accommodated by the environment forming device, and the main control unit allows the test control unit to perform a boundary scan test on the circuit substrate when the environment forming device applies a vibration stress of more than 3 degrees of freedom to the circuit substrate. In this way, the boundary scan test is performed on the circuit substrate when a vibration stress of more than 3 degrees of freedom that may occur in the use of the actual product or that exceeds the assumed range of the use of the actual product is applied to the circuit substrate. This can promote the occurrence of defects in the circuit substrate and can evaluate the location of the defect with high accuracy. As a result, the time required for the test can be shortened while improving the reliability of the actual product.
在上述態樣中,該測試控制部係對於該電路基板,執行複數次該邊界掃描測試,該主控制部係對應該振動應力之施加條件,使該邊界掃描測試之執行間隔為不同。 In the above embodiment, the test control unit performs the boundary scan test multiple times on the circuit substrate, and the main control unit makes the execution interval of the boundary scan test different according to the application condition of the vibration stress.
當依據此態樣時,主控制部係對應振動應力之施加條件,使邊界掃描測試之執行間隔為不同。因此,振動應力之施加條件,係當為較容易產生不良之條件時,主控制部係設定執行間隔為較短,藉此,可早期發現不良之產生。另外,振動應力之施加條件,係當為不良較難產生之條件時,主控制部係設定執行間隔為較長,藉此,可避免測試結果之數據量增大。 According to this state, the main control unit makes the execution interval of the boundary scanning test different according to the conditions for applying vibration stress. Therefore, when the conditions for applying vibration stress are conditions that are more likely to cause defects, the main control unit sets the execution interval to be shorter, thereby detecting the occurrence of defects at an early stage. In addition, when the conditions for applying vibration stress are conditions that are more difficult to cause defects, the main control unit sets the execution interval to be longer, thereby avoiding an increase in the amount of data in the test results.
在上述態樣中,該主控制部係當該振動應力之大小,為第1既定值以上時,其與該振動應力之大小係該第1既定值未滿之情形相比較下,使該邊界掃描測試之執行間隔較窄。 In the above embodiment, when the magnitude of the vibration stress is greater than the first predetermined value, the main control unit makes the execution interval of the boundary scanning test narrower compared with the case where the magnitude of the vibration stress is less than the first predetermined value.
當依據此態樣時,當振動應力之大小係第1既定值以上時,係較容易產生不良,所以,主控制部係設定執行間隔為較短,藉此,可早期發現不良之產生。另外,當振動應力之大小係第1既定值未滿時,係較難產生不良,所以,主控制部係設定執行間隔為較長,藉此,可避免測試結果之數據量增大。 According to this state, when the magnitude of the vibration stress is above the first predetermined value, it is easier to produce a defect, so the main control unit sets the execution interval to be shorter, thereby detecting the occurrence of a defect at an early stage. In addition, when the magnitude of the vibration stress is less than the first predetermined value, it is harder to produce a defect, so the main control unit sets the execution interval to be longer, thereby avoiding an increase in the amount of data in the test results.
在上述態樣中,該主控制部係當該振動應力之施加時間,為第2既定值以上時,其與該振動應力之施加時間係該第2既定值未滿之情形相比較下,使該邊界掃描測試之執行間隔較窄。 In the above embodiment, when the application time of the vibration stress is greater than the second predetermined value, the main control unit makes the execution interval of the boundary scanning test narrower compared with the case where the application time of the vibration stress is less than the second predetermined value.
當依據此態樣時,當振動應力之施加時間係第2既定值以上時,係較容易產生不良,所以,主控制部係設定執行間隔為較短,藉此,可早期發現不良之產生。另外,當振動應力之施加時間係第2既定值未滿時,係較難產生不良,所以,主控制部係設定執行間隔為較長,藉此,可避免測試結果之數據量增大。 According to this state, when the vibration stress application time is greater than the second predetermined value, it is easier to produce defects, so the main control unit sets the execution interval to be shorter, thereby detecting the occurrence of defects at an early stage. In addition, when the vibration stress application time is less than the second predetermined value, it is more difficult to produce defects, so the main control unit sets the execution interval to be longer, thereby avoiding the increase of the data volume of the test results.
在上述態樣中,該測試控制部係對於該電路基板,執行複數次該邊界掃描測試,該主控制部係對應由該邊界掃描測試所做之不良處所之檢出情況,使該邊界掃描測試之執行間隔為不同。 In the above embodiment, the test control unit performs the boundary scan test multiple times on the circuit substrate, and the main control unit makes the execution interval of the boundary scan test different according to the detection of the defective location made by the boundary scan test.
當依據此態樣時,主控制部係對應由邊界掃描測試所做之不良處所之檢出情況,使邊界掃描測試之執行間隔為不同。因此,當一定數量以上之不良處所被檢出,其係其他不良較容易產生之情況時,主控制部係設定執行間隔為較短,藉此,可早期發現其他不良之產生。另外,當一定數量以上之不良處所未被檢出,其係不良較難產生之情況時,主控制部係設定執行間隔為較長,藉此,可避免測試結果之數據量增大。 According to this situation, the main control unit makes the execution interval of the boundary scan test different according to the detection of the defective locations made by the boundary scan test. Therefore, when more than a certain number of defective locations are detected, which is a situation where other defects are more likely to occur, the main control unit sets the execution interval to be shorter, thereby detecting the occurrence of other defects at an early stage. In addition, when more than a certain number of defective locations are not detected, which is a situation where defects are more difficult to occur, the main control unit sets the execution interval to be longer, thereby avoiding an increase in the amount of data in the test results.
在上述態樣中,該主控制部係當由該邊界掃描測試所檢出之不良處所數量,為第3既定值以上時,其與由該邊界掃描測試所檢出之不良處所數量,為該第3既定值未滿之情形相比較下,使該邊界掃描測試之執行間隔較窄。 In the above aspect, when the number of defective locations detected by the boundary scan test is greater than the third predetermined value, the main control unit makes the execution interval of the boundary scan test narrower than the case where the number of defective locations detected by the boundary scan test is less than the third predetermined value.
當依據此態樣時,當由邊界掃描測試所檢出之不良處所數量,係第3既定值以上時,其係其他不良較容易產生之情況,所以,主控制部係設定執行間隔為較短,藉此,可早期發現其他不良之產生。另外,當由邊界掃描測試所檢出之不良處所數量,係第3既定值未滿時,其係較難產生不良之情況,所以,主控制部係設定執行間隔為較長,藉此,可避免測試結果之數據量增大。 According to this situation, when the number of defective locations detected by the boundary scanning test is greater than the third predetermined value, it is a situation where other defects are more likely to occur, so the main control unit sets the execution interval to be shorter, thereby detecting the occurrence of other defects at an early stage. In addition, when the number of defective locations detected by the boundary scanning test is less than the third predetermined value, it is a situation where it is more difficult to produce defects, so the main control unit sets the execution interval to be longer, thereby avoiding an increase in the amount of data in the test results.
在上述態樣中,該至少一個之電路基板,係包含第1電路基板及第2電路基板,該測試控制部係對於該第1電路基板及該第2電路基板之每一個,執行複數次該邊界掃描測試,該主控制部係對應由對於該第1電路基板之該邊界掃描測試所做之不良處所之檢出情況,使對於該第2電路基板之該邊界掃描測試之執行間隔為不同。 In the above aspect, the at least one circuit substrate includes a first circuit substrate and a second circuit substrate, the test control unit performs the boundary scanning test multiple times for each of the first circuit substrate and the second circuit substrate, and the main control unit makes the execution interval of the boundary scanning test for the second circuit substrate different in response to the detection of the defective location by the boundary scanning test for the first circuit substrate.
當依據此態樣時,主控制部係對應由對於第1電路基板之邊界掃描測試所做之不良處所之檢出情況,使對於第2電路基板之邊界掃描測試之執行 間隔為不同。因此,當在第1電路基板中,一定數量以上之不良處所係被檢出,在第2電路基板中,也係較容易產生不良之情況時,主控制部係設定關於第2電路基板之執行間隔為較短,藉此,可早期發現不良之產生。另外,當在第1電路基板中,一定數量以上之不良處所係未被檢出,在第2電路基板中,也係較難產生不良之情況時,主控制部係設定關於第2電路基板之執行間隔為較長,藉此,可避免測試結果之數據量增大。 According to this state, the main control unit makes the execution interval of the boundary scanning test for the second circuit substrate different in accordance with the detection of the defective parts by the boundary scanning test for the first circuit substrate. Therefore, when a certain number of defective parts are detected in the first circuit substrate and the defective parts are more likely to occur in the second circuit substrate, the main control unit sets the execution interval for the second circuit substrate to be shorter, thereby detecting the occurrence of the defective parts at an early stage. In addition, when more than a certain number of defective locations in the first circuit substrate are not detected and it is also difficult for defects to occur in the second circuit substrate, the main control unit sets the execution interval for the second circuit substrate to be longer, thereby avoiding an increase in the amount of data in the test results.
在上述態樣中,該主控制部係當由對於該第1電路基板之該邊界掃描測試所檢出之不良處所數量,為第4既定值以上時,其與由對於該第1電路基板之該邊界掃描測試所檢出之不良處所數量,為該第4既定值未滿之情形相比較下,使對於該第2電路基板之該邊界掃描測試之執行間隔為較窄。 In the above aspect, when the number of defective locations detected by the boundary scanning test on the first circuit substrate is greater than the fourth predetermined value, the main control unit makes the execution interval of the boundary scanning test on the second circuit substrate narrower than the case where the number of defective locations detected by the boundary scanning test on the first circuit substrate is less than the fourth predetermined value.
當依據此態樣時,當由對於第1電路基板之邊界掃描測試所檢出之不良處所數量,為第4既定值以上時,在第2電路基板中,也係不良較容易產生之情況,所以,主控制部係設定關於第2電路基板之執行間隔為較短,藉此,可早期發現不良之產生。另外,當由對於第1電路基板之邊界掃描測試所檢出之不良處所數量,係第4既定值未滿時,在第2電路基板中,也係較難產生不良之情況,所以,主控制部係設定關於第2電路基板之執行間隔為較長,藉此,可避免測試結果之數據量增大。 According to this state, when the number of defective locations detected by the boundary scanning test on the first circuit substrate is greater than the fourth predetermined value, it is also more likely that defects will occur in the second circuit substrate, so the main control unit sets the execution interval for the second circuit substrate to be shorter, thereby detecting the occurrence of defects at an early stage. In addition, when the number of defective locations detected by the boundary scanning test on the first circuit substrate is less than the fourth predetermined value, it is also more difficult that defects will occur in the second circuit substrate, so the main control unit sets the execution interval for the second circuit substrate to be longer, thereby avoiding an increase in the amount of test result data.
在上述態樣中,該環境形成裝置係對於該電路基板,還可施加溫度應力,該測試控制部係對於該電路基板,執行複數次該邊界掃描測試,該主控制部係對應該溫度應力之施加條件,使該邊界掃描測試之執行間隔為不同。 In the above-mentioned aspect, the environment forming device can also apply temperature stress to the circuit substrate, the test control unit performs the boundary scanning test multiple times on the circuit substrate, and the main control unit makes the execution interval of the boundary scanning test different according to the application conditions of the temperature stress.
當依據此態樣時,主控制部係對應溫度應力之施加條件,使邊界掃描測試之執行間隔為不同。因此,當溫度應力之施加條件,為較容易產生不良之條件時,主控制部係設定執行間隔為較短,藉此,可早期發現不良之產生。另外,當溫度應力之施加條件,係較難產生不良之條件時,主控制部係設定執 行間隔為較長,藉此,可避免測試結果之數據量增大。 According to this state, the main control unit makes the execution interval of the boundary scanning test different according to the application conditions of the temperature stress. Therefore, when the application conditions of the temperature stress are conditions that are more likely to produce defects, the main control unit sets the execution interval to be shorter, thereby detecting the occurrence of defects at an early stage. In addition, when the application conditions of the temperature stress are conditions that are less likely to produce defects, the main control unit sets the execution interval to be longer, thereby avoiding an increase in the amount of data in the test results.
在上述態樣中,該主控制部係在該溫度應力之大小為過渡之期間內,其與該溫度應力之大小未過渡之期間內相比較下,使該邊界掃描測試之執行間隔為較窄。 In the above aspect, the main control unit makes the execution interval of the boundary scanning test narrower during the period when the magnitude of the temperature stress is in transition compared to the period when the magnitude of the temperature stress is not in transition.
當依據此態樣時,在溫度應力之大小係過渡之期間內,為較容易產生不良,所以,主控制部係設定執行間隔為較短,藉此,可早期發現不良之產生。另外,在溫度應力之大小未過渡之期間內,其係較難產生不良,所以,主控制部係設定執行間隔為較長,藉此,可避免測試結果之數據量增大。 According to this situation, when the temperature stress is in transition, it is easier to produce defects, so the main control unit sets the execution interval to be shorter, so that the occurrence of defects can be discovered early. In addition, when the temperature stress is not in transition, it is more difficult to produce defects, so the main control unit sets the execution interval to be longer, so as to avoid the increase of the data volume of the test results.
在上述態樣中,該至少一個之電路基板係為複數電路基板,該測試控制部係對於該複數電路基板之每一個,執行該邊界掃描測試,其還包括可切換該測試控制部與被該環境形成裝置所收容之該複數電路基板之連接之連接切換部,使得該複數電路基板中之一電路基板,係被連接於該測試控制部,該主控制部係在該環境形成裝置對於該複數電路基板,施加該振動應力後之狀態下,讓該連接切換部重複執行,依序連接該一電路基板於該測試控制部之連接處理,與該連接處理連動,以讓該測試控制部對於該一電路基板,執行該邊界掃描測試。 In the above aspect, the at least one circuit substrate is a plurality of circuit substrates, and the test control unit performs the boundary scanning test on each of the plurality of circuit substrates. It also includes a connection switching unit that can switch the connection between the test control unit and the plurality of circuit substrates accommodated by the environment forming device, so that one of the plurality of circuit substrates is connected to the test control unit. The main control unit allows the connection switching unit to repeatedly execute the connection processing of sequentially connecting the one circuit substrate to the test control unit when the environment forming device applies the vibration stress to the plurality of circuit substrates, and is linked to the connection processing to allow the test control unit to perform the boundary scanning test on the one circuit substrate.
當依據此態樣時,連接切換部係重複執行,依序連接一電路基板到測試控制部之連接處理,測試控制部係與該連接處理連動,執行對於一電路基板之邊界掃描測試。藉此,使用一測試控制部,連續性地執行對於複數電路基板之每一個之邊界掃描測試,所以,可有效率地執行對於複數電路基板之邊界掃描測試。結果,成為可削減測試成本。 According to this aspect, the connection switching unit repeatedly executes the connection processing of sequentially connecting a circuit substrate to the test control unit, and the test control unit is linked to the connection processing to perform a boundary scan test on a circuit substrate. In this way, a boundary scan test for each of a plurality of circuit substrates is continuously performed using a test control unit, so the boundary scan test for a plurality of circuit substrates can be efficiently performed. As a result, the test cost can be reduced.
在上述態樣中,該環境形成裝置係HALT測試裝置、HASS測試裝置、或HASA測試裝置。 In the above embodiment, the environment forming device is a HALT test device, a HASS test device, or a HASA test device.
當依據此態樣時,環境形成裝置係使用HALT測試裝置、HASS 測試裝置、或HASA測試裝置,藉此,可施加6自由度之振動應力、及廣溫度域且急速變化之溫度應力於電路基板。結果,成為可有效地促進電路基板中之不良之產生。 When the environment forming device is based on this state, the HALT test device, HASS test device, or HASA test device is used, thereby applying 6 degrees of freedom vibration stress and wide temperature range and rapidly changing temperature stress to the circuit substrate. As a result, it becomes possible to effectively promote the occurrence of defects in the circuit substrate.
本發明一態樣之檢查系統係包括:環境形成裝置,可收容做為檢查對象之至少一個電路基板;以及檢查裝置,可通訊地被連接於該環境形成裝置;該檢查裝置係具有:測試控制部,控制對於該電路基板之邊界掃描測試;以及主控制部;該主控制部係在該環境形成裝置對於該電路基板,施加有3自由度以上之振動應力之狀態下,讓該測試控制部對於該電路基板,執行該邊界掃描測試。 An inspection system of one aspect of the present invention includes: an environment forming device that can accommodate at least one circuit substrate as an inspection object; and an inspection device that can be communicatively connected to the environment forming device; the inspection device has: a test control unit that controls a boundary scanning test on the circuit substrate; and a main control unit; the main control unit allows the test control unit to perform the boundary scanning test on the circuit substrate when the environment forming device applies a vibration stress of more than 3 degrees of freedom to the circuit substrate.
當依據此態樣時,做為檢查對象之電路基板係被環境形成裝置所收容,主控制部係在環境形成裝置對於電路基板,施加有3自由度以上之振動應力之狀態下,讓測試控制部對於電路基板,執行邊界掃描測試。如此一來,在使於實際製品之使用情況會產生,或者,超過實際製品之使用情況之假設範圍之3自由度以上之振動應力,施加於電路基板之狀態下,對於該電路基板,執行邊界掃描測試,藉此,可促進電路基板中之不良之產生的同時,可高精度地評估產生之不良處所。結果,可謀求縮短測試之需要時間的同時,成為可提高實際製品之可靠性。 According to this aspect, the circuit substrate to be inspected is accommodated by the environment forming device, and the main control unit allows the test control unit to perform a boundary scan test on the circuit substrate while the environment forming device applies a vibration stress of more than 3 degrees of freedom to the circuit substrate. In this way, the boundary scan test is performed on the circuit substrate while applying a vibration stress of more than 3 degrees of freedom that will be generated in the actual product usage or that exceeds the assumed range of the actual product usage. This can promote the generation of defects in the circuit substrate and can evaluate the generated defective location with high accuracy. As a result, the time required for the test can be shortened while improving the reliability of the actual product.
本發明一態樣之檢查方法係包括:對於被環境形成裝置所收容之至少一個電路基板,藉該環境形成裝置,施加3自由度以上之振動應力之步驟;以及在該環境形成裝置對於該電路基板,施加有該振動應力之狀態下,對於該電路基板,執行邊界掃描測試之步驟。 The inspection method of one aspect of the present invention includes: applying a vibration stress of more than 3 degrees of freedom to at least one circuit substrate accommodated by an environment forming device by means of the environment forming device; and performing a boundary scanning test on the circuit substrate while the environment forming device applies the vibration stress to the circuit substrate.
當依據此態樣時,在做為檢查對象之電路基板被環境形成裝置所收容,環境形成裝置係對於電路基板,施加有3自由度以上之振動應力之狀態下,執行對於電路基板之邊界掃描測試。如此一來,於使在實際製品之使用情 況會產生,或者,超過實際製品之使用情況之假設範圍之3自由度以上之振動應力,施加於電路基板之狀態下,對於該電路基板,執行邊界掃描測試,藉此,可促進電路基板中之不良之產生的同時,而可高精度地評估產生之不良處所。結果,可謀求縮短測試之需要時間的同時,成為可提高實際製品之可靠性。 According to this aspect, the circuit substrate to be inspected is accommodated in the environment forming device, and the environment forming device performs a boundary scanning test on the circuit substrate under a state where a vibration stress of more than 3 degrees of freedom is applied to the circuit substrate. In this way, a boundary scanning test is performed on the circuit substrate under a state where a vibration stress of more than 3 degrees of freedom that would be generated in the actual product usage or that exceeds the assumed range of the actual product usage is applied to the circuit substrate, thereby promoting the generation of defects in the circuit substrate and evaluating the generated defective location with high accuracy. As a result, the time required for the test can be shortened while improving the reliability of the actual product.
2A:檢查裝置 2A: Inspection device
11:系統控制器 11: System controller
12:腔體監視器 12: Cavity monitor
13:測試控制器 13: Test the controller
14:記憶部 14: Memory Department
15:顯示部 15: Display unit
16:通訊部 16: Communications Department
17:中繼單元 17: Relay unit
21:通訊部 21: Communications Department
40:電線 40: Wires
100:電路基板 100: Circuit board
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| TWI258012B (en) * | 2001-04-24 | 2006-07-11 | Venturedyne Ltd | Support pack for vibratory testing of printed circuit boards |
| JP2008170224A (en) * | 2007-01-10 | 2008-07-24 | Mitsubishi Electric Engineering Co Ltd | Temperature tester and temperature test method |
Also Published As
| Publication number | Publication date |
|---|---|
| TW202215934A (en) | 2022-04-16 |
| TW202520836A (en) | 2025-05-16 |
| JP2022059232A (en) | 2022-04-13 |
| JP7474672B2 (en) | 2024-04-25 |
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