CN1224090C - Testing during burn-in system - Google Patents
Testing during burn-in system Download PDFInfo
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- CN1224090C CN1224090C CN 02136888 CN02136888A CN1224090C CN 1224090 C CN1224090 C CN 1224090C CN 02136888 CN02136888 CN 02136888 CN 02136888 A CN02136888 A CN 02136888A CN 1224090 C CN1224090 C CN 1224090C
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- 238000012360 testing method Methods 0.000 title claims abstract description 91
- 238000013100 final test Methods 0.000 claims description 7
- 238000000034 method Methods 0.000 claims description 6
- 238000003745 diagnosis Methods 0.000 claims description 4
- 230000004044 response Effects 0.000 claims description 4
- 238000012806 monitoring device Methods 0.000 claims description 3
- 238000013461 design Methods 0.000 description 8
- 238000012937 correction Methods 0.000 description 4
- 230000001133 acceleration Effects 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 3
- 230000005855 radiation Effects 0.000 description 3
- 208000036993 Frustration Diseases 0.000 description 2
- 230000001684 chronic effect Effects 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000012544 monitoring process Methods 0.000 description 2
- 238000012827 research and development Methods 0.000 description 2
- 238000010257 thawing Methods 0.000 description 2
- 239000002699 waste material Substances 0.000 description 2
- 206010037660 Pyrexia Diseases 0.000 description 1
- 238000009529 body temperature measurement Methods 0.000 description 1
- 238000001816 cooling Methods 0.000 description 1
- 230000007613 environmental effect Effects 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 238000002955 isolation Methods 0.000 description 1
- 230000007774 longterm Effects 0.000 description 1
- 238000011160 research Methods 0.000 description 1
- 230000000630 rising effect Effects 0.000 description 1
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Abstract
The present invention relates to a testing during burn-in system (TDBI) which comprises a burning machine chamber, at least one burning machine board and at least one extension printed circuit board, wherein the burning machine chamber is provided with a plurality of furnaces and extension furnaces; the burning machine boards are arranged in the furnaces for testing a burning machine with a relatively high temperature or a low temperature; the extension printed circuit boards are arranged outside the extension furnaces for substantially testing a room temperature.
Description
Technical field
The present invention relates to a kind of burning machine system, relate in particular to a kind of testing during burn (test during burn-in, TDBI) system.
Background technology
Burning machine (burn-in) be a kind of in a large amount of productions in order to inspect/to screen the method for relatively poor part, this is particularly important for memory product, therefore still do not have any memory chip manufacturer now and dare burning machine program is removed, only the very ripe product of technology.
Except a large amount of productions, the burning machine is also played the part of a key player to the research and development of new product.Most manufactory can use a testing tool to monitor early stage mortality (the early failurerate of a large amount of productions and New Product, EFR), chronic frustration rate (long-term failure rate) is high-temperature operation lifetime (hightemperature operating life for example, HTOL), grid (gate) or unit (cell) are to the opposing intensity of external radiation, this is commonly referred to and quickens soft error rate (accelerated soft error rate, and chip quality usefulness (as high-temperature operation lifetime HTOL) ASER).
To above-mentioned early stage mortality (EFR), chronic frustration rate such as high-temperature operation lifetime (HTOL), acceleration soft error rate (ASER), and low-temperature operation lifetime (low temperature operating life, test such as LTOL) needs to use and burns unit rooms (burn-in chamber) and carry out.At present, mainly contain two kinds of burn in process systems that are used for packaged sample: one is that (another then is testing during burn (test during burn-in, TDBI) system to dynamic burning machine for dynamic burn-in, DBI) system.Dynamically burning machine (DBI) system is generally row insulation (row-isolation), dynamically burn machine (DBI) but can only detect the whether all normal operation of full line chip.Yet (test during burn-in, TDBI) system, this system can see through element (device under test, quality DUT) in each test of feedback signal recognition to testing during burn.Therefore, the producer of many dynamic random access memory (DRAM) use test adds burning machine (TDBI) system, to reduce the testing time of high storage capacity chip (for example greater than 128Mb) at the final test board.The unit interval testing cost of final test board is higher than the unit interval testing cost of testing during burn.
See also Fig. 1, it is traditional burning unit room structural representation.As shown in Figure 1, this burning unit room 1 has a plurality of stoves (not shown), a system status display 11, a plurality of door 12 and handle 13, a control panel 14 and a PC 15.Wherein, (burn-in board is BIB) to carry out the burn in process of high/low temperature a plurality of burning machine plates can be set in these a plurality of stoves.
One testing during burn (TDBI) system, (burn-in board, BIB) the same, it is more expensive to reach the burning machine plate (BIB) that links together with it than dynamic burning machine (DBI) system respectively as the burning machine plate that links together with it.Yet the integrated testability expense of testing during burn (TDBI) system is crossed and is lower than final test (final test, FT) testing expense of memory test machine.After suitable correction, testing during burn (TDBI) system can be in order to the test in executive chairman's cycle (longcycle time) to reduce the testing time and the cost of memory test machine.
Preferable correction is decided on burning machine plate (BIB) design entirely.At present, state-of-the-art testing during burn (TDBI) system time test period that can reach 200ns.Burning machine plate (BIB) need have short pulse signal rising/fall time (Tr/Tf) and less excessive/not enough impact (over-shoot/under-shoot).The size of printed circuit board (PCB) need be controlled, that is can not be excessive and increase time of delay.
Because dynamic random access memory (DRAM) has strided forward the memory capacity more than or equal to 128Mb, therefore most dynamic random access memory (DRAM) producer has testing during burn (TDBI) system to support the new technology research and development.
Because above-mentioned shortcoming, how complete and effectively utilize testing during burn (TDBI) system, very important for manufactory.Yet most testing during burn (TDBI) system only is suitable for fixedly pin arrangements, so will change burning machine plate (BIB) the investment waste that causes great number because of pin.Moreover, in a burning unit room, there are several to burn machine plate (BIB) usually, but only need under room temperature, test a few sample sometimes, for example carry out acceleration soft error rate (ASER) test of 5 samples.On practice, can use whole burning machine stove to do this test (be ASER test) usually, so for useless to slot also be a kind of waste.
Summary of the invention
Testing during burn (TDBI) system of main purpose of the present invention for a kind of improvement is provided in order to improving the shortcoming of above-mentioned known technology, and increases its convenience, the especially test under the room temperature.
Testing during burn (TDBI) system of another object of the present invention for a kind of improvement is provided with the testing element in response to different pins, and adjusts carry out of corresponding wire jumper kenel in order to test, and need not change the temperature conditions that burns in the unit room.
Another purpose of the present invention provides a kind of extension printed circuit board (PCB), can design in response to different test purposes, in order to the test of acceleration soft error rate (ASER), temperature and voltage correction, temperature homogeneity supervision, tested sample surfaces temperature monitoring, and the current sinking affirmation etc.
For reaching above-mentioned purpose, (it comprises for test during burn-in, TDBI) system: one burns unit room, and it has a plurality of stoves and extends stove to the invention provides a kind of testing during burn; At least one burning machine plate, it is arranged in this stove, in order to carry out the burn in process of a high or low relatively temperature; And at least one extension printed circuit board (PCB), it is arranged at outside this extension stove, in order to carry out a test of room temperature in fact.
According to conception of the present invention, wherein this in fact the test of room temperature for quickening soft error rate (acceleratedsoft error rate, ASER) test and and final test (final test, the FT) correlation between the memory test machine (correlation) test.
According to conception of the present invention, wherein this extension printed circuit board (PCB) comprises: a plurality of slots, and use for element to be tested and plant thereon; And a wire jumper array, adjust its wire jumper in order to element to be tested according to different pin arrangements.
According to conception of the present invention, wherein this extension printed circuit board (PCB) comprises that also one measures pin, in order to measure the electric current consume.
According to conception of the present invention, wherein this extension printed circuit board (PCB) also comprises a temperature-sensing element, in order to measure in the stove temperature and to avoid this extension printed circuit board (PCB) to damage because of high/low temperature in the stove.
According to conception of the present invention, wherein this extension printed circuit board (PCB) also comprises a temperature monitoring device, in order to temperature in this stove of direct demonstration, use element in Tc, monitor temperature uniformity and/or the monitor test (deviceunder test, surface temperature DUT).
For reaching above-mentioned purpose, the present invention provides a kind of printed circuit board (PCB) in addition, and it is applied to one and burns outside the unit room to carry out an element under test test of room temperature in fact, and it comprises: a plurality of slots, and use for this element to be tested and plant thereon; And a wire jumper array, adjust its wire jumper in order to pin arrangements according to this element to be tested, use making the element under test of tool difference pin arrangements be able on this printed circuit board (PCB), test.
A further object of the present invention is for providing a kind of printed circuit board (PCB), and it is applied to one and burns in the unit room to carry out an element under test test of room temperature in fact, and it comprises: a plurality of slots, and use for this element to be tested and plant thereon; And a temperature monitoring device, in order to the temperature of this printed circuit panel area of direct demonstration.
A further object of the present invention is for providing a kind of printed circuit board (PCB), and it is applied to one and burns in the unit room to carry out an element under test test of room temperature in fact, and it comprises: a plurality of slots, and use for this element to be tested and plant thereon; And a temperature-sensing element, damage because of variations in temperature in order to avoid this printed circuit board (PCB).
The present invention must be by following graphic and describe in detail, with a more deep understanding:
Description of drawings
Fig. 1 is the structural representation that a tradition is burnt unit room.
Fig. 2 is the burning unit room structural representation of preferred embodiment of the present invention.
Fig. 3 is that the best that is used for burning unit room shown in Figure 2 is extended the printed circuit board arrangement schematic diagram.
Embodiment
See also Fig. 2, it is for the burning unit room structural representation of preferred embodiment of the present invention.As shown in Figure 2, burning unit room structure 2 of the present invention is burnt the main device of unit room (as shown in Figure 1) and a plurality of extension stoves 21 except that having tradition, (extending printed circuit board EPCB) 23 plants for a plurality of extension circuit plates also more to have increased a plurality of slots 22.
Testing during burn (TDBI) system or the convenience that dynamically burns machine (DBI) system can increase by extending printed circuit board (PCB) (EPCB) 23, especially the test case under the room temperature is as quickening soft error rate (ASER) test etc., this still can carry out on the burning machine plate (BIB) 26 in the stove 24 because of traditional high/low temperature test, and the test under the room temperature then can be carried out in extending on the printed circuit board (PCB) 23.So arrangement design also can be fixed the radiation source that quickens soft error rate (ASER) test, and can avoid radiation source to be blown off by the cooling/samming fan that burns in the unit room.
See also Fig. 3, it is the best printed circuit board arrangement schematic diagram that extends in the burning unit room shown in Figure 2.As shown in Figure 3, extension printed circuit board (PCB) 23 of the present invention has golden finger 231, wire jumper array 232, measures pin 233 and quickens soft error rate (ASER) test socket 234.Golden finger 231 is in order to be inserted on the extension printed circuit board (PCB) slot 22 that extends stove 21.Wire jumper array 232 is used to compensate the same package type and with the situation of different pin arrangements, and extending printed circuit board (PCB) (EPCB) 23 by this can become and strengthen the low-cost settling mode that burns the unit room applicability.Wire jumper array 232 can be adjusted corresponding wire jumper kenel in response to the testing element of different pins in order to carrying out of testing, and need not change the temperature conditions that burns in the unit room, and this is important especially for engineering research, is time-consuming because be returned to specific temperature.In addition, because this extensions printed circuit board (PCB) (EPCB) the 23rd, be inserted on the extension printed circuit board (PCB) slot 22 that extends stove 21 and, so the sensor signal delay is more limited and not obvious near diagnosis/drive plate 25 (diagnost ic/driving board).By wire jumper array 232 designs of extending on the printed circuit board (PCB) (EPCB) 23, owing to no longer need extra burning machine plate (BIB) and package design, therefore can save great amount of cost for the same package type of the different pin arrangements of tool.Also therefore, wafer manufactory need not verify (re-qualify) and test to different encapsulated types more once more with the client.In addition, quicken soft error rate (ASER) test socket 234 and can plant element to be tested thereon to test.
Measure pin 233, the pin of for example measuring current loss can design in extending on the printed circuit board (PCB) (EPCB) 23, even if so that the analyst need not open and burn the unit room door and can measure.Increasing test needs to measure current loss to determine that burning machine pattern (burn-in mode) starts.Current loss may be different under different temperatures, open therefore that to burn the unit room door not only dangerous and will influence the uniform temperature and the accuracy of high/low temperature measurement.In addition, under the low-temperature test environment, open and burn the unit room door, will cause burning unit room 24 defrostings.Because defrosting is consuming time, this will reduce the board utilization rate.
In addition, temperature-sensing element (not shown) also can design in extending on the printed circuit board (PCB) (EPCB), is subjected to high/low temperature environmental disruption to avoid it on the burning machine plate (BIB) 26 because of placing, and this also can prolong the life-span of element.Owing to extending the expensive components (for example electric capacity or light-emitting diode) that to use anti-high/low temperature to change on the printed circuit board (PCB) (EPCB), therefore on burning machine plate (BIB) 26, needing originally to use the cost of expensive components to save.In addition, a thermometer (not shown) also can be set thereon to carry out direct temperature monitoring on the extension printed circuit board (PCB) (EPCB) 23, so can dwindle because of converting signal to numerical digit in order to the deviation that change-over circuit caused that shows from thermometer.
Indulge the above, burning unit room 24 of the present invention provides the test environment of a high/low temperature incessantly, and the extension printed circuit board (PCB) (EPCB) 23 outside it extends stove 21 also can design according to different test purposes, for example quicken soft error rate (ASER) test, change pin arrangements, temperature and voltage correction, temperature homogeneity monitors, the surface temperature supervision, and the current sinking affirmation etc.So value of the real tool industry of the present invention.
This case invention can be appointed and executes that the craftsman thinks and be to modify as all by being familiar with present technique field person, so neitherly takes off the protection of desiring as claim.
Claims (7)
1. testing during burn-in system, it comprises:
One burns unit room, and it has a plurality of stoves and extends stove;
At least one burning machine plate, it is arranged in these a plurality of stoves, in order to carry out the burn in process of a high or low relatively temperature; And
At least one extension printed circuit board (PCB), it is arranged at outside this extension stove, in order to carry out a test of room temperature in fact.
2. testing during burn-in system as claimed in claim 1 is characterized in that, this in fact room temperature test for quicken the soft error rate test or and final test memory test machine between correlation test.
3. testing during burn-in system as claimed in claim 1 is characterized in that, this extension printed circuit board (PCB) comprises:
A plurality of slots are used for element to be tested and are planted thereon; And
One wire jumper array is in order to adjust its wire jumper in response to the element to be tested of different pin arrangements.
4. as claim 1 or 3 described testing during burn-in systems, it is characterized in that this extension printed circuit board (PCB) comprises that also one measures pin, in order to measure the electric current consume.
5. testing during burn-in system as claimed in claim 3 is characterized in that, this extension printed circuit board (PCB) also comprises a temperature-sensing element, in order to avoid damaged by variations in temperature because of this extension printed circuit board (PCB) is placed in.
6. testing during burn-in system as claimed in claim 3, it is characterized in that, this extension printed circuit board (PCB) also comprises a temperature monitoring device, this extends the temperature of printed circuit panel area in order to direct demonstration, uses the surface temperature of element in Tc, monitor temperature uniformity and/or the monitor test.
7. testing during burn-in system as claimed in claim 3, it is characterized in that, also comprise at least one diagnosis/drive plate and a plurality of slots outside diagnosis/drive plate, in order to the signal of accepting to enter and the instruction and the signal that export the extension printed circuit board (PCB) by diagnosis/drive plate to by this extension printed circuit board (PCB).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 02136888 CN1224090C (en) | 2002-09-09 | 2002-09-09 | Testing during burn-in system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 02136888 CN1224090C (en) | 2002-09-09 | 2002-09-09 | Testing during burn-in system |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1482660A CN1482660A (en) | 2004-03-17 |
| CN1224090C true CN1224090C (en) | 2005-10-19 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 02136888 Expired - Fee Related CN1224090C (en) | 2002-09-09 | 2002-09-09 | Testing during burn-in system |
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| Country | Link |
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| CN (1) | CN1224090C (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101852551B (en) * | 2009-04-01 | 2012-09-05 | 辉达公司 | Furnace for performing high-temperature test on electronic component |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN100387998C (en) * | 2006-02-06 | 2008-05-14 | 友达光电股份有限公司 | Burn-in equipment |
| CN103675500B (en) * | 2012-09-24 | 2016-02-03 | 致茂电子(苏州)有限公司 | Laborsaving burning machine stove |
| KR102842851B1 (en) * | 2016-01-08 | 2025-08-05 | 에어 테스트 시스템즈 | Method and system for thermal control of devices in an electronics tester |
| KR20250011721A (en) | 2020-10-07 | 2025-01-21 | 에어 테스트 시스템즈 | Electronics tester |
-
2002
- 2002-09-09 CN CN 02136888 patent/CN1224090C/en not_active Expired - Fee Related
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101852551B (en) * | 2009-04-01 | 2012-09-05 | 辉达公司 | Furnace for performing high-temperature test on electronic component |
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| Publication number | Publication date |
|---|---|
| CN1482660A (en) | 2004-03-17 |
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Owner name: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (BEIJING Effective date: 20111129 |
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Effective date of registration: 20111129 Address after: 201203 No. 18 Zhangjiang Road, Shanghai Co-patentee after: Semiconductor Manufacturing International (Beijing) Corporation Patentee after: Semiconductor Manufacturing International (Shanghai) Corporation Address before: 201203 No. 18 Zhangjiang Road, Shanghai Patentee before: Semiconductor Manufacturing International (Shanghai) Corporation |
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