TWI910887B - Inspection devices, inspection systems and inspection methods - Google Patents

Abstract

An inspection device that can reduce the time required for testing while improving the reliability of actual products. The inspection device (2A) includes: a test controller (13) that controls the boundary scan test on the circuit board (100); and a system controller (11); the system controller (11) performs the boundary scan test on the circuit board (100) under the condition that the environment forming device (3) applies a vibration stress of more than 3 degrees of freedom to the circuit board (100).

Description

Inspection devices, inspection systems and inspection methods

This invention relates to an inspection apparatus, inspection system, and inspection method, and particularly to an inspection apparatus, inspection system, and inspection method for performing boundary scan tests on an object to be inspected.

Boundary scan testing is a well-known inspection method that examines circuit boards equipped with JTAG (Joint Test Action Group) compatible semiconductor devices. Boundary scan testing primarily checks for poor soldering of semiconductor devices mounted on the circuit board, or open-circuit or short-circuit faults in the wiring between multiple semiconductor devices. Japanese Patent Application Publication No. 2000-148528 discloses a test system for performing boundary scan testing on JTAG compatible integrated circuits.

Actual products shipped after mass production may be used under severe conditions exposed to various environmental factors such as vibration and temperature. However, when using the testing system disclosed in Japanese Patent Application Publication No. 2000-148528, the actual usage conditions of the product are not assumed during boundary scan testing, resulting in lower reliability of the actual product. Furthermore, there is a need to shorten the testing time in order to reduce testing costs.

The purpose of this invention is to provide an inspection device, inspection system, and inspection method that aims to reduce the time required for testing while improving the reliability of actual products.

The present invention provides an inspection device that can be communicatively connected to an environment forming apparatus that can accommodate at least one circuit board as the object of inspection. The device includes: a test control unit that controls a boundary scan test on the circuit board; and a main control unit that causes the test control unit to perform the boundary scan test on the circuit board when the environment forming apparatus applies a vibration stress of more than 3 degrees of freedom to the circuit board.

The following is a detailed description of the embodiments of the present invention using drawings. Furthermore, elements assigned the same number in different drawings represent the same or corresponding elements.

Figure 1 is a simplified diagram illustrating the structure of the inspection system 1 according to an embodiment of the present invention. As shown in Figure 1, the inspection system 1 includes an inspection device 2 and an environment forming device 3 that are communicatively connected to each other. The environment forming device 3 is an environmental testing device used to perform environmental testing on a prototype during the design and development stage of a product. However, the environment forming device 3 can also be used as a screening device to perform screening testing on an actual product during pre-shipment testing. The inspection device 2 includes a control unit for performing boundary scanning testing on the inspection object contained within the environment forming device 3. The inspection targets are circuit boards that assemble semiconductor devices compatible with JTAG (Joint Test Action Group). In boundary scan testing, the main focus is on checking for poor soldering of semiconductor devices assembled on the circuit board, or open circuit or short circuit faults in the wiring between multiple semiconductor devices.

Figure 2 is a block diagram that schematically shows the structure of the inspection device 2 (2A). As shown in the connection relationship in Figure 2, the inspection device 2A includes a system controller 11 (main control unit), a cavity monitor 12, a test controller 13 (test control unit), a memory unit 14, a display unit 15, and a communication unit 16.

Test controller 13 is used to control the boundary scan test performed on the circuit board 100 (described in detail below), which is the object of inspection, by means of control from system controller 11. Test controller 13 processes test data (test mode) and test clock during boundary scan test. Test controller 13 is connected to relay unit 17.

The system controller 11 includes a CPU and other processors, as well as memory such as ROM and RAM, and summarizes and controls the overall operation of the system. When the environment forming device 3 applies a predetermined environmental stress to the circuit board 100, the system controller 11 allows the test controller 13 to perform boundary scan tests on the circuit board 100.

The memory unit 14 is any memory device such as semiconductor memory or hard disk. The display unit 15 is any display device such as liquid crystal display or organic EL display. The system controller 11 and the cavity monitor 12 are connected to each other, for example, via an RS-232C cable. The system controller 11 and the test controller 13 are connected to each other, for example, via a USB cable. The communication unit 16 and the communication unit 21 of the environment forming apparatus 3 (described in detail below) are connected to each other, for example, via an RS-485 cable.

Figure 3 is a simplified diagram illustrating the structure of the environment formation device 3. In this embodiment, the environment formation device 3 uses a HALT (Highly Accelerated Limit Test) testing device, a HASS (High Accelerated Stress Screen) testing device, or a HASA (High Accelerated Stress Audit) testing device. The HALT testing device primarily inspects prototypes. It continuously applies environmental stress to identify weaknesses in the prototypes before applying environmental stress, until a failure occurs (until a defect is detected). The HASS and HASA testing devices primarily inspect actual products. The HASS test involves a full inspection of all actual products, while the HASA test involves a sampling inspection of a portion of the actual products. HALT, HASS, or HASA testing devices apply vibration and/or temperature stresses beyond the assumed range (specification range) of actual product use to the object under inspection, thereby enabling high-acceleration testing. Vibration stress is applied through vibrations along the extension and rotation directions of the three orthogonal axes (the X and Y axes in the horizontal plane and the Z axis in the vertical direction), resulting in a 6-DOF vibration stress. However, any vibration stress exceeding 3 DDOF that would occur under actual product use is acceptable. Vibration stress with 6 degrees of freedom (or more) differs from uniaxial or biaxial vibration. It is a complex vibration that occurs in actual product use or exceeds the assumed range of actual product use. With vibration stress of 6 degrees of freedom (or more), the reliability of the object under inspection can be assessed in a shorter time. Vibration acceleration can be arbitrarily set within, for example, a range of 5 to 75 (Grms). Temperature stress can be applied over a wide temperature range (e.g., -100 to +200°C) and with rapid changes (e.g., an average of 70°C/min).

As shown in Figure 3, the environment forming device 3 includes an air-conditioned chamber 23 and a cavity 24 enclosed by an insulated frame 25. The air-conditioned chamber 23 is equipped with a blower 26 for air circulation, a heater 27 for heating, and a nozzle 28 for spraying liquid nitrogen for cooling. The nozzle 28 is connected via piping 29 to a liquid nitrogen tank 31 located outside the environment forming device 3. The piping 29 is equipped with a valve 30 for controlling whether liquid nitrogen can be supplied from the tank 31 to the nozzle 28. The air conditioning air generated in the air conditioning room 23, as shown by arrow A, is supplied from the air conditioning room 23 to the cavity 24 through the air inlet 42, and after circulating in the cavity 24, it is discharged from the cavity 24 to the air conditioning room 23 through the exhaust port 41.

A flat vibrating table 32 is disposed inside the cavity 24. The vibrating table 32 is supported by a spring 33 via a support member 34 fixed to the side of the frame 25. The vibrating table 32 is driven by an actuator 35, thereby realizing the aforementioned 6 degrees of freedom vibration. The actuator 35 is constructed using a plurality of (e.g., 5) air cylinders with different directions of motion. Compressed air is repeatedly supplied and discharged to each air cylinder in a short cycle, thereby realizing vibration motion in each air cylinder.

The circuit board 100, which is the object of inspection, is fixed to the upper surface of the vibration table 32 inside the cavity 24 by the fixing member 38. Although not shown in the figure, semiconductor devices such as FPGAs (Field Programmable Gate Arrays) that are suitable for JTAG (Joint Test Action Group) are assembled on the printed circuit board by soft soldering or other connection methods such as BGA (Ball Grid Array). The circuit board 100 is connected to the wires 40 for data (test data and test result data, etc.) used for communication boundary scan testing. The wires 40 are pulled out to the outside of the frame 25 through the wire holes 39 formed in the side wall of the frame 25 to be connected to the relay unit 17 shown in FIG. 2. The circuit board 100 housed in the environment forming device 3 and the test controller 13 of the inspection device 2A are interconnected via wires 40 and relay unit 17.

Furthermore, the environment forming device 3 includes an environment controller 22, a communication unit 21, a temperature detector 37, and a vibration detector 36. The temperature detector 37 is disposed within the cavity 24. The vibration detector 36 is constructed using an accelerometer or the like and is disposed on the vibration table 32.

The environmental controller 22 is configured to include a CPU and other processors, as well as memory such as ROM and RAM. The environmental controller 22 controls the operation of the heater 27, valve 30, and actuator 35 respectively through various control signals. The application of temperature stress and vibration stress to the circuit board 100 is controlled by the environmental controller 22.

The environmental controller 22 receives temperature data detected by the temperature detector 37, indicating the temperature inside the cavity 24. Based on the temperature data input from the temperature detector 37, the environmental controller 22 feeds back to control the heater 27 and the valve 30, thereby controlling the temperature inside the cavity 24 to the target value. Furthermore, the environmental controller 22 receives vibration data detected by the vibration detector 36, indicating the vibration acceleration of the vibrating table 32. Based on the vibration data input from the vibration detector 36, the environmental controller 22 feeds back to control the actuator 35, thereby controlling the vibration acceleration of the vibrating table 32 to the target value.

Furthermore, these temperature and vibration data are input from the environmental controller 22 to the cavity monitor 12 (see Figure 2) via the communication units 21 and 16. In this way, the status (temperature and vibration) of the cavity 24 of the environmental forming device 3 can be monitored by the cavity monitor 12 of the inspection device 2A.

Figure 4 is a diagram illustrating the first example of the vibration stress application mode on the circuit board 100. The horizontal axis of the graph represents the elapsed time, and the vertical axis represents the magnitude of the vibration acceleration. In the first example, the environmental controller 22 maintains a constant vibration acceleration of the vibration table 32 throughout the entire self-test period from start to finish. Thus, a constant vibration stress is applied to the circuit board 100 throughout the entire self-test period.

Figure 5 illustrates a second example of the vibration stress application mode on the circuit board 100. In this second example, the environmental controller 22 alternates between periods when the vibration table 32 is vibrating (setting the vibration acceleration to a predetermined value, thus making vibration "ON") and periods when the vibration table 32 is not vibrating (setting the vibration acceleration to zero, thus making vibration "OFF"). This alternating period of applying vibration stress to the circuit board 100 (ON period) and periods of not applying it (OFF period) results in an alternating pattern. Furthermore, the lengths of the ON and OFF periods can be the same or different. Also, during the ON period, the vibration acceleration can be a fixed value or a variable value.

Figure 6 illustrates a third example of the vibration stress application mode on the circuit board 100. In this third example, the environmental controller 22 alternates between periods when the vibration table 32 vibrates significantly (the vibration acceleration is set to be greater than a certain reference value, thus defining the vibration as a "large" period) and periods when the vibration table 32 vibrates less significantly (the vibration acceleration is set to be less than that reference value, thus defining the vibration as a "small" period). Thus, the periods of applying greater vibration stress to the circuit board 100 (the "large" period) and the periods of applying less vibration stress (the "small" period) alternate. Furthermore, the lengths of the "large" and "small" periods can be the same or different. Furthermore, the vibration acceleration coefficient can be a constant value or a variable value during both the large and small periods.

Figure 7 illustrates a fourth example of the vibration stress application mode on the circuit board 100. In this fourth example, the environmental controller 22 gradually increases the vibration acceleration in a stepwise manner over time. Thus, a vibration stress that gradually increases in a stepwise manner over time is applied to the circuit board 100. Alternatively, in the opposite manner to the example shown in Figure 7, a vibration stress that gradually decreases in a stepwise manner over time can be applied to the circuit board 100. Furthermore, the magnitude of the increase or decrease in the stepwise vibration acceleration can be a constant or a variable value. Moreover, a combination of a stepwise increasing mode and a stepwise decreasing mode of vibration stress can be used.

Figure 8 illustrates a fifth example of the vibration stress application mode on the circuit board 100. In this fifth example, the environmental controller 22 linearly increases the vibration acceleration over time. Thus, a linearly increasing vibration stress is applied to the circuit board 100. Alternatively, in the opposite manner to the example shown in Figure 8, a linearly decreasing vibration stress may be applied to the circuit board 100. Furthermore, a combination of a linearly increasing vibration stress and a linearly decreasing vibration stress may also be used.

The environmental controller 22 can execute all or only one of the vibration stress application modes shown in Figures 4-8 on the circuit board 100. Furthermore, the environmental controller 22 can also arbitrarily combine the vibration stress application modes shown in Figures 4-8 on the circuit board 100. For example, it can execute: • Execute the second example (Figure 5) after the first example (Figure 4). • Mix the ON and OFF periods of the second example (Figure 5) with the long and short periods of the third example (Figure 6). • Insert the OFF period of the second example (Figure 5) or the short period of the third example (Figure 6) midway through the fourth example (Figure 7) or the fifth example (Figure 8). And other combinations. Furthermore, the environmental controller 22 can also apply temperature stress to the circuit board 100 in addition to vibration stress. Information indicating whether a specific application mode must be executed is preset in the environmental controller 22, corresponding to the type of circuit board 100, etc.

In the inspection apparatus 2A of this embodiment shown in Figure 2, the system controller 11 performs a boundary scan test on the circuit board 100 under the condition that the environment forming apparatus 3 applies the aforementioned vibration stress (and temperature stress) to the circuit board 100. Furthermore, although the following description focuses on the system controller 11 determining the execution timing of the boundary scan test, the present invention is not limited to this example. The same functions as the system controller 11 can also be incorporated into the test controller 13, thereby allowing the test controller 13 to determine the execution timing of the boundary scan test. In this case, the test controller 13 includes the functions of a test control unit that controls the boundary scan test, and a main control unit that enables the test control unit to perform the boundary scan test and determines the timing of the boundary scan test. Furthermore, although the following description illustrates an example where the inspection device 2A includes both the system controller 11 and the test controller 13, the invention is not limited to this example. The inspection device 2A may also include a single controller having the functions of both the system controller 11 and the test controller 13. In this case, the single controller includes the functions of both the test control unit and the main control unit.

Figure 9 shows a first example of the timing for performing a boundary scan test on the circuit board 100. The horizontal axis of the graph represents elapsed time, and the vertical axis represents the magnitude of vibration acceleration. Arrow P indicates the timing for performing the boundary scan test. The vibration stress application mode follows the example shown in Figure 5. The test controller 13 performs multiple boundary scan tests on the circuit board 100. In the first example shown in Figure 9, the interval between boundary scan tests is constant (referred to as the "constant mode"), regardless of whether the vibration stress is ON or OFF.

Figure 10 is a diagram illustrating a second example of the execution timing of a boundary scan test on a circuit board 100. The vibration stress application mode adopts the example shown in Figure 5. The test controller 13 performs multiple boundary scan tests on the circuit board 100. In the second example shown in Figure 10, the system controller 11 sets different execution intervals for the boundary scan test according to the vibration stress application conditions. Specifically, the system controller 11 sets a relatively wide interval W11 for the boundary scan test during the OFF period (e.g., time T0 to T1) when the magnitude of the vibration stress is not yet at a first predetermined value. Furthermore, during the ON period (e.g., time T3 to T4) when the magnitude of the vibration stress is above a first predetermined value, the system controller 11 sets the execution interval of the boundary scan test to be an interval W12 that is narrower than the interval W11 (referred to as "variation mode corresponding to the magnitude of vibration stress").

In this example, when the magnitude of the vibration stress is above the first predetermined value, defects are more likely to occur. Therefore, the system controller 11 sets a shorter execution interval for the boundary scan test, thereby enabling early detection of defects. Conversely, when the magnitude of the vibration stress is below the first predetermined value, defects are less likely to occur. Therefore, the system controller 11 sets a longer execution interval for the boundary scan test, thereby preventing an increase in the amount of test data.

In other examples, the system controller 11 can also adjust the execution interval of the boundary scan test according to the application time of the vibration stress. Specifically, the system controller 11 measures the application time of the vibration stress on the circuit board 100 after the start of the test. When the application time of the vibration stress is less than the second predetermined value, the system controller 11 sets the execution interval of the boundary scan test to a wider interval W11. Furthermore, when the application time of the vibration stress is greater than or equal to the second predetermined value, the system controller 11 sets the execution interval of the boundary scan test to a narrower interval W12 than the interval W11 (referred to as the "variation mode corresponding to the application time of vibration stress").

In this example, when the vibration stress application time is greater than or equal to the second predetermined value, defects are more likely to occur. Therefore, the system controller 11 sets a shorter execution interval for the boundary scan test, thereby enabling early detection of defects. Conversely, when the vibration stress application time is less than or equal to the second predetermined value, defects are less likely to occur. The system controller 11 sets a longer execution interval for the boundary scan test, thereby preventing an increase in the amount of test data.

Moreover, in contrast to the above, in cases where defects are more likely to occur, the execution interval of the boundary scan test is set to be longer, and in cases where defects are less likely to occur, the execution interval of the boundary scan test is set to be shorter. In this way, defects on the circuit board 100 can be accurately detected, and defects can be detected at an early stage.

Figure 11 is a diagram illustrating the third example of the execution timing of the boundary scan test on the circuit board 100. The vibration stress application mode adopts the example shown in Figure 7. The system controller 11 sets different execution intervals for the boundary scan test according to the vibration stress application conditions. Specifically, during the OFF period when no vibration stress is applied (times T0 to T1), the system controller 11 sets the execution interval of the boundary scan test to a relatively wide interval W21. Furthermore, during the next period after the magnitude of the vibration stress increases by one level (times T1 to T2), the system controller 11 sets the execution interval of the boundary scan test to an interval W22 that is even narrower than interval W21. Furthermore, during the period (times T2 to T3) when the magnitude of the vibration stress increases by one level, the system controller 11 sets the execution interval of the boundary scan test to be narrower than the interval W22, which is W23. In this way, the system controller 11 sets the execution interval of the boundary scan test to gradually narrow each time the magnitude of the vibration stress increases by one level.

In this case, the greater the vibration stress, the easier it is to produce defects. Therefore, the system controller 11 sets a shorter execution interval for the boundary scan test, thereby enabling early detection of defects. Conversely, the smaller the vibration stress, the less likely it is to produce defects. Therefore, the system controller 11 sets a longer execution interval for the boundary scan test, thereby preventing an increase in the amount of test data.

Conversely, in cases where defects are more likely to occur, the execution interval of the boundary scan test can be set to be longer, while in cases where defects are less likely to occur, the execution interval of the boundary scan test can be set to be shorter. In this case, defects on the circuit board 100 can be accurately detected, allowing for early detection of defects.

Figure 12 is a diagram illustrating the fourth example of the execution timing of the boundary scan test on the circuit board 100. The vibration stress application mode adopts the example shown in Figure 7. Furthermore, in addition to the vibration stress, a temperature stress is also applied. The magnitude of the vibration stress is increased step by step in conjunction with one cycle of the temperature cycle (e.g., time T3 to T5). The system controller 11 adjusts the execution interval of the boundary scan test according to the temperature stress application conditions. Specifically, during the period when the magnitude of temperature stress has not transitioned, that is, during the period when it is roughly constant (including the case of complete constantness and the case of slight variation with a variation range less than a predetermined value) (temperature maintenance period), the system controller 11 sets the execution interval of the boundary scan test to a relatively wide interval W31. Furthermore, during the period when the magnitude of temperature stress transitions (temperature transition period), the system controller 11 sets the execution interval of the boundary scan test to an interval W32 that is even narrower than the interval W31 (referred to as "variation mode corresponding to the application conditions of temperature stress").

In this case, defects are more likely to occur during periods of transition in temperature stress. Therefore, the system controller 11 sets a shorter execution interval for the boundary scan test to detect defects early. Conversely, defects are less likely to occur during periods of constant temperature stress. Therefore, the system controller 11 sets a longer execution interval for the boundary scan test to avoid increasing the amount of test data.

Conversely, the interval between boundary scan tests during the temperature maintenance period can be set to be shorter than the interval between boundary scan tests during the temperature transition period. This allows for the reliable detection of defects on the circuit board 100 even during the temperature maintenance period, when defects are less likely to occur, enabling early detection of defects.

Alternatively, the system controller 11 can set a wider execution interval W31 for the boundary scan test during a period when the magnitude of vibration stress is constant, and a narrower interval W32 for the boundary scan test during the transition period of vibration stress magnitude. In this case, defects are more likely to occur during the transition period of vibration stress magnitude. Therefore, the system controller 11 sets a shorter execution interval for the boundary scan test, thereby enabling early detection of defects on the circuit board 100.

In other examples, the system controller 11 can also adjust the execution interval of the boundary scan test according to the detection status of defects by the boundary scan test. Specifically, the system controller 11 counts the number of defects detected by the boundary scan test based on the test result data received from the environment forming device 3. When the count value of the number of defects (the cumulative value since the start of the test) is not full at the third predetermined value, the system controller 11 sets the execution interval of the boundary scan test to a wider interval W31. Furthermore, when the count of the number of defective locations is above the third predetermined value, the system controller 11 sets the execution interval of the boundary scan test to be an interval W32 that is narrower than the interval W31 (referred to as "variation mode corresponding to the detection status of defective locations").

In this example, when the number of defects detected by the boundary scan test is above the third predetermined value, it is easier for other defects to occur. Therefore, the system controller 11 sets the execution interval of the boundary scan test to be shorter, thereby enabling early detection of other defects. Conversely, when the number of defects detected by the boundary scan test is below the third predetermined value, it is less likely for defects to occur. Therefore, the system controller 11 sets the execution interval of the boundary scan test to be longer, thereby preventing an increase in the amount of test data.

Conversely, the execution interval for boundary scan tests when the number of detected defects is less than the third predetermined value can be set to be shorter than the execution interval when the number of detected defects is greater than the third predetermined value. This ensures that even in situations where defects are less likely to occur, defects on the circuit board 100 can be reliably detected, allowing for early detection of defects.

Furthermore, when the vibration stress application mode adopts the example shown in Figure 4, the system controller 11 can adopt any of the following modes for the boundary scan test execution interval: a certain mode, a variation mode corresponding to the vibration stress application time, a variation mode corresponding to the detection status of defective areas, and a variation mode corresponding to the temperature stress application conditions.

Furthermore, when the vibration stress application mode adopts the example shown in Figures 5-8, the execution interval of the boundary scan test of the system controller 11 can adopt any of the following modes: a certain mode, a variation mode corresponding to the magnitude of the vibration stress, a variation mode corresponding to the application time of the vibration stress, a variation mode corresponding to the detection status of the defect, and a variation mode corresponding to the application conditions of the temperature stress.

The system controller 11 determines that the circuit board 100 has malfunctioned when the number of defect detections (or defect detection rate) within a predetermined unit period of boundary scan testing exceeds a predetermined threshold. Even when the circuit board 100 has soft solder joint defects such as cracks, if the degree of the defect is small, the crack may sometimes be accidentally contacted and not detected during the detection process. When the degree of defect is determined by applying vibration stress, even if the detection time overlaps with the OFF period, it is very likely that the cracked ground may not be contacted and will be detected as a defect. Therefore, by determining the degree of defect based on the number of defect detections (or defect detection rate) within a predetermined unit period, the degree of defect that can be detected is determined.

<Conclusion> When using the inspection device 2 according to this embodiment, the circuit board 100, which is the object of inspection, is housed in the environment forming apparatus 3. The system controller 11 (main control unit) applies a vibration stress of 3 degrees of freedom or more to the circuit board 100 under the condition that the environment forming apparatus 3 applies such a stress. The test controller 13 (test control unit) then performs a boundary scan test on the circuit board 100. In this way, by applying a vibration stress of 3 degrees of freedom or more beyond the assumed range of actual product usage to the circuit board 100, a boundary scan test is performed on the circuit board 100. This promotes the generation of defects in the circuit board 100 while simultaneously allowing for high-precision evaluation of the defect locations. As a result, it is possible to reduce the time required for testing while simultaneously improving the reliability of actual products.

Furthermore, the environment forming device 3 uses a HALT test device, a HASS test device, or a HASA test device, thereby applying 6-DOF vibration stress and rapidly changing temperature stress over a wide temperature range to the circuit board 100. As a result, it effectively promotes the generation of defects in the circuit board 100.

<Variation> Figure 13 is a block diagram showing the simplified structure of the inspection device 2 (2B) of the variation. A scanner unit 18 is added to the structure shown in Figure 2. In this variation, the environment forming device 3 houses a plurality of identical circuit boards 100 (100_1 to 100_N). The plurality of circuit boards 100_1 to 100_N are connected in parallel to the relay unit 17. Each circuit board 100 and the relay unit 17 are connected to each other by a group of five wires used to connect, for example, TDI (Test Data Input), TCK (Test Clock), TMS (Test Mode Selection), TRST (Test Reset), and TDO (Test Data Output). The marking "(N)" in Figure 13 indicates the N sets of parallel connections between circuit boards 100_1 to 100_N and relay unit 17. Scanner unit 18 switches the connection between test controller 13 and the plurality of circuit boards 100_1 to 100_N, such that one of the circuit boards 100 from 100_1 to 100_N is connected to test controller 13.

In a state where environmental stress is applied to a plurality of circuit boards 100_1 to 100_N by the environment forming device 3, the system controller 11 allows the scanner unit 18 to repeatedly perform connection processing, sequentially connecting one circuit board 100 to the test controller 13. Furthermore, the system controller 11 is linked with this connection processing, allowing the test controller 13 to perform boundary scan tests on one circuit board 100, thereby performing multiple boundary scan tests on each of the plurality of circuit boards 100_1 to 100_N. Here, "linkage" means that the connection switching performed by the scanner unit 18 and the execution of the boundary scan tests performed by the test controller 13 are synchronized.

Figure 14 is a simplified diagram illustrating the structure of the scanner unit 18. The scanner unit 18 has multiple circuit boards 100_1 to 100_N as inspection objects, and a plurality of channels C (C1 to CN) of the same number (or more). Each channel C includes a normally open contact switch S (S1 to SN). One terminal of each switch S is connected to the test controller 13, and the other terminal is connected to the circuit boards 100_1 to 100_N via the relay unit 17.

By means of the switching control of system controller 11, one of the switches S1 to SN is turned off, thereby connecting the circuit board 100 connected to that switch S to the test controller 13. That is, the switching control of switches S1 to SN is equivalent to the selection control of channels C1 to CN; by turning off a switch S, the corresponding channel C is selected. In Figure 14, switch S1 is turned off and channel C1 is selected, thereby indicating that circuit board 100_1 is connected to the test controller 13. Moreover, instead of all five ports being switchable by switch S1, only the desired ports among the five ports can be switched by switch S1. Alternatively, a configuration can be adopted where only two ports, TDI (Test Data Input) and TDO (Test Data Output), can be switched by switch S1.

In this variant, the test controller 13 performs multiple boundary scan tests on each of the plurality of circuit boards 100_1 to 100_N. The system controller 11 adjusts the execution interval for the boundary scan tests of the remaining circuit boards 100 according to the detection of defects in the boundary scan test of one circuit board 100. Specifically, when the number of defects detected in the boundary scan test of each circuit board 100 is less than a predetermined fourth value, the system controller 11 sets the execution interval for the boundary scan tests of all circuit boards 100 to a relatively wide first interval. Furthermore, when the number of defects detected by the boundary scan test of at least one circuit board 100 is a predetermined value of 4 or higher, the system controller 11 sets the execution interval for the boundary scan test of all circuit boards 100 to be a second interval that is narrower than the first interval.

According to this variant, the scanner unit 18 (connection switching unit) repeatedly performs the connection processing of sequentially connecting a circuit board 100 to the test controller 13. The test controller 13 is linked to this connection processing to perform boundary scan tests on the circuit board 100. Thus, by using a single test controller 13, boundary scan tests on each of the plurality of circuit boards 100_1 to 100_N can be performed continuously, thereby efficiently performing boundary scan tests on the plurality of circuit boards 100_1 to 100_N. As a result, testing costs are reduced.

Furthermore, according to this variant, when the number of defects detected by the boundary scan test of at least one circuit board is 4 or more predetermined values, defects are more likely to occur in other circuit boards 100 as well. Therefore, the system controller 11 sets the execution interval of the boundary scan test of all circuit boards 100 to be shorter, thereby enabling early detection of defects. In addition, when the number of defects detected by the boundary scan test of each circuit board 100 is less than the fourth predetermined value, it is also more difficult for defects to occur in all circuit boards 100. Therefore, the system controller 11 sets the execution interval of the boundary scan test of all circuit boards 100 to be longer, thereby avoiding an increase in the amount of test data.

Furthermore, this variation assumes a circuit structure in which one semiconductor device is assembled on a single circuit substrate 100. However, the invention is not limited to this example. Alternatively, a single circuit substrate 100 may be equipped with a plurality of semiconductor devices. In this case, a channel C is assigned relative to each semiconductor device, thereby making the selection of channel C equivalent to the switching of the semiconductor device.

The present invention provides an inspection device that can be communicatively connected to an environment forming apparatus that can accommodate at least one circuit board as the object of inspection. The device is characterized by comprising: a test control unit for controlling boundary scan testing of the circuit board; and a main control unit; the main control unit instructs the test control unit to perform the boundary scan test on the circuit board when the environment forming apparatus applies vibration stress of 3 degrees of freedom or more to the circuit board.

In this configuration, the circuit board to be inspected is housed in an environment forming apparatus. The main control unit applies vibration stress of 3 or more degrees of freedom to the circuit board under these conditions, while the test control unit performs a boundary scan test on the circuit board. This allows for the application of vibration stress of 3 or more degrees of freedom—which would occur in actual product use, or even beyond the assumed range of actual product use—to the circuit board. By performing a boundary scan test on the circuit board, defects in the circuit board can be detected, and the location of defects can be evaluated with high precision. As a result, the required testing time can be reduced, thereby improving the reliability of the actual product.

In the above configuration, the test control unit performs the boundary scan test multiple times on the circuit board, and the main control unit adjusts the execution interval of the boundary scan test according to the applied vibration stress conditions.

When this condition is met, the main control unit adjusts the execution interval of the boundary scan test according to the applied vibration stress conditions. Therefore, when the applied vibration stress conditions are more likely to cause defects, the main control unit sets a shorter execution interval to detect defects early. Conversely, when the applied vibration stress conditions are less likely to cause defects, the main control unit sets a longer execution interval to avoid increasing the amount of test data.

In the above-described state, when the magnitude of the vibration stress is above a first predetermined value, the main control unit compares it with the case where the magnitude of the vibration stress is below the first predetermined value, thereby narrowing the execution interval of the boundary scan test.

When following this pattern, if the vibration stress is above the first predetermined value, defects are more likely to occur. Therefore, the main control unit sets a shorter execution interval to detect defects early. Conversely, if the vibration stress is below the first predetermined value, defects are less likely to occur. Therefore, the main control unit sets a longer execution interval to avoid increasing the amount of test data.

In the above-described state, when the vibration stress application time is greater than or equal to the second predetermined value, the main control unit makes the execution interval of the boundary scan test narrower compared to the case where the vibration stress application time is less than or equal to the second predetermined value.

When this condition is met, if the vibration stress application time is greater than or equal to the second predetermined value, defects are more likely to occur. Therefore, the main control unit sets the execution interval to be shorter, thereby enabling early detection of defects. Conversely, if the vibration stress application time is less than or equal to the second predetermined value, defects are less likely to occur. Therefore, the main control unit sets the execution interval to be longer, thereby preventing an increase in the amount of test data.

In the above configuration, the test control unit performs the boundary scan test multiple times on the circuit board, and the main control unit adjusts the execution interval of the boundary scan test according to the detection of defects by the boundary scan test.

When this pattern is followed, the main control unit adjusts the execution interval of the boundary scan test according to the detection status of defects. Therefore, when a certain number of defects are detected, indicating that other defects are more likely to occur, the main control unit sets a shorter execution interval to detect other defects earlier. Conversely, when a certain number of defects are not detected, indicating that defects are more difficult to occur, the main control unit sets a longer execution interval to prevent an increase in the amount of test data.

In the above scenario, the main control unit makes the execution interval of the boundary scan test narrower when the number of defects detected by the boundary scan test is at or above the third predetermined value, compared to the case where the number of defects detected by the boundary scan test is less than the third predetermined value.

When following this pattern, if the number of defects detected by the boundary scan test is above the third predetermined value, other defects are more likely to occur. Therefore, the main control unit sets a shorter execution interval to detect other defects earlier. Conversely, if the number of defects detected by the boundary scan test is below the third predetermined value, defects are less likely to occur. Therefore, the main control unit sets a longer execution interval to avoid increasing the amount of test data.

In the above configuration, the at least one circuit board includes a first circuit board and a second circuit board. The test control unit performs the boundary scan test multiple times for each of the first circuit board and the second circuit board. The main control unit makes the execution interval of the boundary scan test for the second circuit board different according to the detection of defects in the boundary scan test of the first circuit board.

When this configuration is applied, the main control unit adjusts the execution interval for the boundary scan test of the second circuit board based on the detection status of defects found during the boundary scan test of the first circuit board. Therefore, when a certain number of defects are detected in the first circuit board, and defects are also more likely to occur in the second circuit board, the main control unit sets a shorter execution interval for the second circuit board to detect defects earlier. Conversely, when a certain number of defects are not detected in the first circuit board, and defects are less likely to occur in the second circuit board, the main control unit sets a longer execution interval for the second circuit board to prevent an increase in the amount of test data.

In the above configuration, when the number of defects detected by the boundary scan test of the first circuit board is a fourth predetermined value or higher, the main control unit makes the execution interval of the boundary scan test of the second circuit board narrower compared to the case where the number of defects detected by the boundary scan test of the first circuit board is less than the fourth predetermined value.

When this condition is met, if the number of defects detected by the boundary scan test of the first circuit board is 4 or higher, defects are also more likely to occur in the second circuit board. Therefore, the main control unit sets a shorter execution interval for the second circuit board to detect defects earlier. Conversely, if the number of defects detected by the boundary scan test of the first circuit board is less than 4, defects are also less likely to occur in the second circuit board. Therefore, the main control unit sets a longer execution interval for the second circuit board to avoid increasing the amount of test data.

In the above configuration, the environment forming device can also apply temperature stress to the circuit board, the test control unit performs the boundary scan test multiple times on the circuit board, and the main control unit makes the execution interval of the boundary scan test different according to the application conditions of the temperature stress.

When this condition is met, the main control unit adjusts the execution interval of the boundary scan test according to the applied temperature stress conditions. Therefore, when the applied temperature stress conditions are more likely to produce defects, the main control unit sets a shorter execution interval to detect defects early. Conversely, when the applied temperature stress conditions are less likely to produce defects, the main control unit sets a longer execution interval to avoid increasing the amount of test data.

In the above configuration, the main control unit compares the period during which the temperature stress is in a transitional phase with the period during which the temperature stress is not in a transitional phase, thereby making the execution interval of the boundary scan test narrower.

When following this pattern, defects are more likely to occur during the transition period of temperature stress. Therefore, the main control unit sets a shorter execution interval to detect defects early. Conversely, defects are less likely to occur during the transition period of temperature stress. Therefore, the main control unit sets a longer execution interval to avoid increasing the amount of test data.

In the above configuration, the at least one circuit board is a plurality of circuit boards. The test control unit performs the boundary scan test on each of the plurality of circuit boards. It also includes a connection switching unit that can switch the connection between the test control unit and the plurality of circuit boards housed in the environment forming apparatus, such that one of the circuit boards is connected to the test control unit. The main control unit, after the environment forming apparatus applies the vibration stress to the plurality of circuit boards, allows the connection switching unit to repeatedly perform the connection processing of sequentially connecting one circuit board to the test control unit, and is linked with the connection processing to allow the test control unit to perform the boundary scan test on that circuit board.

When this configuration is followed, the connection switching unit repeatedly performs the connection processing, sequentially connecting one circuit board to the test control unit. The test control unit, in conjunction with this connection processing, performs boundary scan tests on one circuit board. By using a single test control unit to continuously perform boundary scan tests on each of multiple circuit boards, boundary scan tests on multiple circuit boards can be performed efficiently. As a result, testing costs are reduced.

In the above-described state, the environment forming device is a HALT testing device, a HASS testing device, or a HASA testing device.

When this condition is met, the environment-forming apparatus uses a HALT test apparatus, a HASS test apparatus, or a HASA test apparatus, thereby applying 6-DOF vibrational stress and rapidly changing temperature stress over a wide temperature range to the circuit board. As a result, it effectively promotes the generation of defects in the circuit board.

An inspection system according to one embodiment of the present invention includes: an environment forming apparatus capable of accommodating at least one circuit board as the object of inspection; and an inspection device communicatively connected to the environment forming apparatus; the inspection device includes: a test control unit for controlling boundary scan testing of the circuit board; and a main control unit; the main control unit causes the test control unit to perform the boundary scan test on the circuit board when the environment forming apparatus applies vibration stress of 3 degrees of freedom or more to the circuit board.

In this configuration, the circuit board to be inspected is housed in an environment forming apparatus. The main control unit applies vibration stress of 3 or more degrees of freedom to the circuit board under these conditions, while the test control unit performs a boundary scan test on the circuit board. By applying vibration stress of 3 or more degrees of freedom—which would occur under actual product use, or even beyond the assumed range of actual product use—to the circuit board, a boundary scan test is performed. This facilitates the identification of defects in the circuit board and allows for high-precision assessment of the defect locations. As a result, the required testing time can be reduced, thereby improving the reliability of the actual product.

The inspection method of this invention includes: applying a vibration stress of 3 degrees of freedom or more to at least one circuit board contained in an environment forming apparatus; and performing a boundary scan test on the circuit board while the vibration stress is applied to it by the environment forming apparatus.

When this is performed, the circuit board to be inspected is contained in an environment forming apparatus, which applies vibration stress of 3 or more degrees of freedom to the circuit board and performs a boundary scan test on the circuit board. In this way, by applying vibration stress of 3 or more degrees of freedom—which would occur in actual product use, or even beyond the assumed range of actual product use—to the circuit board, a boundary scan test is performed. This facilitates the identification of defects in the circuit board and allows for high-precision assessment of the defect locations. As a result, it is possible to reduce the testing time and improve the reliability of the actual product.

1: Inspection System 2,2A: Inspection Device 3: Environment Forming Device 11: System Controller 12: Cavity Monitor 13: Test Controller 14: Memory Unit 15: Display Unit 16: Communication Unit 17: Relay Unit 18: Scanner Unit 21: Communication Unit 22: Environment Controller 23: Air Conditioning Room 24: Cavity 25: Frame 26: Blower 27: Heater 28: Nozzle 29: Piping 30: Valve 31: Tank 32: Vibration Table 33: Spring 34: Support Component 35: Actuator 36: Vibration Detector 37: Temperature Detector 38: Fixture 40: Wire 41: Exhaust Port 42: Air Inlet 100: Circuit Board

[Figure 1] is a simplified diagram illustrating the structure of the inspection system according to an embodiment of the present invention. [Figure 2] is a simplified block diagram illustrating the structure of the inspection device. [Figure 3] is a simplified block diagram illustrating the structure of the environment forming device. [Figure 4] is a diagram illustrating a first example of the application mode of vibration stress to the circuit board. [Figure 5] is a diagram illustrating a second example of the application mode of vibration stress to the circuit board. [Figure 6] is a diagram illustrating a third example of the application mode of vibration stress to the circuit board. [Figure 7] is a diagram illustrating a fourth example of the application mode of vibration stress to the circuit board. [Figure 8] is a diagram illustrating a fifth example of the application mode of vibration stress to the circuit board. [Figure 9] is a diagram showing the first example of the execution time for a boundary scan test of a circuit board. [Figure 10] is a diagram showing the second example of the execution time for a boundary scan test of a circuit board. [Figure 11] is a diagram showing the third example of the execution time for a boundary scan test of a circuit board. [Figure 12] is a diagram showing the fourth example of the execution time for a boundary scan test of a circuit board. [Figure 13] is a block diagram showing the simplified structure of a deformation inspection device. [Figure 14] is a diagram showing the simplified structure of a scanner unit.

2A: Inspection Device

11: System Controller

12: Cavity Monitor

13: Test Controller

14: Memory Section

15: Display Section

16: Communications Department

17: Relay Unit

21: Communications Department

40: Wires

100: Circuit board

Claims (3)

An inspection device communicatively connected to an environment forming apparatus that can house a plurality of circuit boards as inspection objects, comprising: a test control unit that controls boundary scan testing of each of the plurality of circuit boards; a connection switching unit that can switch the connection between the test control unit and the plurality of circuit boards housed in the environment forming apparatus, such that one of the circuit boards is connected to the test control unit; and a main control unit that, when the environment forming apparatus applies vibration stress of 3 degrees of freedom or more to the plurality of circuit boards, causes the connection switching unit to repeatedly perform connection processing of sequentially connecting the circuit board to the test control unit. The connection processing is linked to the test control unit, which performs a boundary scan test on the circuit board. An inspection system includes: an environment forming apparatus for accommodating a plurality of circuit boards as objects of inspection; and an inspection device communicatively connected to the environment forming apparatus, the inspection device comprising: a test control unit for controlling boundary scan testing of each of the plurality of circuit boards; a connection switching unit for switching the connection between the test control unit and the plurality of circuit boards housed in the environment forming apparatus, such that one of the plurality of circuit boards is connected to the test control unit; and a main control unit, the main control unit operates when the environment forming apparatus applies vibration stress of three or more degrees of freedom to the plurality of circuit boards, The connection switching unit repeatedly performs the connection processing of sequentially connecting the circuit board to the test control unit. In conjunction with this connection processing, the test control unit performs the boundary scan test on the circuit board. A method for inspection includes: applying a vibrational stress of three or more degrees of freedom to a plurality of circuit boards housed in an environment forming apparatus; switching the connection between a test control unit and the plurality of circuit boards housed in the environment forming apparatus, such that one of the circuit boards is connected to a test control unit that controls boundary scan testing of each of the plurality of circuit boards; while the vibrational stress is applied to the plurality of circuit boards by the environment forming apparatus, repeatedly performing a connection process that sequentially connects the circuit board to the test control unit, thereby coordinating the connection process to cause the test control unit to perform the boundary scan test on the circuit board.