TWI862034B - Bandgap voltage generating circuits, electronic chips, and information processing devices - Google Patents

Abstract

The present invention mainly discloses a bandgap voltage generating circuit, comprising: a bias voltage generating module, a compensation current generating module and a bandgap voltage generating module, wherein the bias voltage generating module is used to generate a first bias voltage and a second bias voltage to be transmitted to the bandgap voltage generating module, and the compensation current generating module is used to generate a first compensation current and a second compensation current to be transmitted to the bandgap voltage generating module. According to the design of the present invention, the first compensation current and the second compensation current compensate the base current of the BJT element on the output side of the bandgap voltage generating module, so that the BJT element The bandgap voltage generating module is subjected to a nonlinear compensation so that it can provide a stable bandgap voltage. .

Description

Bandgap voltage generating circuits, electronic chips, and information processing devices

The present invention relates to the field of integrated circuit technology, particularly to a current-mode bandgap voltage generating circuit with curvature compensation.

It is known that bandgap voltage reference (BGR) is widely used in power management chips, mixed signal circuits, and sensor chips. It can be seen that it is indispensable in the construction of electronic circuits. FIG1 is a circuit topology diagram of a known bandgap voltage generating circuit. As shown in FIG1, the known bandgap voltage generating circuit 1a includes: an operational amplifier 11a, a first MOSFET element M1a, a second MOSFET element M2a, a first BJT element Q1a, at least one second BJT element Q2a, a first resistor R1a, a second resistor R2a, and a variable resistor Rva, and its output bandgap voltage V _BG can be calculated using the following formula (1):

_In the above formula (1), VBE1 is a negative temperature coefficient term, _VT.lnN is a positive _temperature coefficient term, VT is thermal _voltage , R1 is the resistance value of the first resistor R1a, R2 is the resistance value of the second resistor R2a, and N is the quantity ratio or component area ratio between Q2a and Q1a. Therefore, it can be seen from formula ₁ that by adjusting R1 , R2 and N, _the absolute values of positive and negative temperature coefficients can be controlled to be equal, and finally _{a VBG} with a zero temperature coefficient _is obtained.

However, the drift or error of process parameters will cause the thermoelectric voltage and positive and negative temperature coefficients at room temperature to deviate from the ideal values. In this case, the deviation proportional to absolute temperature (PTAT) can be corrected by adjusting the variable resistor Rva, but the deviation not proportional to absolute temperature (non-PTAT) cannot be corrected by adjustment.

From the above description, it can be seen that a new type of bandgap voltage generating circuit is urgently needed in this field.

The main purpose of the present invention is to provide a bandgap voltage circuit, which includes: a bias voltage generating module, a compensation current generating module and a bandgap voltage generating module, wherein the bias voltage generating module is used to generate a first bias voltage and a second bias voltage to be transmitted to the bandgap voltage generating module, and the compensation current generating module is used to generate a first compensation current and a second compensation current to be transmitted to the bandgap voltage generating module. According to the design of the present invention, the first compensation current and the second compensation current compensate the base current of the BJT element on the output side of the bandgap voltage generating module, so that the V _BE of the BJT element receives a nonlinear compensation, thereby enabling the bandgap voltage generating module to provide a stable bandgap voltage V _BG .

The bandgap voltage circuit of the present invention has the following advantages: (1) it does not include an operational amplifier, thus avoiding the influence of input offset voltage ( V _OS ); (2) it provides two compensation schemes for non-PTAT deviations: (a) using the nonlinearity of current gain (β) to compensate for the high-order nonlinearity of V _BE ; and (b) using base current compensation to solve the V _BE error caused by the change of current gain (β).

To achieve the above-mentioned purpose, the present invention proposes an embodiment of the bandgap voltage circuit, which includes: a bias voltage generating module, coupled to a first wire and a second wire, wherein the first wire is coupled to a first working voltage and the second wire is coupled to a second working voltage, so that the bias voltage generating module is biased between the first working voltage and the second working voltage, and is used to generate a first bias voltage and a second bias voltage; a compensation current generating module, also coupled to the first wire and the second wire, so as to be biased between the first working voltage and the second working voltage, and is used to generate a A first compensation current and a second compensation current; and a bandgap voltage generating module, coupling the bias voltage generating module and the compensation current generating module, and comprising: a first BJT element, a base terminal and a collector terminal of which are coupled to a first compensation point, and an emitter terminal of which is coupled to the second working voltage; a first resistor, having a first end and a second end, and the second end is coupled to the first compensation point; a second resistor, having a first end and a second end, and the second end and the first end of the first resistor are coupled to a second compensation point; a first current generating unit, having a first electrical terminal, a second electrical terminal, a first control terminal and a second control terminal, wherein the first electrical terminal and the first terminal of the second resistor are coupled to a voltage output terminal, the second electrical terminal is coupled to the first working voltage, the first control terminal is coupled to the first bias voltage, the second control terminal is coupled to the second bias voltage, and the first current generating unit transmits a PTAT current proportional to the absolute temperature to flow into the second resistor through the first electrical terminal; a second BJT element, wherein a base terminal and a collector terminal are respectively coupled to a source terminal and a gate terminal of a MOSFET element, and an emitter terminal is coupled to the second working voltage; wherein , the MOSFET element is also coupled to the compensation current generating module with a drain terminal; and a second current generating unit, having a first electrical terminal, a second electrical terminal, a first control terminal, and a second control terminal, wherein the first electrical terminal is coupled to a common connection point between the collector terminal of the second BJT element and the gate terminal of the MOSFET element, the second electrical terminal is coupled to the first working voltage, the first control terminal is coupled to the first bias voltage, the second control terminal is coupled to the second bias voltage, and the second current generating unit transmits a current into the common connection point with the first electrical terminal.

In one embodiment, the bias voltage generating module includes: a reference current generating unit, coupled to the first wire and the second wire, biased between the first working voltage and the second working voltage, for generating a reference current; a current replicating unit, coupled to the first wire and the second wire, biased between the first working voltage and the second working voltage, and coupled to the reference current generating unit through the first wire and the second wire; and a current generating unit, coupled to the first wire and the second wire, biased between the first working voltage and the second working voltage, and The current replicating unit and the reference current generating unit are coupled via the first wire and the second wire; wherein the current replicating unit transmits the reference current to the current generating unit, so that the current generating unit generates a collector current proportional to the absolute temperature, the second bias voltage and the first bias voltage based on the reference current; wherein the current generating unit transmits the first bias voltage and the second bias voltage back to the reference current generating unit, so that the reference current generating unit provides the stable reference current under the bias of the first working voltage, the first bias voltage and the second bias voltage.

In one embodiment, the reference current generating unit of the bias voltage generating module includes: a first current mirror having a first end, a second end, a third end, a fourth end, and an internal contact, wherein the second end is coupled to the second bias voltage, and the third end and the fourth end are both coupled to the second working voltage; a third current generating unit having a first electrical end, a second electrical end, and a third electrical end, wherein the first electrical end is coupled to the first end of the first current mirror, the second electrical end is coupled to the first working voltage, and the third electrical end is coupled to a ground end, and the third current generating unit transmits a current through the first electrical end to flow into the first end of the first current mirror. ; a second current mirror having a first end, a second end, a third end, and a fourth end, wherein the second end is coupled to the internal contact of the first current mirror, and the third end and the fourth end are both coupled to the second working voltage; and a fourth current generating unit having a first electrical end, a second electrical end, a first control end, and a second control end, wherein the first electrical end is coupled to the first end of the second current mirror, the second electrical end is coupled to the first working voltage, the first control end is coupled to the first bias voltage, the second control end is coupled to the second bias voltage, and the fourth current generating unit transmits a current through the first electrical end thereof into the first end of the second current mirror.

In one embodiment, the current replicating unit of the bias voltage generating module includes: a third current mirror having a first terminal, a second terminal, a third terminal, and a fourth terminal, wherein the third terminal and the fourth terminal are both coupled to the first operating voltage; and a MOSFET transmission element having a gate terminal, a drain terminal, and a source terminal, wherein the drain terminal is coupled to the first terminal of the third current mirror, and the source terminal is coupled to the second operating voltage.

In one embodiment, the current generating unit of the bias voltage generating module includes: a first current mirror group formed by stacking S current mirrors, wherein S is a positive integer of at least 2, and the first current mirror group has a first end, a second end, a third end, a fourth end, a fifth end, a first terminal, and a second terminal, wherein the first end is coupled to the gate terminal of the MOSFET transmission element, the first terminal is used to send the first bias voltage, the second terminal is used to send the second bias voltage, and the fourth terminal and the fifth terminal are both coupled to the first working voltage; a third BJT element, having a base terminal, an emitter terminal and a collector terminal, wherein the emitter terminal is coupled to the first current The second end of the current mirror group is coupled to the collector end, and the collector end is coupled to the second working voltage; a base resistor having a first end and a second end, and the first end is coupled to the base end of the third BJT element; a fourth BJT element having a base end, an emitter end and a collector end, wherein the base end is coupled to the second end of the base resistor, and the emitter end is coupled to the third end of the first current mirror group; and an emitter resistor having a first end and a second end, wherein the first end is coupled to the collector end of the fourth BJT element, and the second end is coupled to the second working voltage; wherein the second end of the third current mirror is coupled to a common point between the second end of the base resistor and the base end of the fourth BJT element.

In one embodiment, the compensation current generating module includes: a resistor having a first end and a second end; a second current mirror set formed by stacking two current mirrors, having a first end, a second end, a third end, a fourth end, a first terminal, and a second terminal, wherein the first end and the first terminal are both coupled to the first end of the resistor, the second terminal is coupled to the second end of the resistor, the second end is used to output the second compensation current, and the third end and the fourth end are both coupled to the first working voltage; a first MOSFET transmission element, It has a gate terminal, a drain terminal and a source terminal, wherein the gate terminal is coupled to the first terminal of the second current mirror set, and the source terminal is coupled to the first working voltage; and a second MOSFET transmission element, having a gate terminal, a drain terminal and a source terminal, wherein the gate terminal is coupled to the second terminal of the second current mirror set, the source terminal is coupled to the drain terminal of the first MOSFET transmission element, and the drain terminal is used to output the first compensation current; wherein the second end of the resistor is simultaneously coupled to the drain terminal of the MOSFET element.

In one embodiment, the first current generating unit, the second current generating unit and the fourth current generating unit all include: a resistor having a first end and a second end, and the first end is coupled to the first working voltage; and a resistor string formed by stacking two P-type MOSFET elements, having a first end, a second end, a first signal input end, and a second signal input end, wherein the first end is coupled to the second end of the resistor, the first signal input end is coupled to the first bias voltage, and the second signal input end is coupled to the second bias voltage.

In one embodiment, the third current generating unit includes: a resistor having a first end and a second end, and the second end is coupled to the ground end; and a resistor string formed by stacking Q P-type MOSFET elements, wherein Q is a positive integer of at least 2, each of the P-type MOSFET elements is coupled to the first end of the resistor with its gate terminal, and the Qth P-type MOSFET element is coupled to the first end of the first current mirror with its drain terminal.

Furthermore, the present invention also provides an integrated circuit chip, which is characterized in that it includes the bandgap voltage generating circuit of the present invention as described above.

In one embodiment, the integrated circuit chip is any one selected from the group consisting of a sensor chip, a system on chip (SoC), an application specific integrated circuit (ASIC) chip, a microcontroller chip, a processor chip, a graphics chip, a display driver chip, a touch chip, a touch and display integration (TDDI) chip, a fingerprint recognition chip, and an automotive electronic chip.

Furthermore, the present invention also provides an information processing device having at least one integrated circuit chip; and, its characteristic is that the integrated circuit chip includes the bandgap voltage generating circuit of the present invention as described above. In a feasible embodiment, the information processing device is an electronic device selected from the group consisting of a sensing device, a display device, a smart TV, a smart phone, a smart watch, a smart bracelet, a head-mounted display device, a tablet computer, a desktop computer, a laptop computer, an all-in-one computer, an industrial computer, a server computer, an ATM, an interactive information service station (KIOSK), an electronic device as a point of sales (POS), an in-vehicle entertainment system, an access control device, a fingerprint punching device, and an electronic door lock.

1a: Bandgap voltage generating circuit

11a: Operational amplifier

M1a: First MOSFET element

M2a: Second MOSFET element

Q1a: First BJT component

Q2a: Second BJT component

R1a: first resistor

R2a: first resistor

Rva: variable resistor

1: Bandgap voltage generating circuit

11: Bias voltage generation module

111: First current mirror

112: The third current generating unit

113: Second current mirror

114: Fourth current generating unit

115: The third current mirror

116: MOSFET transmission element

117: First current mirror set

1171: First end

1172: Second end

1173: The third end

1174: The fourth end

1175: The fifth end

1176: First endpoint

1177: Second endpoint

1178: Second endpoint

12: Compensation current generation module

13: Bandgap voltage generation module

131: First current generating unit

132: Second current generating unit

133: MOSFET components

Q1: The first BJT component

Q2: Second BJT component

Q3: The third BJT component

Q4: The fourth BJT component

R1: first resistor

R2: Second resistor

R3: The third resistor

R4: The fourth resistor

R5: The fifth resistor

R0: resistance

R _C : Base resistance

R _B : Emitter resistance

121: Second current mirror set

1211: First end

1212: Second end

1213: The third end

1214: The fourth end

1215: First endpoint

1216: Second endpoint

122: First MOSFET transmission element

123: Second MOSFET transmission element

FIG. 1 is a known bandgap voltage generating circuit; FIG. 2 is a block diagram of a bandgap voltage generating circuit of the present invention; FIG. 3 is a circuit topology diagram of the compensation current generating module and the bandgap voltage generating module shown in FIG. 2; FIG. 4 is a circuit topology diagram of the bias voltage generating module shown in FIG. 2; and FIG. 5 is a graph of multiple nonlinear voltage curves relative to temperature.

In order to enable the review committee to further understand the structure, features, purpose, and advantages of the present invention, the detailed description of the drawings and preferred specific embodiments is attached as follows.

Please refer to FIG2, which is a block diagram of a bandgap voltage generating circuit of the present invention. As shown in FIG2, the bandgap voltage generating circuit 1 of the present invention includes: a bias voltage generating module 11, a compensation current generating module 12 and a bandgap voltage generating module 13, wherein the bias voltage generating module 11 is coupled to a first wire and a second wire, and the first wire is coupled to a first working voltage and the second wire is coupled to a second working voltage, so that the bias voltage generating module is biased between a first working voltage AVDD and a second working voltage AVSS, and is used to generate a first bias voltage vbp and a second bias voltage vbpc. Furthermore, the compensation current generating module 12 is also coupled to the first wire and the second wire, so as to be biased between the first working voltage AVDD and the second working voltage AVSS, and is used to generate a first compensation current I _C _ comp and a second compensation current I _B _ comp .

FIG3 is a circuit topology diagram of the compensation current generating module and the bandgap voltage generating module shown in FIG2. As shown in FIG2 and FIG3, the bandgap voltage generating module 13 couples the bias voltage generating module 11 and the compensation current generating module 12, and includes: a first BJT element Q1, a first resistor R1, a second resistor R2, a first current generating unit 131, a second BJT element Q2, and a second current generating unit 132.

Compared with the known bandgap voltage generating module 1a shown in FIG1 , it can be found that the present invention replaces the second MOSFET element M2a for generating _{the current IC} + I _B in FIG1 with the first current generating unit 131, and replaces the first MOSFET element M1a in FIG1 with the second current generating unit 132. More importantly, the present invention couples a MOSFET element 133 and a compensation current generating module 12 between a first circuit unit composed of the first current generating unit 131, the first resistor R1, the second resistor R2, and the first BJT element Q1 and a second circuit unit composed of the second current generating unit 132 and the second BJT element Q2.

As shown in FIG3 , a base terminal and a collector terminal of the first BJT element Q1 are coupled to a first compensation point V _BE , and an emitter terminal thereof is coupled to the second operating voltage AVSS. Furthermore, the first resistor R1 has a first end and a second end, wherein the second end is coupled to the first compensation point V _BE . On the other hand, the second resistor R2 has a first end and a second end, and the second end and the first end of the first resistor R1 are coupled to a second compensation point. According to the design of the present invention, the first current generating unit 131 includes a resistor and a resistor string formed by stacking two P-type MOSFET elements, and has a first electrical end, a second electrical end, a first control end, and a second control end externally, wherein the first electrical end and the first end of the second resistor R2 are coupled to a voltage output end (i.e., for outputting a bandgap voltage V _BG ), the second electrical end is coupled to the first operating voltage AVDD, the first control end is coupled to the first bias voltage vbp, and the second control end is coupled to the second bias voltage vbpc. With such a design, under the biasing of the first operating voltage AVDD, the first bias voltage vbp and the second bias voltage vbpc, the first current generating unit 131 transmits a PTAT (Proportional to absolute temperature) current I _PTAT proportional to absolute temperature through the first electrical end thereof to flow into the second resistor R2.

To explain in more detail, in the circuit topology of the first current generating unit 131, the resistor has a first end and a second end, and the first end is coupled to the first working voltage AVDD. In addition, the resistor string has a first end, a second end, a first signal input end, and a second signal input end, wherein the first end is coupled to the second end of the resistor, the first signal input end (i.e., the first control end of the first current generating unit 131) is coupled to the first bias voltage vbp, and the second signal input end (i.e., the second control end of the first current generating unit 131) is coupled to the second bias voltage vbpc.

Relative to the first BJT element Q1, a base terminal and a collector terminal of the second BJT element Q2 are respectively coupled to a source terminal and a gate terminal of the MOSFET element 133, and an emitter terminal thereof is coupled to the second working voltage AVSS. In addition, the MOSFET element 133 is also coupled to the compensation current generating module 12 at a drain terminal thereof. As shown in FIG. 3 , the second current generating unit 132 also includes a resistor and a resistor string formed by stacking two P-type MOSFET elements, and has a first electrical terminal, a second electrical terminal, a first control terminal, and a second control terminal, wherein the first electrical terminal is coupled to a common point between the collector terminal of the second BJT element Q2 and the gate terminal of the MOSFET element 133, the second electrical terminal is coupled to the first operating voltage AVDD, the first control terminal is coupled to the first bias voltage vbp, and the second control terminal is coupled to the second bias voltage vbpc. In this way, under the biasing of the first operating voltage AVDD, the first bias voltage vbp, and the second bias voltage vbpc, the second current generating unit 132 transmits a current through its first electrical terminal to flow into the aforementioned common point.

It is additionally explained that in the circuit topology of the second current generating unit 132, the resistor has a first end and a second end, and the first end is coupled to the first working voltage AVDD. In addition, the resistor string has a first end, a second end, a first signal input end, and a second signal input end, wherein the first end is coupled to the second end of the resistor, the first signal input end (i.e., the first control end of the second current generating unit 132) is coupled to the first bias voltage vbp, and the second signal input end (i.e., the second control end of the second current generating unit 132) is coupled to the second bias voltage vbpc.

In summary, the bias voltage generating module 11 is used to generate a first bias voltage vbp and a second bias voltage vbpc and transmit them to the _bandgap voltage generating module 13, and the compensation current generating module 12 is used to generate a first compensation current IC_comp and a second compensation current IB_comp and transmit _them to the bandgap voltage generating module 13. In this way, the first compensation current IC_comp _and the second compensation current IB_comp compensate the base current of the first BJT element Q1 on the output side of _the bandgap voltage generating module 13, so that the terminal voltage VBE above the first compensation point (i.e., the common connection point of the base and collector terminals of Q1 ₎ is subjected to a nonlinear compensation, thereby enabling the bandgap voltage generating module 13 to provide _a stable bandgap voltage VBG .

Further, Fig. 4 is a circuit topology diagram of the bias voltage generating module 11 shown in Fig. 2. As shown in Fig. 2 and Fig. 4, the bias voltage generating module 11 includes a reference current generating unit, a current replicating unit and a current generating unit, wherein the reference current generating unit is coupled to the first wire and the second wire so as to be biased between the first working voltage AVDD and the second working voltage AVSS, and includes: a first current mirror 111, a third current generating unit 112, a second current mirror 113, and a fourth current generating unit 114. According to the design of the present invention, the first current mirror 111 is composed of two N-type MOSFET elements, and has a first end, a second end, a third end, a fourth end, and an internal contact, wherein the second end is coupled to the second bias voltage vbpc, and the third end and the fourth end are both coupled to the second operating voltage AVSS. Similarly, the second current mirror 113 is also composed of two N-type MOSFET elements, and has a first end, a second end, a third end, a fourth end, and an internal contact, wherein the second end is coupled to the internal contact of the first current mirror 111, and the third end and the fourth end are both coupled to the second operating voltage AVSS.

To explain in more detail, the third current generating unit 112 includes a resistor and a resistor string formed by stacking Q P-type MOSFET elements, wherein Q is a positive integer of at least 2. As shown in FIG4 , the resistor has a first end and a second end, and the second end is coupled to the ground end. Furthermore, each of the P-type MOSFET elements is coupled to the first end of the resistor with its gate end, and the Qth P-type MOSFET element is coupled to the first end of the first current mirror 111 with its drain. According to the design of the present invention, the third current generating unit 112 has a first electrical end, a second electrical end and a third electrical end to the outside, wherein the first electrical end is coupled to the first end of the first current mirror 111, the second electrical end is coupled to the first operating voltage AVDD, and the third electrical end is coupled to a ground end. In this way, under the bias of the first working voltage AVDD, the third current generating unit 112 transmits a current through its first electrical end to flow into the first end of the first current mirror 111.

As shown in FIG4 , the fourth current generating unit 114 includes a resistor and a resistor string formed by stacking two P-type MOSFET elements, and has a first electrical end, a second electrical end, a first control end, and a second control end, wherein the first electrical end is coupled to the first end of the second current mirror 113, the second electrical end is coupled to the first working voltage AVDD, the first control end is coupled to the first bias voltage vbp, and the second control end is coupled to the second bias voltage vbpc. In this way, under the bias of the first working voltage AVDD, the first bias voltage vbp and the second bias voltage vbpc, the fourth current generating unit 114 transmits a current through its first electrical end to flow into the first end of the second current mirror 113.

According to the design of the present invention, the current replicating unit is coupled to the first wire and the second wire, thereby biased between the first working voltage AVDD and the second working voltage AVSS, and coupled to the reference current generating unit through the first wire and the second wire. In addition, the current generating unit is also coupled to the first wire and the second wire, thereby biased between the first working voltage and the second working voltage. Therefore, it can be understood that the current generating unit couples the current replicating unit and the reference current generating unit through the first wire and the second wire, so that the current replicating unit can replicate a reference current generated by the reference current generating unit to the current generating unit, so that the current generating unit generates a collector current IC proportional to an absolute temperature based on the reference current, the first bias voltage vbp and the second bias voltage vbpc. As shown in _FIG4 , the current replicating unit includes a third current mirror 115 and a MOSFET transmission element 116, wherein the third current mirror 115 is composed of two P-type MOSFETs and has a first terminal, a second terminal, and a third terminal and a fourth terminal coupled to the first working voltage AVDD. On the other hand, the MOSFET pass element 116 (ie, pass element) has a gate terminal, a drain terminal, and a source terminal, wherein the drain terminal is coupled to the first terminal of the third current mirror 115, and the source terminal is coupled to the second operating voltage AVSS.

As shown in FIG. 4 , the current generating unit is biased between the first operating voltage AVDD and the second operating voltage AVSS, and is configured to feed the first bias voltage vbp and the second bias voltage vbpc back to the first current mirror 111 and the fourth current generating unit 114 of the reference current generating unit, so that the reference current generating unit provides the stable reference current under the bias of the first operating voltage AVDD, the first bias voltage vbp and the second bias voltage vbpc. According to the design of the present invention, the current generating unit includes: a first current mirror set 117, a third BJT element _{Q3, a base resistor RC} , a fourth BJT element Q4, and _{an emitter resistor RB} , wherein the first current mirror set 117 is a multiplier current mirror formed by stacking S current mirrors, so S is a positive integer of at least 2. In an exemplary embodiment, as shown in FIG4 , the first current mirror set 117 is formed by stacking the first current mirror, the second current mirror, and the third current mirror from high to low, wherein a third resistor R3 is coupled between the third current mirror and the second current mirror. Furthermore, the first current mirror assembly 117 has a first end 1171, a second end 1172, a third end 1173, a fourth end 1174, a fifth end 1175, a first terminal (i.e., the internal contact point of the first current mirror) 1176, a second terminal 1177 (i.e., the internal contact point of the second current mirror), and a third terminal 1178 (i.e., the internal contact point of the third current mirror). As shown in FIG4 , the third terminal 1178 is coupled to the first terminal 1171, the first terminal 1171 is coupled to the gate terminal of the MOSFET transmission element 116, the first terminal 1176 is used to send the first bias voltage vbp, the second terminal 1177 is used to send the second bias voltage vbpc, the fourth terminal 1174 and the fifth terminal 1175 are both coupled to the first operating voltage AVDD. It should be noted that in the circuit topology of the first current mirror assembly 117, the first terminal and the second terminal of the third resistor R3 are coupled to the first terminal 1176 and the second terminal 1177, respectively. Furthermore, a fourth resistor R4 is coupled between the fourth terminal 1174 and the first operating voltage AVDD, and a fifth resistor R5 is coupled between the fifth terminal 1175 and the first operating voltage AVDD. In this design, in the first current mirror set 117, the first current mirror and the second current mirror serve as current sources for the third current mirror, so that the third current mirror generates a collector current I _C proportional to the absolute temperature.

To explain in more detail, the third BJT element Q3 has a base terminal, an emitter terminal and a collector terminal, wherein the emitter terminal is coupled to the second terminal 1172 of the first current mirror group 117, and the collector terminal is coupled to the second operating voltage AVSS. In addition, the base _{resistor RC} has a first terminal and a second terminal, and the first terminal is coupled to the base terminal of the third BJT element Q3. As shown in FIG4, relative to the third BJT element Q3, the fourth BJT element Q4 has a base terminal, an emitter terminal and a collector terminal, wherein the base terminal is coupled to the second terminal of the base resistor _RC , and the emitter terminal is coupled to the third terminal 1173 of the first current mirror group 117. Furthermore, the emitter _{resistor RB} has a first end and a second end, and the first end is coupled to the collector end of the fourth BJT element Q4, and the second end is coupled to the second operating voltage _{AVSS. In addition, as shown in FIG4, the second end of the third current mirror 115 is coupled to a common point between the second end of the base resistor RC} and the base end of the fourth BJT element Q4.

In summary, in the bias voltage generating module 11, the current replicating unit transmits the reference current to the current generating unit, so that the current generating unit generates an absolute temperature-proportional collector current I _C , the second bias voltage vbpc and the first bias voltage vbp based on the reference current. In order to copy _{the collector current IC} to the bandgap voltage generating module 13, as shown in FIG3, the present invention sets the first current generating unit 131 and the second current generating unit 132 in the circuit topology of the bandgap voltage generating module 13, and utilizes the first terminal (i.e., the internal contact of the first current mirror) 1176 and the second terminal 1177 (i.e., the internal contact of the second current mirror) of the first current mirror group 117 to transmit the first bias voltage vbp and the second bias voltage vbpc to the first current generating unit 131 and the second current generating unit 132 respectively. In addition, the current generating unit also feeds the first bias voltage vbp and the second bias voltage vbpc back to the first current mirror 111 and the fourth current generating unit 114 of the reference current generating unit, so that the reference current generating unit provides the stable reference current under the bias of the first operating voltage AVDD, the first bias voltage vbp and the second bias voltage vbpc.

Referring to FIG. 3 again, the compensation current generating module 12 includes: a resistor R0, a second current mirror set 121 formed by stacking two current mirrors, a first MOSFET transmission element 122, and a second MOSFET transmission element 123. It should be understood that the second current mirror set 121 is also a multiplying current mirror, and has a first end 1211, a second end 1212, a third end 1213, a fourth end 1214, a first terminal 1215, and a second terminal 1216, wherein the first end 1211 and the first terminal 1215 (i.e., the internal contact of the first current mirror) are both coupled to the first end of the resistor R0, the second terminal 1216 (i.e., the internal contact of the second current mirror) is coupled to the second end of the resistor R0, the second end 1212 is used to output the second compensation current I _B _ comp , and the third end 1213 and the fourth end 1214 are both coupled to the first operating voltage AVDD. On the other hand, the first MOSFET transmission element 122 has a gate terminal, a drain terminal and a source terminal, wherein the gate terminal is coupled to the first terminal 1215 of the second current mirror set 121, and the source terminal is coupled to the first working voltage AVDD. In addition, the second MOSFET transmission element 123 has a gate terminal, a drain terminal and a source terminal, wherein the gate terminal is coupled to the second terminal (i.e., the internal contact of the first current mirror) 1216 of the second current mirror set 121, the source terminal is coupled to the drain terminal of the first MOSFET transmission element 122, and the drain terminal is used to output the first compensation current I _C _ comp . Furthermore, as shown in FIG. 4 , the second end of the resistor R0 is coupled to the drain end of the MOSFET element 133 .

As shown in Figure 4, let RB = RC , then the absolute temperature proportional collector _{current IC} can _be calculated using the _following formula (2):

，因此常規BJT元件的集極電流會是與絕對溫度成正比的帶曲率的電流。於上式(2)中，V _BE3為該第三BJT元件Q3的基極-射極電壓，V _BE4為該第四BJT元件Q4的基極-射極電壓，且N為第三BJT元件Q3和第四BJT元件Q4之間的數量比或元件面積比。因此，由式(2)可知，在該偏置電壓產生模塊11之中，該電流產生單元係產生不帶曲率的、與絕對溫度成正比的PTAT電流(即，集極電流I _C )。 Generally speaking, the collector current is positively correlated with the current gain (β) of the BJT element, and the current gain of the BJT element changes with temperature. In other words, for a single BJT element, it will have different β values at different temperatures, so multiple temperatures and corresponding multiple current gains can draw a nonlinear curve with curvature.

, so the collector current of the conventional BJT element will be a curvature current proportional to the absolute temperature. In the above formula (2), V _{BE 3} is the base-emitter voltage of the third BJT element Q3, V _{BE 4} is the base-emitter voltage of the fourth BJT element Q4, and N is the number ratio or element area ratio between the third BJT element Q3 and the fourth BJT element Q4. Therefore, it can be seen from formula (2) that in the bias voltage generating module 11, the current generating unit generates a PTAT current (i.e., collector current I _C ) without curvature and proportional to the absolute temperature.

Furthermore, as shown in FIG3 and FIG4, after the first bias voltage vbp and the second bias voltage vbpc are introduced into the first current generating unit 131 and the second current generating unit 132 of the bandgap voltage generating module 13, _{the collector current IC} without curvature and proportional to the absolute temperature is mirrored into a PTAT (Proportional to absolute temperature) current I _PTAT proportional to the absolute temperature and flows into the second resistor R2. It should be understood that, since the first BJT element Q1 and the second BJT element Q2 have the same element size, the current flowing through Q1 and Q2 is I _PTAT , so that Q1 and Q2 have the same base current. Therefore, the final bandgap reference voltage V _BG can be calculated using the following formulas (3) and (4): V _BG = V _{BE 2} + I _PTAT ( R ₁ + R ₂ )+ R ₁ ． I _C _ comp …………(3)

In the above equations (3) and (4), V _{BE 2} is the base-emitter voltage of the second BJT element Q2, R ₁ . I _C _ comp is the curvature compensation term, I _B is the base current, and a is the current multiplier of the first current mirror group 117 (i.e., the multiplier current mirror). In particular, the terminal voltage V _BE above the first compensation point (i.e., the common connection point of the base terminal and the collector terminal of Q1) can draw an open downward curve relative to the data points of different temperatures, as shown in FIG5. In contrast, R ₁ . I _C _ comp is a nonlinear voltage, which can draw an open upward curve relative to the data points of different temperatures. Therefore, the present invention utilizes the first compensation current IC_comp _and the second compensation current IB_comp to compensate the base current of the first BJT element Q1 on _the output side of the bandgap voltage generating module 13, so that the terminal voltage VBE on the first compensation point (i.e., the common connection point of the base terminal and the collector terminal of Q1) is subjected to a nonlinear _compensation , and _the compensated VBE can be calculated using the following formula (5):

In the above formula (5), IS is the reverse saturation _current of the PN junction, and IPTAT is a current without curvature that is proportional to the absolute temperature. Therefore, after compensation, VBE _does not include the temperature-dependent _β , which eliminates the non-PTAT error caused by the BJT current gain β. In summary, the bandgap voltage circuit of the present invention does not include an operational amplifier, thus avoiding the influence of input offset voltage ( V _OS ), and has the following two compensation schemes for non-PTAT deviations: (a) using the nonlinearity of current gain (β) to compensate for the high-order nonlinearity of V _BE ; and (b) using base current compensation to resolve V _BE errors caused by changes in current gain (β).

；以及 對照組II：不啟用該補償電流產生模塊12。 Furthermore, a verification experiment is performed on the bandgap voltage generating circuit 1 of the invention including the circuit topology shown in FIG. 2 and FIG. 3. The verification experiment includes the following groups: Experimental group: activating the compensation current generating module 12, so that the second compensation current I _B _ comp and the first compensation current I _C _ comp flow into the first compensation point V _BE and the second compensation point (as shown in FIG. 3 , the common point between R1 and R2); Control group I: blocking the first compensation current I _C _ comp from flowing into the second compensation point, and adjusting

; and control group II: the compensation current generating module 12 is not enabled.

The experimental data are shown in Table (1) below. As shown in Table (1) below, the temperature coefficient of the bandgap voltage V _BG without compensation technology (i.e., control group II) is 21μV/℃, the temperature coefficient of the bandgap voltage V _BG using only base current compensation is 16μV/℃, and the temperature coefficient of the bandgap voltage V BG using (a) the nonlinearity of the current gain (β) to compensate for the high-order nonlinearity of V _BE ; and ( b ₎ using the base current to compensate for the V _BE error caused by the change of the current gain (β) is only 8μV/℃. Therefore. Experimental data show that the bandgap voltage V _BG generated by the bandgap voltage generating circuit 1 of the present invention is less affected by temperature and therefore has high stability and high precision.

Thus, the above has completely and clearly explained the bandgap voltage generating circuit of the present invention; and, from the above, it can be known that the present invention has the following advantages:

(1) The present invention provides a bandgap voltage circuit, which includes: a bias voltage generating module, a compensation current generating module and a bandgap voltage generating module, wherein the bias voltage generating module is used to generate a first bias voltage and a second bias voltage to be transmitted to the bandgap voltage generating module, and the compensation current generating module is used to generate a first compensation current and a second compensation current to be transmitted to the bandgap voltage generating module. According to the design of the present invention, the first compensation current and the second compensation current compensate the base current of the BJT element on the output side of the bandgap voltage generating module, so that the V _BE of the BJT element receives a nonlinear compensation, thereby enabling the bandgap voltage generating module to provide a stable bandgap voltage V _BG .

(2) The bandgap voltage circuit of the present invention has the following advantages: (1) It does not include an operational amplifier, thus avoiding the influence of input offset voltage ( V _OS ); (2) It provides two compensation schemes for non-PTAT deviations: (a) using the nonlinearity of current gain (β) to compensate for the high-order nonlinearity of V _BE ; and (b) using base current compensation to solve the V _BE error caused by the change of current gain (β).

(3) In addition, the present invention also provides an integrated circuit chip, which is characterized in that it includes the bandgap voltage generating circuit of the present invention as described above. In one embodiment, the integrated circuit chip is selected from any one of the group consisting of a sensor chip, a system on chip (SoC), an application specific integrated circuit (ASIC) chip, a microcontroller chip, a processor chip, a graphics chip, a display driver chip, a touch chip, a touch and display integration (TDDI) chip, a fingerprint recognition chip, and an automotive electronic chip.

(4) Furthermore, the present invention also provides an information processing device having at least one integrated circuit chip; and, characterized in that the integrated circuit chip includes the bandgap voltage generating circuit of the present invention as described above. In a feasible embodiment, the information processing device is an electronic device selected from the group consisting of a sensing device, a display device, a smart TV, a smart phone, a smart watch, a smart bracelet, a head-mounted display device, a tablet computer, a desktop computer, a laptop computer, an all-in-one computer, an industrial computer, a server computer, an ATM, an interactive information service station (KIOSK), an electronic device as a point of sales (POS), an in-vehicle entertainment system, an access control device, a fingerprint punching device, and an electronic door lock.

It must be emphasized that the above-mentioned case is a preferred embodiment. Any partial changes or modifications that are derived from the technical ideas of this case and are easily inferred by people familiar with the art do not deviate from the scope of the patent rights of this case.

In summary, this case shows that it is very different from the known technology in terms of purpose, means and effect, and it is first of all practical and meets the patent requirements for invention. I sincerely ask the review committee to examine it carefully and grant a patent as soon as possible to benefit the society. This is my utmost prayer.

1: Bandgap voltage generating circuit

11: Bias voltage generation module

12: Compensation current generation module

13: Bandgap voltage generation module

Claims (10)

A bandgap voltage generating circuit includes: a bias voltage generating module coupled to a first wire and a second wire, wherein the first wire is coupled to a first working voltage and the second wire is coupled to a second working voltage, so that the bias voltage generating module is biased between the first working voltage and the second working voltage and is used to generate a first bias voltage and a second bias voltage; a compensation current A generating module is also coupled to the first wire and the second wire, so as to be biased between the first working voltage and the second working voltage, and used to generate a first compensation current and a second compensation current; and a bandgap voltage generating module is coupled to the bias voltage generating module and the compensation current generating module, and includes: a first BJT element, a base terminal and a collector terminal of which are coupled to a first compensation current. a compensation point, and an emitter end thereof is coupled to the second working voltage; a first resistor having a first end and a second end, and the second end is coupled to the first compensation point; a second resistor having a first end and a second end, and the second end and the first end of the first resistor are coupled to a second compensation point; a first current generating unit having a first electrical end, a second electrical end, a first control end, and a second control end, wherein the first electrical end and the first end of the second resistor are coupled to a voltage output end, the second electrical end is coupled to the first working voltage, the first control end is coupled to the first bias voltage, the second control end is coupled to the second bias voltage, and the first current generating unit transmits a PTAT (Proportional to absolute temperature) proportional to the absolute temperature through the first electrical end thereof temperature) current flows into the second resistor; a second BJT element, a base terminal and a collector terminal of which are respectively coupled to a source terminal and a gate terminal of a MOSFET element, and an emitter terminal of which is coupled to the second working voltage; wherein the MOSFET element is also coupled to the compensation current generating module at its drain terminal; and a second current generating unit, having a first electrical terminal, a second electrical terminal, and a A first control terminal and a second control terminal, wherein the first electrical terminal is coupled to a common point between the collector terminal of the second BJT element and the gate terminal of the MOSFET element, the second electrical terminal is coupled to the first working voltage, the first control terminal is coupled to the first bias voltage, the second control terminal is coupled to the second bias voltage, and the second current generating unit transmits a current into the common point through the first electrical terminal. A bandgap voltage generating circuit as described in claim 1, wherein the bias voltage generating module includes: a reference current generating unit, coupled to the first wire and the second wire, so as to be biased between the first working voltage and the second working voltage, for generating a reference current; a current replicating unit, coupled to the first wire and the second wire, so as to be biased between the first working voltage and the second working voltage, and the reference current generating unit is coupled through the first wire and the second wire; and a current generating unit, coupled to the first wire and the second wire, so as to be biased between the first working voltage and the second working voltage. voltage, and couples the current replicating unit and the reference current generating unit through the first wire and the second wire; wherein the current replicating unit transmits the reference current to the current generating unit, so that the current generating unit generates a collector current proportional to the absolute temperature, the second bias voltage and the first bias voltage based on the reference current; wherein the current generating unit transmits the first bias voltage and the second bias voltage back to the reference current generating unit, so that the reference current generating unit provides the stable reference current under the bias of the first working voltage, the first bias voltage and the second bias voltage. A bandgap voltage generating circuit as described in claim 2, wherein the reference current generating unit comprises: a first current mirror having a first end, a second end, a third end, a fourth end, and an internal contact, wherein the second end is coupled to the second bias voltage, and the third end and the fourth end are both coupled to the second working voltage; a third current generating unit having a first electrical end, a second electrical end, and a third electrical end, wherein the first electrical end is coupled to the first end of the first current mirror, the second electrical end is coupled to the first working voltage, and the third electrical end is coupled to a ground end, and the third current generating unit transmits a current through its first electrical end into the first end of the first current mirror. end; a second current mirror having a first end, a second end, a third end, and a fourth end, wherein the second end is coupled to the internal contact of the first current mirror, and the third end and the fourth end are both coupled to the second working voltage; and a fourth current generating unit having a first electrical end, a second electrical end, a first control end, and a second control end, wherein the first electrical end is coupled to the first end of the second current mirror, the second electrical end is coupled to the first working voltage, the first control end is coupled to the first bias voltage, the second control end is coupled to the second bias voltage, and the fourth current generating unit transmits a current through its first electrical end into the first end of the second current mirror. A bandgap voltage generating circuit as described in claim 3, wherein the current replicating unit comprises: a third current mirror having a first terminal, a second terminal, a third terminal, and a fourth terminal, wherein the third terminal and the fourth terminal are both coupled to the first operating voltage; and a MOSFET transmission element having a gate terminal, a drain terminal, and a source terminal, wherein the drain terminal is coupled to the first terminal of the third current mirror, and the source terminal is coupled to the second operating voltage. A bandgap voltage generating circuit as described in claim 4, wherein the current generating unit comprises: a first current mirror group formed by stacking S current mirrors, wherein S is a positive integer of at least 2, and the first current mirror group has a first terminal, a second terminal, a third terminal, a fourth terminal, a fifth terminal, a first terminal, and a second terminal, wherein the first terminal is coupled to the gate terminal of the MOSFET pass element, the first terminal is used to send the first bias voltage, the second terminal is used to send the second bias voltage, and the fourth terminal and the fifth terminal are both coupled to the first operating voltage; a third BJT element having a base terminal, an emitter terminal and a collector terminal, wherein the emitter terminal is coupled to the first gate terminal of the MOSFET pass element. The second end of the current mirror group, and the collector end is coupled to the second working voltage; a base resistor, having a first end and a second end, and the first end is coupled to the base end of the third BJT element; a fourth BJT element, having a base end, an emitter end and a collector end, wherein the base end is coupled to the second end of the base resistor, and the emitter end is coupled to the third end of the first current mirror group; and an emitter resistor, having a first end and a second end, wherein the first end is coupled to the collector end of the fourth BJT element, and the second end is coupled to the second working voltage; wherein the second end of the third current mirror is coupled to a common point between the second end of the base resistor and the base end of the fourth BJT element. A bandgap voltage generating circuit as described in claim 4, wherein the compensation current generating module comprises: a resistor having a first end and a second end; a second current mirror set formed by stacking two current mirrors, having a first end, a second end, a third end, a fourth end, a first terminal, and a second terminal, wherein the first end and the first terminal are both coupled to the first end of the resistor, the second terminal is coupled to the second end of the resistor, the second end is used to output the second compensation current, and the third end and the fourth end are both coupled to the first working voltage; a first MOSFET A transmission element having a gate terminal, a drain terminal and a source terminal, wherein the gate terminal is coupled to the first terminal of the second current mirror set, and the source terminal is coupled to the first working voltage; and a second MOSFET transmission element having a gate terminal, a drain terminal and a source terminal, wherein the gate terminal is coupled to the second terminal of the second current mirror set, the source terminal is coupled to the drain terminal of the first MOSFET transmission element, and the drain terminal is used to output the first compensation current; wherein the second end of the resistor is simultaneously coupled to the drain terminal of the MOSFET element. The bandgap voltage generating circuit as described in claim 4, wherein the first current generating unit, the second current generating unit and the fourth current generating unit all include: a resistor having a first end and a second end, and the first end is coupled to the first working voltage; and a resistor string formed by stacking two P-type MOSFET elements, having a first end, a second end, a first signal input end, and a second signal input end, wherein the first end is coupled to the second end of the resistor, the first signal input end is coupled to the first bias voltage, and the second signal input end is coupled to the second bias voltage. The bandgap voltage generating circuit as described in claim 4, wherein the third current generating unit comprises: a resistor having a first end and a second end, and the second end is coupled to the ground end; and a resistor string formed by stacking Q P-type MOSFET elements, wherein Q is a positive integer of at least 2, each of the P-type MOSFET elements is coupled to the first end of the resistor with its gate terminal, and the Qth P-type MOSFET element is coupled to the first end of the first current mirror with its drain terminal. An integrated circuit chip, characterized in that it includes a bandgap voltage generating circuit as described in any one of claim 1 to claim 8. An information processing device having at least one integrated circuit chip; characterized in that the integrated circuit chip includes a bandgap voltage generating circuit as described in any one of claim 1 to claim 8.

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